From: Yi Sun <yi.y.sun@linux.intel.com>
To: Jan Beulich <JBeulich@suse.com>
Cc: kevin.tian@intel.com, wei.liu2@citrix.com,
he.chen@linux.intel.com, andrew.cooper3@citrix.com,
dario.faggioli@citrix.com, ian.jackson@eu.citrix.com,
mengxu@cis.upenn.edu, xen-devel@lists.xenproject.org,
chao.p.peng@linux.intel.com
Subject: Re: [PATCH v8 08/24] x86: refactor psr: set value: implement framework.
Date: Mon, 13 Mar 2017 10:36:14 +0800 [thread overview]
Message-ID: <20170313023614.GP17458@yi.y.sun> (raw)
In-Reply-To: <58C27B730200007800141EE7@prv-mh.provo.novell.com>
On 17-03-10 02:09:55, Jan Beulich wrote:
> >>> On 10.03.17 at 03:54, <yi.y.sun@linux.intel.com> wrote:
> > On 17-03-08 09:07:10, Jan Beulich wrote:
> >> >>> On 15.02.17 at 09:49, <yi.y.sun@linux.intel.com> wrote:
> >> > +static int write_psr_msr(unsigned int socket, unsigned int cos,
> >> > + const uint64_t *val)
> >> > +{
> >> > + return -ENOENT;
> >> > +}
> >>
> >> Is this function intended you write just one MSR, or potentially many?
> >> In the latter case the name would perhaps better be "write_psr_msrs()".
> >>
> > For one feature, it does set one MSR.
>
> In which case - why is the value being passed by pointer?
>
Will change it. My original meaning is, for example, when setting L3 CAT, only
one MSR is set.
> >> > + ref[old_cos]--;
> >> > + spin_unlock(&info->ref_lock);
> >> > +
> >> > + /*
> >> > + * Step 6:
> >> > + * Save the COS ID into current domain's psr_cos_ids[] so that we can know
> >> > + * which COS the domain is using on the socket. One domain can only use
> >> > + * one COS ID at same time on each socket.
> >> > + */
> >> > + d->arch.psr_cos_ids[socket] = cos;
> >>
> >> So the domain has not been paused, i.e. some of its vCPU-s may
> >> be running on other pCPU-s (including ones on the socket in
> >> question). How come it is safe to update this value here?
> >>
> > This is a domctl operation. It is protected by domctl_lock which is locked in
> > do_domctl().
>
> But that lock doesn't keep the subject domain's vCPU-s from
> running on other pCPU-s at the same time.
>
Yes, you are right. But only 'psr_ctxt_switch_to()' can access
psr_cos_ids[socket] when psr_cos_ids[socket] is being set. 'psr_ctxt_switch_to()'
read the cos and set it to ASSOC register. Context switch is short so that the
correct cos can be set to ASSOC register in a short time.
BRs,
Sun Yi
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next prev parent reply other threads:[~2017-03-13 2:35 UTC|newest]
Thread overview: 122+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-02-15 8:49 [PATCH v8 00/24] Enable L2 Cache Allocation Technology & Refactor psr.c Yi Sun
2017-02-15 8:49 ` [PATCH v8 01/24] docs: create Cache Allocation Technology (CAT) and Code and Data Prioritization (CDP) feature document Yi Sun
2017-02-15 16:49 ` Konrad Rzeszutek Wilk
2017-02-26 17:40 ` Wei Liu
2017-02-15 8:49 ` [PATCH v8 02/24] x86: refactor psr: remove L3 CAT/CDP codes Yi Sun
2017-02-26 17:40 ` Wei Liu
2017-02-15 8:49 ` [PATCH v8 03/24] x86: refactor psr: implement main data structures Yi Sun
2017-02-28 11:58 ` Roger Pau Monné
2017-03-01 5:10 ` Yi Sun
2017-03-01 8:17 ` Jan Beulich
2017-03-01 8:28 ` Yi Sun
2017-03-01 8:39 ` Jan Beulich
2017-03-01 8:49 ` Roger Pau Monn�
2017-03-01 8:54 ` Jan Beulich
2017-03-01 9:00 ` Roger Pau Monn�
2017-02-15 8:49 ` [PATCH v8 04/24] x86: refactor psr: implement CPU init and free flow Yi Sun
2017-02-26 17:41 ` Wei Liu
2017-02-27 6:42 ` Yi Sun
2017-02-27 11:45 ` Wei Liu
2017-02-27 8:41 ` Jan Beulich
2017-03-08 14:56 ` Jan Beulich
2017-03-10 1:32 ` Yi Sun
2017-03-10 8:56 ` Jan Beulich
2017-03-13 2:18 ` Yi Sun
2017-02-15 8:49 ` [PATCH v8 05/24] x86: refactor psr: implement Domain init/free and schedule flows Yi Sun
2017-02-26 17:41 ` Wei Liu
2017-03-08 15:04 ` Jan Beulich
2017-02-15 8:49 ` [PATCH v8 06/24] x86: refactor psr: implement get hw info flow Yi Sun
2017-02-26 17:41 ` Wei Liu
2017-02-28 12:34 ` Roger Pau Monné
2017-03-08 15:15 ` Jan Beulich
2017-03-10 1:43 ` Yi Sun
2017-03-10 8:57 ` Jan Beulich
2017-03-10 9:01 ` Yi Sun
2017-02-15 8:49 ` [PATCH v8 07/24] x86: refactor psr: implement get value flow Yi Sun
2017-02-28 12:44 ` Roger Pau Monné
2017-03-01 5:21 ` Yi Sun
2017-03-08 15:35 ` Jan Beulich
2017-03-10 1:50 ` Yi Sun
2017-03-10 9:05 ` Jan Beulich
2017-02-15 8:49 ` [PATCH v8 08/24] x86: refactor psr: set value: implement framework Yi Sun
2017-02-26 17:41 ` Wei Liu
2017-02-27 7:06 ` Yi Sun
2017-02-27 10:55 ` Jan Beulich
2017-02-28 13:58 ` Roger Pau Monné
2017-03-01 6:23 ` Yi Sun
2017-03-08 16:07 ` Jan Beulich
2017-03-10 2:54 ` Yi Sun
2017-03-10 9:09 ` Jan Beulich
2017-03-13 2:36 ` Yi Sun [this message]
2017-03-13 12:35 ` Jan Beulich
2017-03-14 2:43 ` Yi Sun
2017-03-14 6:29 ` Jan Beulich
2017-03-14 9:21 ` Yi Sun
2017-03-14 10:24 ` Jan Beulich
2017-03-15 2:52 ` Yi Sun
2017-03-15 7:40 ` Jan Beulich
2017-03-15 8:18 ` Yi Sun
2017-03-15 8:32 ` Jan Beulich
2017-03-10 7:46 ` Yi Sun
2017-03-10 9:10 ` Jan Beulich
2017-02-15 8:49 ` [PATCH v8 09/24] x86: refactor psr: set value: assemble features value array Yi Sun
2017-02-26 17:43 ` Wei Liu
2017-02-27 7:11 ` Yi Sun
2017-02-27 11:45 ` Wei Liu
2017-03-08 16:54 ` Jan Beulich
2017-03-10 3:21 ` Yi Sun
2017-03-10 9:15 ` Jan Beulich
2017-03-13 2:43 ` Yi Sun
2017-03-13 12:37 ` Jan Beulich
2017-03-14 2:20 ` Yi Sun
2017-03-14 6:32 ` Jan Beulich
2017-02-15 8:49 ` [PATCH v8 10/24] x86: refactor psr: set value: implement cos finding flow Yi Sun
2017-02-26 17:43 ` Wei Liu
2017-02-27 7:16 ` Yi Sun
2017-03-08 17:03 ` Jan Beulich
2017-03-10 5:35 ` Yi Sun
2017-03-10 9:21 ` Jan Beulich
2017-02-15 8:49 ` [PATCH v8 11/24] x86: refactor psr: set value: implement cos id picking flow Yi Sun
2017-02-26 17:43 ` Wei Liu
2017-03-09 14:10 ` Jan Beulich
2017-03-10 5:40 ` Yi Sun
2017-03-10 9:24 ` Jan Beulich
2017-02-15 8:49 ` [PATCH v8 12/24] x86: refactor psr: set value: implement write msr flow Yi Sun
2017-02-15 8:49 ` [PATCH v8 13/24] x86: refactor psr: implement CPU init and free flow for CDP Yi Sun
2017-02-28 14:52 ` Roger Pau Monné
2017-03-09 14:53 ` Jan Beulich
2017-03-10 5:50 ` Yi Sun
2017-02-15 8:49 ` [PATCH v8 14/24] x86: refactor psr: implement get hw info " Yi Sun
2017-02-26 17:43 ` Wei Liu
2017-02-28 14:54 ` Roger Pau Monné
2017-02-15 8:49 ` [PATCH v8 15/24] x86: refactor psr: implement get value " Yi Sun
2017-02-28 14:59 ` Roger Pau Monné
2017-02-15 8:49 ` [PATCH v8 16/24] x86: refactor psr: implement set value callback functions " Yi Sun
2017-02-26 17:43 ` Wei Liu
2017-02-27 7:19 ` Yi Sun
2017-02-15 8:49 ` [PATCH v8 17/24] x86: L2 CAT: implement CPU init and free flow Yi Sun
2017-02-28 15:15 ` Roger Pau Monné
2017-03-01 6:35 ` Yi Sun
2017-03-09 15:04 ` Jan Beulich
2017-03-10 5:52 ` Yi Sun
2017-02-15 8:49 ` [PATCH v8 18/24] x86: L2 CAT: implement get hw info flow Yi Sun
2017-02-28 15:18 ` Roger Pau Monné
2017-03-09 15:13 ` Jan Beulich
2017-03-10 5:57 ` Yi Sun
2017-03-10 9:26 ` Jan Beulich
2017-02-15 8:49 ` [PATCH v8 19/24] x86: L2 CAT: implement get value flow Yi Sun
2017-02-28 15:20 ` Roger Pau Monné
2017-02-15 8:49 ` [PATCH v8 20/24] x86: L2 CAT: implement set " Yi Sun
2017-02-28 15:25 ` Roger Pau Monné
2017-03-01 6:59 ` Yi Sun
2017-03-01 11:31 ` Dario Faggioli
2017-02-15 8:49 ` [PATCH v8 21/24] tools: L2 CAT: support get HW info for L2 CAT Yi Sun
2017-02-15 8:49 ` [PATCH v8 22/24] tools: L2 CAT: support show cbm " Yi Sun
2017-02-15 8:49 ` [PATCH v8 23/24] tools: L2 CAT: support set " Yi Sun
2017-02-15 8:49 ` [PATCH v8 24/24] docs: add L2 CAT description in docs Yi Sun
2017-02-15 16:14 ` [PATCH v8 00/24] Enable L2 Cache Allocation Technology & Refactor psr.c Konrad Rzeszutek Wilk
2017-02-26 18:00 ` Wei Liu
2017-02-28 11:02 ` Roger Pau Monné
2017-03-01 4:54 ` Yi Sun
2017-03-01 8:35 ` Roger Pau Monn�
2017-03-01 8:40 ` Yi Sun
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