* [PATCH] uphy: handle utmipll iddq
@ 2017-02-28 15:19 ` Peter De Schrijver
0 siblings, 0 replies; 3+ messages in thread
From: Peter De Schrijver @ 2017-02-28 15:19 UTC (permalink / raw)
To: Peter De Schrijver, Prashant Gaikwad, Michael Turquette,
Stephen Boyd, Stephen Warren, Thierry Reding, Alexandre Courbot,
linux-clk, linux-tegra, linux-kernel
Cc: BH Hsieh
Export utmipll iddq functions. These will be needed when powergating the
XUSB partition.
Signed-off-by: BH Hsieh <bhsieh@nvidia.com>
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
---
drivers/clk/tegra/clk-tegra210.c | 26 ++++++++++++++++++++++++++
include/linux/clk/tegra.h | 2 ++
2 files changed, 28 insertions(+)
diff --git a/drivers/clk/tegra/clk-tegra210.c b/drivers/clk/tegra/clk-tegra210.c
index 708f5f1..4554a44 100644
--- a/drivers/clk/tegra/clk-tegra210.c
+++ b/drivers/clk/tegra/clk-tegra210.c
@@ -2313,6 +2313,32 @@ static u32 pll_expo_p_to_pdiv(u32 p, u32 *pdiv)
"clk_m"
};
+void tegra210_put_utmipll_in_iddq(void)
+{
+ u32 reg;
+
+ reg = readl_relaxed(clk_base + UTMIPLL_HW_PWRDN_CFG0);
+
+ if (reg & UTMIPLL_HW_PWRDN_CFG0_UTMIPLL_LOCK) {
+ pr_err("trying to assert IDDQ while UTMIPLL is locked\n");
+ return;
+ }
+
+ reg |= UTMIPLL_HW_PWRDN_CFG0_IDDQ_OVERRIDE;
+ writel_relaxed(reg, clk_base + UTMIPLL_HW_PWRDN_CFG0);
+}
+EXPORT_SYMBOL_GPL(tegra210_put_utmipll_in_iddq);
+
+void tegra210_put_utmipll_out_iddq(void)
+{
+ u32 reg;
+
+ reg = readl_relaxed(clk_base + UTMIPLL_HW_PWRDN_CFG0);
+ reg &= ~UTMIPLL_HW_PWRDN_CFG0_IDDQ_OVERRIDE;
+ writel_relaxed(reg, clk_base + UTMIPLL_HW_PWRDN_CFG0);
+}
+EXPORT_SYMBOL_GPL(tegra210_put_utmipll_out_iddq);
+
static __init void tegra210_periph_clk_init(void __iomem *clk_base,
void __iomem *pmc_base)
{
diff --git a/include/linux/clk/tegra.h b/include/linux/clk/tegra.h
index 7007a5f..e17d328 100644
--- a/include/linux/clk/tegra.h
+++ b/include/linux/clk/tegra.h
@@ -125,5 +125,7 @@ static inline void tegra_cpu_clock_resume(void)
extern void tegra210_xusb_pll_hw_sequence_start(void);
extern void tegra210_sata_pll_hw_control_enable(void);
extern void tegra210_sata_pll_hw_sequence_start(void);
+extern void tegra210_put_utmipll_in_iddq(void);
+extern void tegra210_put_utmipll_out_iddq(void);
#endif /* __LINUX_CLK_TEGRA_H_ */
--
1.9.1
^ permalink raw reply related [flat|nested] 3+ messages in thread* [PATCH] uphy: handle utmipll iddq
@ 2017-02-28 15:19 ` Peter De Schrijver
0 siblings, 0 replies; 3+ messages in thread
From: Peter De Schrijver @ 2017-02-28 15:19 UTC (permalink / raw)
To: Peter De Schrijver, Prashant Gaikwad, Michael Turquette,
Stephen Boyd, Stephen Warren, Thierry Reding, Alexandre Courbot,
linux-clk, linux-tegra, linux-kernel
Cc: BH Hsieh
Export utmipll iddq functions. These will be needed when powergating the
XUSB partition.
Signed-off-by: BH Hsieh <bhsieh@nvidia.com>
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
---
drivers/clk/tegra/clk-tegra210.c | 26 ++++++++++++++++++++++++++
include/linux/clk/tegra.h | 2 ++
2 files changed, 28 insertions(+)
diff --git a/drivers/clk/tegra/clk-tegra210.c b/drivers/clk/tegra/clk-tegra210.c
index 708f5f1..4554a44 100644
--- a/drivers/clk/tegra/clk-tegra210.c
+++ b/drivers/clk/tegra/clk-tegra210.c
@@ -2313,6 +2313,32 @@ static u32 pll_expo_p_to_pdiv(u32 p, u32 *pdiv)
"clk_m"
};
+void tegra210_put_utmipll_in_iddq(void)
+{
+ u32 reg;
+
+ reg = readl_relaxed(clk_base + UTMIPLL_HW_PWRDN_CFG0);
+
+ if (reg & UTMIPLL_HW_PWRDN_CFG0_UTMIPLL_LOCK) {
+ pr_err("trying to assert IDDQ while UTMIPLL is locked\n");
+ return;
+ }
+
+ reg |= UTMIPLL_HW_PWRDN_CFG0_IDDQ_OVERRIDE;
+ writel_relaxed(reg, clk_base + UTMIPLL_HW_PWRDN_CFG0);
+}
+EXPORT_SYMBOL_GPL(tegra210_put_utmipll_in_iddq);
+
+void tegra210_put_utmipll_out_iddq(void)
+{
+ u32 reg;
+
+ reg = readl_relaxed(clk_base + UTMIPLL_HW_PWRDN_CFG0);
+ reg &= ~UTMIPLL_HW_PWRDN_CFG0_IDDQ_OVERRIDE;
+ writel_relaxed(reg, clk_base + UTMIPLL_HW_PWRDN_CFG0);
+}
+EXPORT_SYMBOL_GPL(tegra210_put_utmipll_out_iddq);
+
static __init void tegra210_periph_clk_init(void __iomem *clk_base,
void __iomem *pmc_base)
{
diff --git a/include/linux/clk/tegra.h b/include/linux/clk/tegra.h
index 7007a5f..e17d328 100644
--- a/include/linux/clk/tegra.h
+++ b/include/linux/clk/tegra.h
@@ -125,5 +125,7 @@ static inline void tegra_cpu_clock_resume(void)
extern void tegra210_xusb_pll_hw_sequence_start(void);
extern void tegra210_sata_pll_hw_control_enable(void);
extern void tegra210_sata_pll_hw_sequence_start(void);
+extern void tegra210_put_utmipll_in_iddq(void);
+extern void tegra210_put_utmipll_out_iddq(void);
#endif /* __LINUX_CLK_TEGRA_H_ */
--
1.9.1
^ permalink raw reply related [flat|nested] 3+ messages in thread* Re: [PATCH] uphy: handle utmipll iddq
2017-02-28 15:19 ` Peter De Schrijver
(?)
@ 2017-03-20 13:09 ` Thierry Reding
-1 siblings, 0 replies; 3+ messages in thread
From: Thierry Reding @ 2017-03-20 13:09 UTC (permalink / raw)
To: Peter De Schrijver
Cc: Prashant Gaikwad, Michael Turquette, Stephen Boyd, Stephen Warren,
Alexandre Courbot, linux-clk, linux-tegra, linux-kernel, BH Hsieh
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On Tue, Feb 28, 2017 at 05:19:24PM +0200, Peter De Schrijver wrote:
> Export utmipll iddq functions. These will be needed when powergating the
> XUSB partition.
>
> Signed-off-by: BH Hsieh <bhsieh@nvidia.com>
> Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
> ---
> drivers/clk/tegra/clk-tegra210.c | 26 ++++++++++++++++++++++++++
> include/linux/clk/tegra.h | 2 ++
> 2 files changed, 28 insertions(+)
Applied to for-4.12/clk, thanks.
Thierry
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^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2017-03-20 13:09 UTC | newest]
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2017-02-28 15:19 [PATCH] uphy: handle utmipll iddq Peter De Schrijver
2017-02-28 15:19 ` Peter De Schrijver
2017-03-20 13:09 ` Thierry Reding
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