From: Yi Sun <yi.y.sun@linux.intel.com>
To: Jan Beulich <JBeulich@suse.com>
Cc: kevin.tian@intel.com, wei.liu2@citrix.com,
he.chen@linux.intel.com, andrew.cooper3@citrix.com,
dario.faggioli@citrix.com, ian.jackson@eu.citrix.com,
mengxu@cis.upenn.edu, chao.p.peng@linux.intel.com,
xen-devel@lists.xenproject.org, roger.pau@citrix.com
Subject: Re: [PATCH v10 05/25] x86: refactor psr: L3 CAT: implement CPU init and free flow.
Date: Fri, 7 Apr 2017 17:08:49 +0800 [thread overview]
Message-ID: <20170407090849.GT17458@yi.y.sun> (raw)
In-Reply-To: <58E76E88020000780014E5F6@prv-mh.provo.novell.com>
On 17-04-07 02:48:40, Jan Beulich wrote:
> >>> On 07.04.17 at 07:17, <yi.y.sun@linux.intel.com> wrote:
> > On 17-04-06 08:02:15, Jan Beulich wrote:
> >> Okay, so not the context switch path then, But you must be
> >> changing the MSRs _somewhere_, and the question is why this
> >> somewhere isn't sufficient.
> >>
> > Besides the restore behavior in init process, I restore the MSRs when
> > ref[cos]
> > is reduced to 0. This behavior happens in two scenarios:
> > 1. In a value setting process, restore MSR if the ref[old_cos] is reduced to 0.
> > 2. When a domain is destroyed, its ref[cos] is reduced too.
> >
> > Reason to restore is below:
> > For features, e.g. CDP, which cos_num is more than 1, we have to
> > restore the old_cos value back to default when ref[old_cos] is 0.
> > Otherwise, user will see wrong values when this COS ID is reused. E.g.
> > user wants to set DATA to 0x3ff for a new domain. He hopes to see the
> > DATA is set to 0x3ff and CODE should be the default value, 0x7ff. But
> > if the COS ID picked for this action is the one that has been used by
> > other domain and the CODE has been set to 0x1ff. Then, user will see
> > DATA: 0x3ff, CODE: 0x1ff. So, we have to restore COS values for features
> > using multiple COSs.
>
> I still don't feel my question being answered. Without a COS
> ever allocated on a socket, how can values in MSRs other than
> the first (index 0) one be used by anyone? I ask because if they
> can't be used, their values don't matter (all you need to make
> sure is to write them regardless of their currently cached value).
The COS ID using is managed by domain (d->arch.psr_cos_ids[socket]). Even if a
socket is offline, the COS ID saved in domain is still valid (domain is alive).
When this socket is online again, the domain may be scheduled onto it to run.
Then, the COS ID (e.g 2) will be used to get/set value for this domain. If we
don't restore MSRs on the socket, we may get an unknown value. This the reason
we have to restore MSRs in 'cat_init_feature' which is called when socket is
online.
Per explanation above (in previous mail), we have to restore MSRs when ref[cos]
is reduced to 0.
Those are all sencarios and reasons to restore MSRs. I don't know if the
explanations are precise enough. Any unclear, please let me know. Thanks!
> If syncing MSR and cached values at init time is to make sure
> those writes won#t be bypassed, that would be a legitimate
> explanation (if the alternatives, like introducing a separate flag,
> would be overall more expensive or uglier). But the reason(s)
> need(s) to be properly explained (and by "properly" I don't
> mean a _long_ code comment, but a _precise_ one).
>
> Jan
>
>
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next prev parent reply other threads:[~2017-04-07 9:08 UTC|newest]
Thread overview: 114+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-04-01 13:53 [PATCH v10 00/25] Enable L2 Cache Allocation Technology & Refactor psr.c Yi Sun
2017-04-01 13:53 ` [PATCH v10 01/25] docs: create Cache Allocation Technology (CAT) and Code and Data Prioritization (CDP) feature document Yi Sun
2017-04-01 13:53 ` [PATCH v10 02/25] x86: refactor psr: remove L3 CAT/CDP codes Yi Sun
2017-04-01 13:53 ` [PATCH v10 03/25] x86: refactor psr: implement main data structures Yi Sun
2017-04-03 15:50 ` Jan Beulich
2017-04-05 3:12 ` Yi Sun
2017-04-05 8:20 ` Jan Beulich
2017-04-05 8:45 ` Yi Sun
2017-04-01 13:53 ` [PATCH v10 04/25] x86: move cpuid_count_leaf from cpuid.c to processor.h Yi Sun
2017-04-01 13:53 ` [PATCH v10 05/25] x86: refactor psr: L3 CAT: implement CPU init and free flow Yi Sun
2017-04-05 15:10 ` Jan Beulich
2017-04-06 5:49 ` Yi Sun
2017-04-06 8:32 ` Jan Beulich
2017-04-06 9:22 ` Yi Sun
2017-04-06 9:34 ` Jan Beulich
2017-04-06 10:02 ` Yi Sun
2017-04-06 14:02 ` Jan Beulich
2017-04-07 5:17 ` Yi Sun
2017-04-07 8:48 ` Jan Beulich
2017-04-07 9:08 ` Yi Sun [this message]
2017-04-07 9:46 ` Jan Beulich
2017-04-10 3:27 ` Yi Sun
2017-04-10 12:43 ` Yi Sun
2017-04-01 13:53 ` [PATCH v10 06/25] x86: refactor psr: L3 CAT: implement Domain init/free and schedule flows Yi Sun
2017-04-05 15:23 ` Jan Beulich
2017-04-06 6:01 ` Yi Sun
2017-04-06 8:34 ` Jan Beulich
2017-04-01 13:53 ` [PATCH v10 07/25] x86: refactor psr: L3 CAT: implement get hw info flow Yi Sun
2017-04-05 15:37 ` Jan Beulich
2017-04-06 6:05 ` Yi Sun
2017-04-06 8:36 ` Jan Beulich
2017-04-06 11:16 ` Yi Sun
2017-04-06 14:04 ` Jan Beulich
2017-04-07 5:39 ` Yi Sun
2017-04-01 13:53 ` [PATCH v10 08/25] x86: refactor psr: L3 CAT: implement get value flow Yi Sun
2017-04-05 15:51 ` Jan Beulich
2017-04-06 6:10 ` Yi Sun
2017-04-06 8:40 ` Jan Beulich
2017-04-06 11:13 ` Yi Sun
2017-04-06 14:08 ` Jan Beulich
2017-04-07 5:40 ` Yi Sun
2017-04-01 13:53 ` [PATCH v10 09/25] x86: refactor psr: L3 CAT: set value: implement framework Yi Sun
2017-04-11 15:01 ` Jan Beulich
2017-04-12 5:53 ` Yi Sun
2017-04-12 9:09 ` Jan Beulich
2017-04-12 12:23 ` Yi Sun
2017-04-12 12:42 ` Jan Beulich
2017-04-13 8:11 ` Yi Sun
2017-04-13 9:41 ` Jan Beulich
2017-04-13 10:49 ` Yi Sun
2017-04-13 10:58 ` Jan Beulich
2017-04-13 11:11 ` Yi Sun
2017-04-13 11:26 ` Yi Sun
2017-04-13 11:31 ` Jan Beulich
2017-04-13 11:44 ` Yi Sun
2017-04-13 11:50 ` Jan Beulich
2017-04-18 10:55 ` Yi Sun
2017-04-18 11:46 ` Jan Beulich
2017-04-19 8:22 ` Yi Sun
2017-04-19 9:00 ` Jan Beulich
2017-04-20 2:14 ` Yi Sun
2017-04-20 9:43 ` Jan Beulich
2017-04-20 13:02 ` Lars Kurth
2017-04-20 13:21 ` Jan Beulich
2017-04-20 16:52 ` Lars Kurth
2017-04-21 6:11 ` Jan Beulich
2017-04-21 1:13 ` Konrad Rzeszutek Wilk
2017-04-21 6:18 ` Jan Beulich
2017-04-24 6:40 ` Yi Sun
2017-04-24 6:55 ` Jan Beulich
2017-04-25 7:15 ` Yi Sun
2017-04-25 8:24 ` Jan Beulich
2017-04-25 8:40 ` Yi Sun
2017-04-20 5:38 ` [PATCH] dom_ids array implementation Yi Sun
2017-04-26 10:04 ` Jan Beulich
2017-04-27 2:38 ` Yi Sun
2017-04-27 6:48 ` Jan Beulich
2017-04-27 9:30 ` Yi Sun
2017-04-27 9:39 ` Jan Beulich
2017-04-27 12:03 ` Yi Sun
2017-04-01 13:53 ` [PATCH v10 10/25] x86: refactor psr: L3 CAT: set value: assemble features value array Yi Sun
2017-04-11 15:11 ` Jan Beulich
2017-04-12 5:55 ` Yi Sun
2017-04-12 9:13 ` Jan Beulich
2017-04-12 12:26 ` Yi Sun
2017-04-01 13:53 ` [PATCH v10 11/25] x86: refactor psr: L3 CAT: set value: implement cos finding flow Yi Sun
2017-04-11 15:17 ` Jan Beulich
2017-04-01 13:53 ` [PATCH v10 12/25] x86: refactor psr: L3 CAT: set value: implement cos id picking flow Yi Sun
2017-04-11 15:20 ` Jan Beulich
2017-04-01 13:53 ` [PATCH v10 13/25] x86: refactor psr: L3 CAT: set value: implement write msr flow Yi Sun
2017-04-11 15:25 ` Jan Beulich
2017-04-12 6:04 ` Yi Sun
2017-04-01 13:53 ` [PATCH v10 14/25] x86: refactor psr: CDP: implement CPU init and free flow Yi Sun
2017-04-01 13:53 ` [PATCH v10 15/25] x86: refactor psr: CDP: implement get hw info flow Yi Sun
2017-04-01 13:53 ` [PATCH v10 16/25] x86: refactor psr: CDP: implement get value flow Yi Sun
2017-04-11 15:39 ` Jan Beulich
2017-04-12 6:05 ` Yi Sun
2017-04-12 9:14 ` Jan Beulich
2017-04-01 13:53 ` [PATCH v10 17/25] x86: refactor psr: CDP: implement set value callback functions Yi Sun
2017-04-11 16:03 ` Jan Beulich
2017-04-12 6:14 ` Yi Sun
2017-04-01 13:53 ` [PATCH v10 18/25] x86: L2 CAT: implement CPU init and free flow Yi Sun
2017-04-12 15:18 ` Jan Beulich
2017-04-13 8:12 ` Yi Sun
2017-04-13 8:16 ` Jan Beulich
2017-04-01 13:53 ` [PATCH v10 19/25] x86: L2 CAT: implement get hw info flow Yi Sun
2017-04-01 13:53 ` [PATCH v10 20/25] x86: L2 CAT: implement get value flow Yi Sun
2017-04-01 13:53 ` [PATCH v10 21/25] x86: L2 CAT: implement set " Yi Sun
2017-04-12 15:23 ` Jan Beulich
2017-04-01 13:53 ` [PATCH v10 22/25] tools: L2 CAT: support get HW info for L2 CAT Yi Sun
2017-04-12 15:24 ` Jan Beulich
2017-04-01 13:53 ` [PATCH v10 23/25] tools: L2 CAT: support show cbm " Yi Sun
2017-04-01 13:53 ` [PATCH v10 24/25] tools: L2 CAT: support set " Yi Sun
2017-04-01 13:53 ` [PATCH v10 25/25] docs: add L2 CAT description in docs Yi Sun
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