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From: "Emilio G. Cota" <cota@braap.org>
To: Richard Henderson <rth@twiddle.net>
Cc: qemu-devel@nongnu.org, Paolo Bonzini <pbonzini@redhat.com>,
	Peter Crosthwaite <crosthwaite.peter@gmail.com>,
	Peter Maydell <peter.maydell@linaro.org>,
	Eduardo Habkost <ehabkost@redhat.com>,
	Andrzej Zaborowski <balrogg@gmail.com>,
	Aurelien Jarno <aurelien@aurel32.net>,
	Alexander Graf <agraf@suse.de>, Stefan Weil <sw@weilnetz.de>,
	qemu-arm@nongnu.org, alex.bennee@linaro.org,
	Pranith Kumar <bobby.prani+qemu@gmail.com>
Subject: Re: [PATCH v3 01/10] tcg-runtime: add lookup_tb_ptr helper
Date: Wed, 26 Apr 2017 19:11:32 -0400	[thread overview]
Message-ID: <20170426231132.GC16014@flamenco> (raw)
In-Reply-To: <20170426224531.GB16014@flamenco>

On Wed, Apr 26, 2017 at 18:45:31 -0400, Emilio G. Cota wrote:
> On Thu, Apr 27, 2017 at 00:29:49 +0200, Richard Henderson wrote:
> > On 04/26/2017 11:56 PM, Emilio G. Cota wrote:
> > >On Wed, Apr 26, 2017 at 10:40:45 +0200, Richard Henderson wrote:
> > >>On 04/26/2017 08:23 AM, Emilio G. Cota wrote:
> > >(snip)
> > >>>+    cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);
> > >>>+    tb = atomic_rcu_read(&cpu->tb_jmp_cache[tb_jmp_cache_hash_func(addr)]);
> > >>>+    if (likely(tb && tb->pc == addr && tb->cs_base == cs_base &&
> > >>>+               tb->flags == flags)) {
> > >>
> > >>This comparison is wrong.  It will incorrectly reject a TB for i386 guest
> > >>when CS_BASE != 0.  You really want
> > >>
> > >>   tb = atomic_rcu_read(&cpu->tb_jmp_cache[tb_jmp_cache_hash_func(addr)]);
> > >>   if (tb) {
> > >>     cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);
> > >>     if (tb->pc == pc && tb->cs_base == cs_base && tb->flags == flags) {
> > >>       return tb->tc_ptr;
> > >>     }
> > >>   }
> > >>   return tcg_ctx.code_gen_epilogue;
> > >
> > >wrt the comparison, the only change I notice in your suggested change is
> > >   tb->pc == pc
> > >
> > >instead of
> > >   tb->pc == addr
> > >
> > >, which seems innocuous to me (since tb->pc == addr).
> > >
> > >I fail to see how this relates to your "CS_BASE != 0" comment.
> > >What am I missing?
> > 
> > Recall how you computed vaddr for target/i386:
> > 
> >   addr = pc + cs_base
> 
> I see, thanks!

Hmm TB's are added to tb_jmp_cache by pc, not by pc + cs_base:

  atomic_set(&cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)], tb);

Shouldn't we then pass just the pc (without adding cs_base) to
lookup_ptr, then? i.e.

--- a/target/i386/translate.c
+++ b/target/i386/translate.c
@@ -2533,11 +2533,7 @@ gen_eob_worker(DisasContext *s, bool inhibit, bool recheck_tf, TCGv jr)
     } else if (s->tf) {
         gen_helper_single_step(cpu_env);
     } else if (!TCGV_IS_UNUSED(jr)) {
-        TCGv vaddr = tcg_temp_new();
-
-        tcg_gen_add_tl(vaddr, jr, cpu_seg_base[R_CS]);
-        tcg_gen_lookup_and_goto_ptr(vaddr);
-        tcg_temp_free(vaddr);
+        tcg_gen_lookup_and_goto_ptr(jr);
     } else {
         tcg_gen_exit_tb(0);
     }

And while at it, rename the "addr" argument in lookup_ptr to "pc". Hmm?

		E.

WARNING: multiple messages have this Message-ID (diff)
From: "Emilio G. Cota" <cota@braap.org>
To: Richard Henderson <rth@twiddle.net>
Cc: qemu-devel@nongnu.org, Paolo Bonzini <pbonzini@redhat.com>,
	Peter Crosthwaite <crosthwaite.peter@gmail.com>,
	Peter Maydell <peter.maydell@linaro.org>,
	Eduardo Habkost <ehabkost@redhat.com>,
	Andrzej Zaborowski <balrogg@gmail.com>,
	Aurelien Jarno <aurelien@aurel32.net>,
	Alexander Graf <agraf@suse.de>, Stefan Weil <sw@weilnetz.de>,
	qemu-arm@nongnu.org, alex.bennee@linaro.org,
	Pranith Kumar <bobby.prani+qemu@gmail.com>
Subject: Re: [Qemu-devel] [PATCH v3 01/10] tcg-runtime: add lookup_tb_ptr helper
Date: Wed, 26 Apr 2017 19:11:32 -0400	[thread overview]
Message-ID: <20170426231132.GC16014@flamenco> (raw)
In-Reply-To: <20170426224531.GB16014@flamenco>

On Wed, Apr 26, 2017 at 18:45:31 -0400, Emilio G. Cota wrote:
> On Thu, Apr 27, 2017 at 00:29:49 +0200, Richard Henderson wrote:
> > On 04/26/2017 11:56 PM, Emilio G. Cota wrote:
> > >On Wed, Apr 26, 2017 at 10:40:45 +0200, Richard Henderson wrote:
> > >>On 04/26/2017 08:23 AM, Emilio G. Cota wrote:
> > >(snip)
> > >>>+    cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);
> > >>>+    tb = atomic_rcu_read(&cpu->tb_jmp_cache[tb_jmp_cache_hash_func(addr)]);
> > >>>+    if (likely(tb && tb->pc == addr && tb->cs_base == cs_base &&
> > >>>+               tb->flags == flags)) {
> > >>
> > >>This comparison is wrong.  It will incorrectly reject a TB for i386 guest
> > >>when CS_BASE != 0.  You really want
> > >>
> > >>   tb = atomic_rcu_read(&cpu->tb_jmp_cache[tb_jmp_cache_hash_func(addr)]);
> > >>   if (tb) {
> > >>     cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);
> > >>     if (tb->pc == pc && tb->cs_base == cs_base && tb->flags == flags) {
> > >>       return tb->tc_ptr;
> > >>     }
> > >>   }
> > >>   return tcg_ctx.code_gen_epilogue;
> > >
> > >wrt the comparison, the only change I notice in your suggested change is
> > >   tb->pc == pc
> > >
> > >instead of
> > >   tb->pc == addr
> > >
> > >, which seems innocuous to me (since tb->pc == addr).
> > >
> > >I fail to see how this relates to your "CS_BASE != 0" comment.
> > >What am I missing?
> > 
> > Recall how you computed vaddr for target/i386:
> > 
> >   addr = pc + cs_base
> 
> I see, thanks!

Hmm TB's are added to tb_jmp_cache by pc, not by pc + cs_base:

  atomic_set(&cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)], tb);

Shouldn't we then pass just the pc (without adding cs_base) to
lookup_ptr, then? i.e.

--- a/target/i386/translate.c
+++ b/target/i386/translate.c
@@ -2533,11 +2533,7 @@ gen_eob_worker(DisasContext *s, bool inhibit, bool recheck_tf, TCGv jr)
     } else if (s->tf) {
         gen_helper_single_step(cpu_env);
     } else if (!TCGV_IS_UNUSED(jr)) {
-        TCGv vaddr = tcg_temp_new();
-
-        tcg_gen_add_tl(vaddr, jr, cpu_seg_base[R_CS]);
-        tcg_gen_lookup_and_goto_ptr(vaddr);
-        tcg_temp_free(vaddr);
+        tcg_gen_lookup_and_goto_ptr(jr);
     } else {
         tcg_gen_exit_tb(0);
     }

And while at it, rename the "addr" argument in lookup_ptr to "pc". Hmm?

		E.

  reply	other threads:[~2017-04-26 23:11 UTC|newest]

Thread overview: 69+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-04-26  6:23 [PATCH v3 00/10] TCG optimizations for 2.10 Emilio G. Cota
2017-04-26  6:23 ` [Qemu-devel] " Emilio G. Cota
2017-04-26  6:23 ` [PATCH v3 01/10] tcg-runtime: add lookup_tb_ptr helper Emilio G. Cota
2017-04-26  6:23   ` [Qemu-devel] " Emilio G. Cota
2017-04-26  7:50   ` Paolo Bonzini
2017-04-26  7:50     ` [Qemu-devel] " Paolo Bonzini
2017-04-26  8:40   ` Richard Henderson
2017-04-26  8:40     ` [Qemu-devel] " Richard Henderson
2017-04-26 21:56     ` Emilio G. Cota
2017-04-26 21:56       ` [Qemu-devel] " Emilio G. Cota
2017-04-26 22:29       ` Richard Henderson
2017-04-26 22:29         ` [Qemu-devel] " Richard Henderson
2017-04-26 22:45         ` Emilio G. Cota
2017-04-26 22:45           ` [Qemu-devel] " Emilio G. Cota
2017-04-26 23:11           ` Emilio G. Cota [this message]
2017-04-26 23:11             ` Emilio G. Cota
2017-04-26 23:25             ` Emilio G. Cota
2017-04-26 23:25               ` [Qemu-devel] " Emilio G. Cota
2017-04-26 23:17     ` Emilio G. Cota
2017-04-26 23:17       ` [Qemu-devel] " Emilio G. Cota
2017-04-26 10:29   ` Alex Bennée
2017-04-26 10:29     ` [Qemu-devel] " Alex Bennée
2017-04-26 10:43     ` Richard Henderson
2017-04-26 10:43       ` [Qemu-devel] " Richard Henderson
2017-04-26 15:11     ` Paolo Bonzini
2017-04-26 15:11       ` [Qemu-devel] " Paolo Bonzini
2017-04-26 16:16       ` Alex Bennée
2017-04-26 16:16         ` [Qemu-devel] " Alex Bennée
2017-04-26  6:23 ` [PATCH v3 02/10] tcg: introduce goto_ptr opcode Emilio G. Cota
2017-04-26  6:23   ` [Qemu-devel] " Emilio G. Cota
2017-04-26  8:30   ` Richard Henderson
2017-04-26  8:30     ` [Qemu-devel] " Richard Henderson
2017-04-26 12:12   ` Richard Henderson
2017-04-26 12:12     ` [Qemu-devel] " Richard Henderson
2017-04-26  6:23 ` [PATCH v3 03/10] tcg: export tcg_gen_lookup_and_goto_ptr Emilio G. Cota
2017-04-26  6:23   ` [Qemu-devel] " Emilio G. Cota
2017-04-26  8:29   ` Richard Henderson
2017-04-26  8:29     ` [Qemu-devel] " Richard Henderson
2017-04-26 10:33   ` Alex Bennée
2017-04-26 10:33     ` [Qemu-devel] " Alex Bennée
2017-04-26  6:23 ` [PATCH v3 04/10] tcg/i386: implement goto_ptr op Emilio G. Cota
2017-04-26  6:23   ` [Qemu-devel] " Emilio G. Cota
2017-04-26  8:28   ` Richard Henderson
2017-04-26  8:28     ` [Qemu-devel] " Richard Henderson
2017-04-26  6:23 ` [PATCH v3 05/10] target/arm: optimize cross-page direct jumps in softmmu Emilio G. Cota
2017-04-26  6:23   ` [Qemu-devel] " Emilio G. Cota
2017-04-26  8:27   ` Richard Henderson
2017-04-26  8:27     ` [Qemu-devel] " Richard Henderson
2017-04-26  6:23 ` [PATCH v3 06/10] target/arm: optimize indirect branches Emilio G. Cota
2017-04-26  6:23   ` [Qemu-devel] " Emilio G. Cota
2017-04-26  7:54   ` Richard Henderson
2017-04-26  7:54     ` [Qemu-devel] " Richard Henderson
2017-04-27  3:20     ` Emilio G. Cota
2017-04-27  3:20       ` [Qemu-devel] " Emilio G. Cota
2017-04-27 10:25       ` Aurelien Jarno
2017-04-26  6:23 ` [PATCH v3 07/10] target/i386: introduce gen_jr helper to generate lookup_and_goto_ptr Emilio G. Cota
2017-04-26  6:23   ` [Qemu-devel] " Emilio G. Cota
2017-04-26  8:26   ` Richard Henderson
2017-04-26  8:26     ` [Qemu-devel] " Richard Henderson
2017-04-26  6:23 ` [PATCH v3 08/10] target/i386: optimize cross-page direct jumps in softmmu Emilio G. Cota
2017-04-26  6:23   ` [Qemu-devel] " Emilio G. Cota
2017-04-26  8:25   ` Richard Henderson
2017-04-26  8:25     ` [Qemu-devel] " Richard Henderson
2017-04-26  6:23 ` [PATCH v3 09/10] target/i386: optimize indirect branches Emilio G. Cota
2017-04-26  6:23   ` [Qemu-devel] " Emilio G. Cota
2017-04-26  8:24   ` Richard Henderson
2017-04-26  8:24     ` [Qemu-devel] " Richard Henderson
2017-04-26  6:23 ` [PATCH v3 10/10] tb-hash: improve tb_jmp_cache hash function in user mode Emilio G. Cota
2017-04-26  6:23   ` [Qemu-devel] " Emilio G. Cota

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