From: "Liu, Yi L" <yi.l.liu-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
To: Peter Xu <peterx-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
Cc: tianyu.lan-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org,
kevin.tian-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org,
kvm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
jasowang-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org,
qemu-devel-qX2TKyscuCcdnm+yROfE0A@public.gmane.org,
iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org,
jacob.jun.pan-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org
Subject: Re: [Qemu-devel] [RFC PATCH 02/20] intel_iommu: exposed extended-context mode to guest
Date: Fri, 28 Apr 2017 17:55:26 +0800 [thread overview]
Message-ID: <20170428095526.GC15484@sky-dev> (raw)
In-Reply-To: <20170427103221.GD1542-QJIicYCqamqhazCxEpVPD9i2O/JbrIOy@public.gmane.org>
On Thu, Apr 27, 2017 at 06:32:21PM +0800, Peter Xu wrote:
> On Wed, Apr 26, 2017 at 06:06:32PM +0800, Liu, Yi L wrote:
> > VT-d implementations reporting PASID or PRS fields as "Set", must also
> > report ecap.ECS as "Set". Extended-Context is required for SVM.
> >
> > When ECS is reported, intel iommu driver would initiate extended root entry
> > and extended context entry, and also PASID table if there is any SVM capable
> > device.
> >
> > Signed-off-by: Liu, Yi L <yi.l.liu-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
> > ---
> > hw/i386/intel_iommu.c | 131 +++++++++++++++++++++++++++--------------
> > hw/i386/intel_iommu_internal.h | 9 +++
> > include/hw/i386/intel_iommu.h | 2 +-
> > 3 files changed, 97 insertions(+), 45 deletions(-)
> >
> > diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
> > index 400d0d1..bf98fa5 100644
> > --- a/hw/i386/intel_iommu.c
> > +++ b/hw/i386/intel_iommu.c
> > @@ -497,6 +497,11 @@ static inline bool vtd_root_entry_present(VTDRootEntry *root)
> > return root->val & VTD_ROOT_ENTRY_P;
> > }
> >
> > +static inline bool vtd_root_entry_upper_present(VTDRootEntry *root)
> > +{
> > + return root->rsvd & VTD_ROOT_ENTRY_P;
> > +}
> > +
> > static int vtd_get_root_entry(IntelIOMMUState *s, uint8_t index,
> > VTDRootEntry *re)
> > {
> > @@ -509,6 +514,9 @@ static int vtd_get_root_entry(IntelIOMMUState *s, uint8_t index,
> > return -VTD_FR_ROOT_TABLE_INV;
> > }
> > re->val = le64_to_cpu(re->val);
> > + if (s->ecs) {
> > + re->rsvd = le64_to_cpu(re->rsvd);
> > + }
>
> I feel it slightly hacky to play with re->rsvd. How about:
>
> union VTDRootEntry {
> struct {
> uint64_t val;
> uint64_t rsvd;
> } base;
> struct {
> uint64_t ext_lo;
> uint64_t ext_hi;
> } extended;
> };
Agree.
> (Or any better way that can get rid of rsvd...)
>
> Even:
>
> struct VTDRootEntry {
> union {
> struct {
> uint64_t val;
> uint64_t rsvd;
> } base;
> struct {
> uint64_t ext_lo;
> uint64_t ext_hi;
> } extended;
> } data;
> bool extended;
> };
>
> Then we read the entry into data, and setup extended bit. A benefit of
> it is that we may avoid passing around IntelIOMMUState everywhere to
> know whether we are using extended context entries.
For this proposal, it's combining the s->ecs bit and root entry. But it
may mislead future maintainer as it uses VTDRootEntry. maybe name it
differently.
> > return 0;
> > }
> >
> > @@ -517,19 +525,30 @@ static inline bool vtd_context_entry_present(VTDContextEntry *context)
> > return context->lo & VTD_CONTEXT_ENTRY_P;
> > }
> >
> > -static int vtd_get_context_entry_from_root(VTDRootEntry *root, uint8_t index,
> > - VTDContextEntry *ce)
> > +static int vtd_get_context_entry_from_root(IntelIOMMUState *s,
> > + VTDRootEntry *root, uint8_t index, VTDContextEntry *ce)
> > {
> > - dma_addr_t addr;
> > + dma_addr_t addr, ce_size;
> >
> > /* we have checked that root entry is present */
> > - addr = (root->val & VTD_ROOT_ENTRY_CTP) + index * sizeof(*ce);
> > - if (dma_memory_read(&address_space_memory, addr, ce, sizeof(*ce))) {
> > + ce_size = (s->ecs) ? (2 * sizeof(*ce)) : (sizeof(*ce));
> > + addr = (s->ecs && (index > 0x7f)) ?
> > + ((root->rsvd & VTD_ROOT_ENTRY_CTP) + (index - 0x80) * ce_size) :
> > + ((root->val & VTD_ROOT_ENTRY_CTP) + index * ce_size);
> > +
> > + if (dma_memory_read(&address_space_memory, addr, ce, ce_size)) {
> > trace_vtd_re_invalid(root->rsvd, root->val);
> > return -VTD_FR_CONTEXT_TABLE_INV;
> > }
> > - ce->lo = le64_to_cpu(ce->lo);
> > - ce->hi = le64_to_cpu(ce->hi);
> > +
> > + ce[0].lo = le64_to_cpu(ce[0].lo);
> > + ce[0].hi = le64_to_cpu(ce[0].hi);
>
> Again, I feel this even hackier. :)
>
> I would slightly prefer to play the same union trick to context
> entries, just like what I proposed to the root entries above...
would think about it.
> > +
> > + if (s->ecs) {
> > + ce[1].lo = le64_to_cpu(ce[1].lo);
> > + ce[1].hi = le64_to_cpu(ce[1].hi);
> > + }
> > +
> > return 0;
> > }
> >
> > @@ -595,9 +614,11 @@ static inline uint32_t vtd_get_agaw_from_context_entry(VTDContextEntry *ce)
> > return 30 + (ce->hi & VTD_CONTEXT_ENTRY_AW) * 9;
> > }
> >
> > -static inline uint32_t vtd_ce_get_type(VTDContextEntry *ce)
> > +static inline uint32_t vtd_ce_get_type(IntelIOMMUState *s,
> > + VTDContextEntry *ce)
> > {
> > - return ce->lo & VTD_CONTEXT_ENTRY_TT;
> > + return s->ecs ? (ce->lo & VTD_CONTEXT_ENTRY_TT) :
> > + (ce->lo & VTD_EXT_CONTEXT_ENTRY_TT);
> > }
> >
> > static inline uint64_t vtd_iova_limit(VTDContextEntry *ce)
> > @@ -842,16 +863,20 @@ static int vtd_dev_to_context_entry(IntelIOMMUState *s, uint8_t bus_num,
> > return ret_fr;
> > }
> >
> > - if (!vtd_root_entry_present(&re)) {
> > + if (!vtd_root_entry_present(&re) ||
> > + (s->ecs && (devfn > 0x7f) && (!vtd_root_entry_upper_present(&re)))) {
> > /* Not error - it's okay we don't have root entry. */
> > trace_vtd_re_not_present(bus_num);
> > return -VTD_FR_ROOT_ENTRY_P;
> > - } else if (re.rsvd || (re.val & VTD_ROOT_ENTRY_RSVD)) {
> > - trace_vtd_re_invalid(re.rsvd, re.val);
> > - return -VTD_FR_ROOT_ENTRY_RSVD;
> > + }
> > + if ((s->ecs && (devfn > 0x7f) && (re.rsvd & VTD_ROOT_ENTRY_RSVD)) ||
> > + (s->ecs && (devfn < 0x80) && (re.val & VTD_ROOT_ENTRY_RSVD)) ||
> > + ((!s->ecs) && (re.rsvd || (re.val & VTD_ROOT_ENTRY_RSVD)))) {
> > + trace_vtd_re_invalid(re.rsvd, re.val);
> > + return -VTD_FR_ROOT_ENTRY_RSVD;
>
> Nit: I feel like we can better wrap these 0x7f and 0x80 into helper
> functions, especially if with above structure change...
yep, would add helper function.
> (will hold here...)
>
> Thanks,
>
> --
> Peter Xu
>
WARNING: multiple messages have this Message-ID (diff)
From: "Liu, Yi L" <yi.l.liu@linux.intel.com>
To: Peter Xu <peterx@redhat.com>
Cc: tianyu.lan@intel.com, kevin.tian@intel.com, yi.l.liu@intel.com,
ashok.raj@intel.com, kvm@vger.kernel.org,
jean-philippe.brucker@arm.com, jasowang@redhat.com,
iommu@lists.linux-foundation.org, qemu-devel@nongnu.org,
alex.williamson@redhat.com, jacob.jun.pan@intel.com
Subject: Re: [Qemu-devel] [RFC PATCH 02/20] intel_iommu: exposed extended-context mode to guest
Date: Fri, 28 Apr 2017 17:55:26 +0800 [thread overview]
Message-ID: <20170428095526.GC15484@sky-dev> (raw)
In-Reply-To: <20170427103221.GD1542@pxdev.xzpeter.org>
On Thu, Apr 27, 2017 at 06:32:21PM +0800, Peter Xu wrote:
> On Wed, Apr 26, 2017 at 06:06:32PM +0800, Liu, Yi L wrote:
> > VT-d implementations reporting PASID or PRS fields as "Set", must also
> > report ecap.ECS as "Set". Extended-Context is required for SVM.
> >
> > When ECS is reported, intel iommu driver would initiate extended root entry
> > and extended context entry, and also PASID table if there is any SVM capable
> > device.
> >
> > Signed-off-by: Liu, Yi L <yi.l.liu@linux.intel.com>
> > ---
> > hw/i386/intel_iommu.c | 131 +++++++++++++++++++++++++++--------------
> > hw/i386/intel_iommu_internal.h | 9 +++
> > include/hw/i386/intel_iommu.h | 2 +-
> > 3 files changed, 97 insertions(+), 45 deletions(-)
> >
> > diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
> > index 400d0d1..bf98fa5 100644
> > --- a/hw/i386/intel_iommu.c
> > +++ b/hw/i386/intel_iommu.c
> > @@ -497,6 +497,11 @@ static inline bool vtd_root_entry_present(VTDRootEntry *root)
> > return root->val & VTD_ROOT_ENTRY_P;
> > }
> >
> > +static inline bool vtd_root_entry_upper_present(VTDRootEntry *root)
> > +{
> > + return root->rsvd & VTD_ROOT_ENTRY_P;
> > +}
> > +
> > static int vtd_get_root_entry(IntelIOMMUState *s, uint8_t index,
> > VTDRootEntry *re)
> > {
> > @@ -509,6 +514,9 @@ static int vtd_get_root_entry(IntelIOMMUState *s, uint8_t index,
> > return -VTD_FR_ROOT_TABLE_INV;
> > }
> > re->val = le64_to_cpu(re->val);
> > + if (s->ecs) {
> > + re->rsvd = le64_to_cpu(re->rsvd);
> > + }
>
> I feel it slightly hacky to play with re->rsvd. How about:
>
> union VTDRootEntry {
> struct {
> uint64_t val;
> uint64_t rsvd;
> } base;
> struct {
> uint64_t ext_lo;
> uint64_t ext_hi;
> } extended;
> };
Agree.
> (Or any better way that can get rid of rsvd...)
>
> Even:
>
> struct VTDRootEntry {
> union {
> struct {
> uint64_t val;
> uint64_t rsvd;
> } base;
> struct {
> uint64_t ext_lo;
> uint64_t ext_hi;
> } extended;
> } data;
> bool extended;
> };
>
> Then we read the entry into data, and setup extended bit. A benefit of
> it is that we may avoid passing around IntelIOMMUState everywhere to
> know whether we are using extended context entries.
For this proposal, it's combining the s->ecs bit and root entry. But it
may mislead future maintainer as it uses VTDRootEntry. maybe name it
differently.
> > return 0;
> > }
> >
> > @@ -517,19 +525,30 @@ static inline bool vtd_context_entry_present(VTDContextEntry *context)
> > return context->lo & VTD_CONTEXT_ENTRY_P;
> > }
> >
> > -static int vtd_get_context_entry_from_root(VTDRootEntry *root, uint8_t index,
> > - VTDContextEntry *ce)
> > +static int vtd_get_context_entry_from_root(IntelIOMMUState *s,
> > + VTDRootEntry *root, uint8_t index, VTDContextEntry *ce)
> > {
> > - dma_addr_t addr;
> > + dma_addr_t addr, ce_size;
> >
> > /* we have checked that root entry is present */
> > - addr = (root->val & VTD_ROOT_ENTRY_CTP) + index * sizeof(*ce);
> > - if (dma_memory_read(&address_space_memory, addr, ce, sizeof(*ce))) {
> > + ce_size = (s->ecs) ? (2 * sizeof(*ce)) : (sizeof(*ce));
> > + addr = (s->ecs && (index > 0x7f)) ?
> > + ((root->rsvd & VTD_ROOT_ENTRY_CTP) + (index - 0x80) * ce_size) :
> > + ((root->val & VTD_ROOT_ENTRY_CTP) + index * ce_size);
> > +
> > + if (dma_memory_read(&address_space_memory, addr, ce, ce_size)) {
> > trace_vtd_re_invalid(root->rsvd, root->val);
> > return -VTD_FR_CONTEXT_TABLE_INV;
> > }
> > - ce->lo = le64_to_cpu(ce->lo);
> > - ce->hi = le64_to_cpu(ce->hi);
> > +
> > + ce[0].lo = le64_to_cpu(ce[0].lo);
> > + ce[0].hi = le64_to_cpu(ce[0].hi);
>
> Again, I feel this even hackier. :)
>
> I would slightly prefer to play the same union trick to context
> entries, just like what I proposed to the root entries above...
would think about it.
> > +
> > + if (s->ecs) {
> > + ce[1].lo = le64_to_cpu(ce[1].lo);
> > + ce[1].hi = le64_to_cpu(ce[1].hi);
> > + }
> > +
> > return 0;
> > }
> >
> > @@ -595,9 +614,11 @@ static inline uint32_t vtd_get_agaw_from_context_entry(VTDContextEntry *ce)
> > return 30 + (ce->hi & VTD_CONTEXT_ENTRY_AW) * 9;
> > }
> >
> > -static inline uint32_t vtd_ce_get_type(VTDContextEntry *ce)
> > +static inline uint32_t vtd_ce_get_type(IntelIOMMUState *s,
> > + VTDContextEntry *ce)
> > {
> > - return ce->lo & VTD_CONTEXT_ENTRY_TT;
> > + return s->ecs ? (ce->lo & VTD_CONTEXT_ENTRY_TT) :
> > + (ce->lo & VTD_EXT_CONTEXT_ENTRY_TT);
> > }
> >
> > static inline uint64_t vtd_iova_limit(VTDContextEntry *ce)
> > @@ -842,16 +863,20 @@ static int vtd_dev_to_context_entry(IntelIOMMUState *s, uint8_t bus_num,
> > return ret_fr;
> > }
> >
> > - if (!vtd_root_entry_present(&re)) {
> > + if (!vtd_root_entry_present(&re) ||
> > + (s->ecs && (devfn > 0x7f) && (!vtd_root_entry_upper_present(&re)))) {
> > /* Not error - it's okay we don't have root entry. */
> > trace_vtd_re_not_present(bus_num);
> > return -VTD_FR_ROOT_ENTRY_P;
> > - } else if (re.rsvd || (re.val & VTD_ROOT_ENTRY_RSVD)) {
> > - trace_vtd_re_invalid(re.rsvd, re.val);
> > - return -VTD_FR_ROOT_ENTRY_RSVD;
> > + }
> > + if ((s->ecs && (devfn > 0x7f) && (re.rsvd & VTD_ROOT_ENTRY_RSVD)) ||
> > + (s->ecs && (devfn < 0x80) && (re.val & VTD_ROOT_ENTRY_RSVD)) ||
> > + ((!s->ecs) && (re.rsvd || (re.val & VTD_ROOT_ENTRY_RSVD)))) {
> > + trace_vtd_re_invalid(re.rsvd, re.val);
> > + return -VTD_FR_ROOT_ENTRY_RSVD;
>
> Nit: I feel like we can better wrap these 0x7f and 0x80 into helper
> functions, especially if with above structure change...
yep, would add helper function.
> (will hold here...)
>
> Thanks,
>
> --
> Peter Xu
>
next prev parent reply other threads:[~2017-04-28 9:55 UTC|newest]
Thread overview: 81+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-04-26 10:06 [RFC PATCH 00/20] Qemu: Extend intel_iommu emulator to support Shared Virtual Memory Liu, Yi L
2017-04-26 10:06 ` [Qemu-devel] " Liu, Yi L
2017-04-26 10:06 ` [RFC PATCH 01/20] intel_iommu: add "ecs" option Liu, Yi L
2017-04-26 10:06 ` [Qemu-devel] " Liu, Yi L
2017-04-26 10:06 ` [RFC PATCH 02/20] intel_iommu: exposed extended-context mode to guest Liu, Yi L
2017-04-26 10:06 ` [Qemu-devel] " Liu, Yi L
[not found] ` <1493201210-14357-3-git-send-email-yi.l.liu-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
2017-04-27 10:32 ` Peter Xu
2017-04-27 10:32 ` [Qemu-devel] " Peter Xu
2017-04-28 6:00 ` Lan Tianyu
2017-04-28 6:00 ` [Qemu-devel] " Lan Tianyu
[not found] ` <a7cd779f-2cd6-3a3f-7e73-e79a49c48961-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
2017-04-28 9:56 ` Liu, Yi L
2017-04-28 9:56 ` [Qemu-devel] " Liu, Yi L
[not found] ` <20170427103221.GD1542-QJIicYCqamqhazCxEpVPD9i2O/JbrIOy@public.gmane.org>
2017-04-28 9:55 ` Liu, Yi L [this message]
2017-04-28 9:55 ` Liu, Yi L
2017-04-26 10:06 ` [RFC PATCH 03/20] intel_iommu: add "svm" option Liu, Yi L
2017-04-26 10:06 ` [Qemu-devel] " Liu, Yi L
[not found] ` <1493201210-14357-4-git-send-email-yi.l.liu-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
2017-04-27 10:53 ` Peter Xu
2017-04-27 10:53 ` [Qemu-devel] " Peter Xu
[not found] ` <20170427105317.GE1542-QJIicYCqamqhazCxEpVPD9i2O/JbrIOy@public.gmane.org>
2017-05-04 20:28 ` Alex Williamson
2017-05-04 20:28 ` [Qemu-devel] " Alex Williamson
[not found] ` <20170504142853.1537028c-1yVPhWWZRC1BDLzU/O5InQ@public.gmane.org>
2017-05-04 20:37 ` Raj, Ashok
2017-05-04 20:37 ` [Qemu-devel] " Raj, Ashok
2017-05-08 10:38 ` Liu, Yi L
2017-05-08 10:38 ` [Qemu-devel] " Liu, Yi L
[not found] ` <A2975661238FB949B60364EF0F2C25743906890D-E2R4CRU6q/6iAffOGbnezLfspsVTdybXVpNB7YpNyf8@public.gmane.org>
2017-05-08 11:20 ` Peter Xu
2017-05-08 11:20 ` [Qemu-devel] " Peter Xu
[not found] ` <20170508112034.GE2820-QJIicYCqamqhazCxEpVPD9i2O/JbrIOy@public.gmane.org>
2017-05-08 8:15 ` Liu, Yi L
2017-05-08 8:15 ` Liu, Yi L
2017-04-26 10:06 ` [RFC PATCH 04/20] Memory: modify parameter in IOMMUNotifier func Liu, Yi L
2017-04-26 10:06 ` [Qemu-devel] " Liu, Yi L
2017-04-26 10:06 ` [RFC PATCH 05/20] VFIO: add new IOCTL for svm bind tasks Liu, Yi L
2017-04-26 10:06 ` [Qemu-devel] " Liu, Yi L
2017-04-26 10:06 ` [RFC PATCH 06/20] VFIO: add new notifier for binding PASID table Liu, Yi L
2017-04-26 10:06 ` [Qemu-devel] " Liu, Yi L
2017-04-26 10:06 ` [RFC PATCH 07/20] VFIO: check notifier flag in region_del() Liu, Yi L
2017-04-26 10:06 ` [Qemu-devel] " Liu, Yi L
2017-04-26 10:06 ` [RFC PATCH 08/20] Memory: add notifier flag check in memory_replay() Liu, Yi L
2017-04-26 10:06 ` [Qemu-devel] " Liu, Yi L
2017-04-26 10:06 ` [RFC PATCH 09/20] Memory: introduce iommu_ops->record_device Liu, Yi L
2017-04-26 10:06 ` [Qemu-devel] " Liu, Yi L
[not found] ` <1493201210-14357-10-git-send-email-yi.l.liu-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
2017-04-28 6:46 ` Lan Tianyu
2017-04-28 6:46 ` [Qemu-devel] " Lan Tianyu
2017-05-19 5:23 ` Liu, Yi L
2017-05-19 5:23 ` Liu, Yi L
2017-05-19 5:23 ` Liu, Yi L
2017-05-19 9:07 ` Tian, Kevin
2017-05-19 9:07 ` Tian, Kevin
2017-05-19 9:35 ` Liu, Yi L
2017-04-26 10:06 ` [RFC PATCH 10/20] VFIO: notify vIOMMU emulator when device is assigned Liu, Yi L
2017-04-26 10:06 ` [Qemu-devel] " Liu, Yi L
2017-04-26 10:06 ` [RFC PATCH 11/20] intel_iommu: provide iommu_ops->record_device Liu, Yi L
2017-04-26 10:06 ` [Qemu-devel] " Liu, Yi L
2017-04-26 10:06 ` [RFC PATCH 12/20] Memory: Add func to fire pasidt_bind notifier Liu, Yi L
2017-04-26 10:06 ` [Qemu-devel] " Liu, Yi L
[not found] ` <1493201210-14357-13-git-send-email-yi.l.liu-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
2017-04-26 13:50 ` Paolo Bonzini
2017-04-26 13:50 ` [Qemu-devel] " Paolo Bonzini
2017-04-27 2:37 ` Liu, Yi L
2017-04-27 6:14 ` Peter Xu
2017-04-27 6:14 ` Peter Xu
2017-04-27 10:09 ` Peter Xu
[not found] ` <20170427061427.GA1542-QJIicYCqamqhazCxEpVPD9i2O/JbrIOy@public.gmane.org>
2017-04-27 10:25 ` Liu, Yi L
2017-04-27 10:25 ` Liu, Yi L
2017-04-27 10:51 ` Peter Xu
2017-04-26 10:06 ` [RFC PATCH 13/20] IOMMU: add pasid_table_info for guest pasid table Liu, Yi L
2017-04-26 10:06 ` [Qemu-devel] " Liu, Yi L
2017-04-26 10:06 ` [RFC PATCH 14/20] intel_iommu: add FOR_EACH_ASSIGN_DEVICE macro Liu, Yi L
2017-04-26 10:06 ` [Qemu-devel] " Liu, Yi L
[not found] ` <1493201210-14357-15-git-send-email-yi.l.liu-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
2017-04-28 7:33 ` Lan Tianyu
2017-04-28 7:33 ` [Qemu-devel] " Lan Tianyu
2017-04-26 10:06 ` [RFC PATCH 15/20] intel_iommu: link whole guest pasid table to host Liu, Yi L
2017-04-26 10:06 ` [Qemu-devel] " Liu, Yi L
2017-04-26 10:06 ` [RFC PATCH 16/20] VFIO: Add notifier for propagating IOMMU TLB invalidate Liu, Yi L
2017-04-26 10:06 ` [Qemu-devel] " Liu, Yi L
2017-04-26 10:06 ` [RFC PATCH 17/20] Memory: Add func to fire TLB invalidate notifier Liu, Yi L
2017-04-26 10:06 ` [Qemu-devel] " Liu, Yi L
2017-04-26 10:06 ` [RFC PATCH 18/20] intel_iommu: propagate Extended-IOTLB invalidate to host Liu, Yi L
2017-04-26 10:06 ` [Qemu-devel] " Liu, Yi L
2017-04-26 10:06 ` [RFC PATCH 19/20] intel_iommu: propagate PASID-Cache " Liu, Yi L
2017-04-26 10:06 ` [Qemu-devel] " Liu, Yi L
2017-04-26 10:06 ` [RFC PATCH 20/20] intel_iommu: propagate Ext-Device-TLB " Liu, Yi L
2017-04-26 10:06 ` [Qemu-devel] " Liu, Yi L
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