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* [PATCH] gpu: drm: amd: amdgpu: remove dead code
@ 2017-05-08 16:41 Gustavo A. R. Silva
  2017-05-09 11:27   ` Christian König
  0 siblings, 1 reply; 7+ messages in thread
From: Gustavo A. R. Silva @ 2017-05-08 16:41 UTC (permalink / raw)
  To: Alex Deucher, Christian König, David Airlie, Tom St Denis,
	Chunming Zhou, Monk Liu, Huang Rui
  Cc: amd-gfx, dri-devel, linux-kernel, Gustavo A. R. Silva,
	Peter Senna Tschudin

Local variable use_doorbell is assigned to a constant value and it is never
updated again. Remove this variable and the dead code it guards.

Addresses-Coverity-ID: 1401837
Signed-off-by: Gustavo A. R. Silva <garsilva@embeddedor.com>
---
 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 20 ++++++--------------
 1 file changed, 6 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
index 1f93545..27ea28f 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
@@ -2936,7 +2936,6 @@ static int gfx_v7_0_cp_compute_resume(struct amdgpu_device *adev)
 {
 	int r, i, j;
 	u32 tmp;
-	bool use_doorbell = true;
 	u64 hqd_gpu_addr;
 	u64 mqd_gpu_addr;
 	u64 eop_gpu_addr;
@@ -3034,10 +3033,7 @@ static int gfx_v7_0_cp_compute_resume(struct amdgpu_device *adev)
 		/* enable doorbell? */
 		mqd->queue_state.cp_hqd_pq_doorbell_control =
 			RREG32(mmCP_HQD_PQ_DOORBELL_CONTROL);
-		if (use_doorbell)
-			mqd->queue_state.cp_hqd_pq_doorbell_control |= CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_EN_MASK;
-		else
-			mqd->queue_state.cp_hqd_pq_doorbell_control &= ~CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_EN_MASK;
+		mqd->queue_state.cp_hqd_pq_doorbell_control |= CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_EN_MASK;
 		WREG32(mmCP_HQD_PQ_DOORBELL_CONTROL,
 		       mqd->queue_state.cp_hqd_pq_doorbell_control);
 
@@ -3116,23 +3112,19 @@ static int gfx_v7_0_cp_compute_resume(struct amdgpu_device *adev)
 		       mqd->queue_state.cp_hqd_pq_rptr_report_addr_hi);
 
 		/* enable the doorbell if requested */
-		if (use_doorbell) {
-			mqd->queue_state.cp_hqd_pq_doorbell_control =
+		mqd->queue_state.cp_hqd_pq_doorbell_control =
 				RREG32(mmCP_HQD_PQ_DOORBELL_CONTROL);
-			mqd->queue_state.cp_hqd_pq_doorbell_control &=
+		mqd->queue_state.cp_hqd_pq_doorbell_control &=
 				~CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_OFFSET_MASK;
-			mqd->queue_state.cp_hqd_pq_doorbell_control |=
+		mqd->queue_state.cp_hqd_pq_doorbell_control |=
 				(ring->doorbell_index <<
 				 CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_OFFSET__SHIFT);
-			mqd->queue_state.cp_hqd_pq_doorbell_control |=
+		mqd->queue_state.cp_hqd_pq_doorbell_control |=
 				CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_EN_MASK;
-			mqd->queue_state.cp_hqd_pq_doorbell_control &=
+		mqd->queue_state.cp_hqd_pq_doorbell_control &=
 				~(CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_SOURCE_MASK |
 				CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_HIT_MASK);
 
-		} else {
-			mqd->queue_state.cp_hqd_pq_doorbell_control = 0;
-		}
 		WREG32(mmCP_HQD_PQ_DOORBELL_CONTROL,
 		       mqd->queue_state.cp_hqd_pq_doorbell_control);
 
-- 
2.5.0

^ permalink raw reply related	[flat|nested] 7+ messages in thread

* [PATCH] gpu: drm: amd: amdgpu: remove dead code
@ 2017-05-08 17:01 Gustavo A. R. Silva
  2017-05-09 12:53   ` Alex Deucher
  0 siblings, 1 reply; 7+ messages in thread
From: Gustavo A. R. Silva @ 2017-05-08 17:01 UTC (permalink / raw)
  To: Alex Deucher, Christian König, David Airlie, Tom St Denis,
	Monk Liu, Rex Zhu, Xiangliang Yu, Huang Rui
  Cc: amd-gfx, dri-devel, linux-kernel, Gustavo A. R. Silva,
	Peter Senna Tschudin

Local variable use_doorbell is assigned to a constant value and it is never
updated again. Remove this variable and the dead code it guards.

Addresses-Coverity-ID: 1401828
Signed-off-by: Gustavo A. R. Silva <garsilva@embeddedor.com>
---
 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 53 +++++++++++++----------------------
 1 file changed, 20 insertions(+), 33 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index 67afc90..e824c2b 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -4991,7 +4991,6 @@ static int gfx_v8_0_cp_compute_resume(struct amdgpu_device *adev)
 {
 	int r, i, j;
 	u32 tmp;
-	bool use_doorbell = true;
 	u64 hqd_gpu_addr;
 	u64 mqd_gpu_addr;
 	u64 eop_gpu_addr;
@@ -5079,11 +5078,7 @@ static int gfx_v8_0_cp_compute_resume(struct amdgpu_device *adev)
 
 		/* enable doorbell? */
 		tmp = RREG32(mmCP_HQD_PQ_DOORBELL_CONTROL);
-		if (use_doorbell) {
-			tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_EN, 1);
-		} else {
-			tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_EN, 0);
-		}
+		tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_EN, 1);
 		WREG32(mmCP_HQD_PQ_DOORBELL_CONTROL, tmp);
 		mqd->cp_hqd_pq_doorbell_control = tmp;
 
@@ -5157,29 +5152,23 @@ static int gfx_v8_0_cp_compute_resume(struct amdgpu_device *adev)
 		       mqd->cp_hqd_pq_wptr_poll_addr_hi);
 
 		/* enable the doorbell if requested */
-		if (use_doorbell) {
-			if ((adev->asic_type == CHIP_CARRIZO) ||
-			    (adev->asic_type == CHIP_FIJI) ||
-			    (adev->asic_type == CHIP_STONEY) ||
-			    (adev->asic_type == CHIP_POLARIS11) ||
-			    (adev->asic_type == CHIP_POLARIS10) ||
-			    (adev->asic_type == CHIP_POLARIS12)) {
-				WREG32(mmCP_MEC_DOORBELL_RANGE_LOWER,
-				       AMDGPU_DOORBELL_KIQ << 2);
-				WREG32(mmCP_MEC_DOORBELL_RANGE_UPPER,
-				       AMDGPU_DOORBELL_MEC_RING7 << 2);
-			}
-			tmp = RREG32(mmCP_HQD_PQ_DOORBELL_CONTROL);
-			tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,
-					    DOORBELL_OFFSET, ring->doorbell_index);
-			tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_EN, 1);
-			tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_SOURCE, 0);
-			tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_HIT, 0);
-			mqd->cp_hqd_pq_doorbell_control = tmp;
-
-		} else {
-			mqd->cp_hqd_pq_doorbell_control = 0;
+		if ((adev->asic_type == CHIP_CARRIZO) ||
+		    (adev->asic_type == CHIP_FIJI) ||
+		    (adev->asic_type == CHIP_STONEY) ||
+		    (adev->asic_type == CHIP_POLARIS11) ||
+		    (adev->asic_type == CHIP_POLARIS10) ||
+		    (adev->asic_type == CHIP_POLARIS12)) {
+			WREG32(mmCP_MEC_DOORBELL_RANGE_LOWER, AMDGPU_DOORBELL_KIQ << 2);
+			WREG32(mmCP_MEC_DOORBELL_RANGE_UPPER, AMDGPU_DOORBELL_MEC_RING7 << 2);
 		}
+		tmp = RREG32(mmCP_HQD_PQ_DOORBELL_CONTROL);
+		tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,
+				   DOORBELL_OFFSET, ring->doorbell_index);
+		tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_EN, 1);
+		tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_SOURCE, 0);
+		tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_HIT, 0);
+		mqd->cp_hqd_pq_doorbell_control = tmp;
+
 		WREG32(mmCP_HQD_PQ_DOORBELL_CONTROL,
 		       mqd->cp_hqd_pq_doorbell_control);
 
@@ -5217,11 +5206,9 @@ static int gfx_v8_0_cp_compute_resume(struct amdgpu_device *adev)
 		amdgpu_bo_unreserve(ring->mqd_obj);
 	}
 
-	if (use_doorbell) {
-		tmp = RREG32(mmCP_PQ_STATUS);
-		tmp = REG_SET_FIELD(tmp, CP_PQ_STATUS, DOORBELL_ENABLE, 1);
-		WREG32(mmCP_PQ_STATUS, tmp);
-	}
+	tmp = RREG32(mmCP_PQ_STATUS);
+	tmp = REG_SET_FIELD(tmp, CP_PQ_STATUS, DOORBELL_ENABLE, 1);
+	WREG32(mmCP_PQ_STATUS, tmp);
 
 	gfx_v8_0_cp_compute_enable(adev, true);
 
-- 
2.5.0

^ permalink raw reply related	[flat|nested] 7+ messages in thread

* Re: [PATCH] gpu: drm: amd: amdgpu: remove dead code
  2017-05-08 16:41 [PATCH] gpu: drm: amd: amdgpu: remove dead code Gustavo A. R. Silva
@ 2017-05-09 11:27   ` Christian König
  0 siblings, 0 replies; 7+ messages in thread
From: Christian König @ 2017-05-09 11:27 UTC (permalink / raw)
  To: Gustavo A. R. Silva, Alex Deucher, David Airlie, Tom St Denis,
	Chunming Zhou, Monk Liu, Huang Rui
  Cc: Peter Senna Tschudin, dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW,
	amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA

Am 08.05.2017 um 18:41 schrieb Gustavo A. R. Silva:
> Local variable use_doorbell is assigned to a constant value and it is never
> updated again. Remove this variable and the dead code it guards.
>
> Addresses-Coverity-ID: 1401837
> Signed-off-by: Gustavo A. R. Silva <garsilva@embeddedor.com>

Acked-by: Christian König <christian.koenig@amd.com> for this one and 
the same patch for gfx_v8.

> ---
>   drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 20 ++++++--------------
>   1 file changed, 6 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
> index 1f93545..27ea28f 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
> @@ -2936,7 +2936,6 @@ static int gfx_v7_0_cp_compute_resume(struct amdgpu_device *adev)
>   {
>   	int r, i, j;
>   	u32 tmp;
> -	bool use_doorbell = true;
>   	u64 hqd_gpu_addr;
>   	u64 mqd_gpu_addr;
>   	u64 eop_gpu_addr;
> @@ -3034,10 +3033,7 @@ static int gfx_v7_0_cp_compute_resume(struct amdgpu_device *adev)
>   		/* enable doorbell? */
>   		mqd->queue_state.cp_hqd_pq_doorbell_control =
>   			RREG32(mmCP_HQD_PQ_DOORBELL_CONTROL);
> -		if (use_doorbell)
> -			mqd->queue_state.cp_hqd_pq_doorbell_control |= CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_EN_MASK;
> -		else
> -			mqd->queue_state.cp_hqd_pq_doorbell_control &= ~CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_EN_MASK;
> +		mqd->queue_state.cp_hqd_pq_doorbell_control |= CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_EN_MASK;
>   		WREG32(mmCP_HQD_PQ_DOORBELL_CONTROL,
>   		       mqd->queue_state.cp_hqd_pq_doorbell_control);
>   
> @@ -3116,23 +3112,19 @@ static int gfx_v7_0_cp_compute_resume(struct amdgpu_device *adev)
>   		       mqd->queue_state.cp_hqd_pq_rptr_report_addr_hi);
>   
>   		/* enable the doorbell if requested */
> -		if (use_doorbell) {
> -			mqd->queue_state.cp_hqd_pq_doorbell_control =
> +		mqd->queue_state.cp_hqd_pq_doorbell_control =
>   				RREG32(mmCP_HQD_PQ_DOORBELL_CONTROL);
> -			mqd->queue_state.cp_hqd_pq_doorbell_control &=
> +		mqd->queue_state.cp_hqd_pq_doorbell_control &=
>   				~CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_OFFSET_MASK;
> -			mqd->queue_state.cp_hqd_pq_doorbell_control |=
> +		mqd->queue_state.cp_hqd_pq_doorbell_control |=
>   				(ring->doorbell_index <<
>   				 CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_OFFSET__SHIFT);
> -			mqd->queue_state.cp_hqd_pq_doorbell_control |=
> +		mqd->queue_state.cp_hqd_pq_doorbell_control |=
>   				CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_EN_MASK;
> -			mqd->queue_state.cp_hqd_pq_doorbell_control &=
> +		mqd->queue_state.cp_hqd_pq_doorbell_control &=
>   				~(CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_SOURCE_MASK |
>   				CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_HIT_MASK);
>   
> -		} else {
> -			mqd->queue_state.cp_hqd_pq_doorbell_control = 0;
> -		}
>   		WREG32(mmCP_HQD_PQ_DOORBELL_CONTROL,
>   		       mqd->queue_state.cp_hqd_pq_doorbell_control);
>   


_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH] gpu: drm: amd: amdgpu: remove dead code
@ 2017-05-09 11:27   ` Christian König
  0 siblings, 0 replies; 7+ messages in thread
From: Christian König @ 2017-05-09 11:27 UTC (permalink / raw)
  To: Gustavo A. R. Silva, Alex Deucher, David Airlie, Tom St Denis,
	Chunming Zhou, Monk Liu, Huang Rui
  Cc: amd-gfx, dri-devel, linux-kernel, Peter Senna Tschudin

Am 08.05.2017 um 18:41 schrieb Gustavo A. R. Silva:
> Local variable use_doorbell is assigned to a constant value and it is never
> updated again. Remove this variable and the dead code it guards.
>
> Addresses-Coverity-ID: 1401837
> Signed-off-by: Gustavo A. R. Silva <garsilva@embeddedor.com>

Acked-by: Christian König <christian.koenig@amd.com> for this one and 
the same patch for gfx_v8.

> ---
>   drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 20 ++++++--------------
>   1 file changed, 6 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
> index 1f93545..27ea28f 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
> @@ -2936,7 +2936,6 @@ static int gfx_v7_0_cp_compute_resume(struct amdgpu_device *adev)
>   {
>   	int r, i, j;
>   	u32 tmp;
> -	bool use_doorbell = true;
>   	u64 hqd_gpu_addr;
>   	u64 mqd_gpu_addr;
>   	u64 eop_gpu_addr;
> @@ -3034,10 +3033,7 @@ static int gfx_v7_0_cp_compute_resume(struct amdgpu_device *adev)
>   		/* enable doorbell? */
>   		mqd->queue_state.cp_hqd_pq_doorbell_control =
>   			RREG32(mmCP_HQD_PQ_DOORBELL_CONTROL);
> -		if (use_doorbell)
> -			mqd->queue_state.cp_hqd_pq_doorbell_control |= CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_EN_MASK;
> -		else
> -			mqd->queue_state.cp_hqd_pq_doorbell_control &= ~CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_EN_MASK;
> +		mqd->queue_state.cp_hqd_pq_doorbell_control |= CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_EN_MASK;
>   		WREG32(mmCP_HQD_PQ_DOORBELL_CONTROL,
>   		       mqd->queue_state.cp_hqd_pq_doorbell_control);
>   
> @@ -3116,23 +3112,19 @@ static int gfx_v7_0_cp_compute_resume(struct amdgpu_device *adev)
>   		       mqd->queue_state.cp_hqd_pq_rptr_report_addr_hi);
>   
>   		/* enable the doorbell if requested */
> -		if (use_doorbell) {
> -			mqd->queue_state.cp_hqd_pq_doorbell_control =
> +		mqd->queue_state.cp_hqd_pq_doorbell_control =
>   				RREG32(mmCP_HQD_PQ_DOORBELL_CONTROL);
> -			mqd->queue_state.cp_hqd_pq_doorbell_control &=
> +		mqd->queue_state.cp_hqd_pq_doorbell_control &=
>   				~CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_OFFSET_MASK;
> -			mqd->queue_state.cp_hqd_pq_doorbell_control |=
> +		mqd->queue_state.cp_hqd_pq_doorbell_control |=
>   				(ring->doorbell_index <<
>   				 CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_OFFSET__SHIFT);
> -			mqd->queue_state.cp_hqd_pq_doorbell_control |=
> +		mqd->queue_state.cp_hqd_pq_doorbell_control |=
>   				CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_EN_MASK;
> -			mqd->queue_state.cp_hqd_pq_doorbell_control &=
> +		mqd->queue_state.cp_hqd_pq_doorbell_control &=
>   				~(CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_SOURCE_MASK |
>   				CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_HIT_MASK);
>   
> -		} else {
> -			mqd->queue_state.cp_hqd_pq_doorbell_control = 0;
> -		}
>   		WREG32(mmCP_HQD_PQ_DOORBELL_CONTROL,
>   		       mqd->queue_state.cp_hqd_pq_doorbell_control);
>   

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH] gpu: drm: amd: amdgpu: remove dead code
  2017-05-08 17:01 Gustavo A. R. Silva
@ 2017-05-09 12:53   ` Alex Deucher
  0 siblings, 0 replies; 7+ messages in thread
From: Alex Deucher @ 2017-05-09 12:53 UTC (permalink / raw)
  To: Gustavo A. R. Silva
  Cc: Tom St Denis, David Airlie, Peter Senna Tschudin, LKML,
	Maling list - DRI developers, Huang Rui, Xiangliang Yu,
	amd-gfx list, Alex Deucher, Rex Zhu, Christian König,
	Monk Liu

On Mon, May 8, 2017 at 1:01 PM, Gustavo A. R. Silva
<garsilva@embeddedor.com> wrote:
> Local variable use_doorbell is assigned to a constant value and it is never
> updated again. Remove this variable and the dead code it guards.
>
> Addresses-Coverity-ID: 1401828
> Signed-off-by: Gustavo A. R. Silva <garsilva@embeddedor.com>

This code is already removed in the latest code queued for the next
kernel for gfx8.  For gfx7, I think Andres' priority patch set fixes
this up for gfx7.

Alex

> ---
>  drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 53 +++++++++++++----------------------
>  1 file changed, 20 insertions(+), 33 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> index 67afc90..e824c2b 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> @@ -4991,7 +4991,6 @@ static int gfx_v8_0_cp_compute_resume(struct amdgpu_device *adev)
>  {
>         int r, i, j;
>         u32 tmp;
> -       bool use_doorbell = true;
>         u64 hqd_gpu_addr;
>         u64 mqd_gpu_addr;
>         u64 eop_gpu_addr;
> @@ -5079,11 +5078,7 @@ static int gfx_v8_0_cp_compute_resume(struct amdgpu_device *adev)
>
>                 /* enable doorbell? */
>                 tmp = RREG32(mmCP_HQD_PQ_DOORBELL_CONTROL);
> -               if (use_doorbell) {
> -                       tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_EN, 1);
> -               } else {
> -                       tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_EN, 0);
> -               }
> +               tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_EN, 1);
>                 WREG32(mmCP_HQD_PQ_DOORBELL_CONTROL, tmp);
>                 mqd->cp_hqd_pq_doorbell_control = tmp;
>
> @@ -5157,29 +5152,23 @@ static int gfx_v8_0_cp_compute_resume(struct amdgpu_device *adev)
>                        mqd->cp_hqd_pq_wptr_poll_addr_hi);
>
>                 /* enable the doorbell if requested */
> -               if (use_doorbell) {
> -                       if ((adev->asic_type == CHIP_CARRIZO) ||
> -                           (adev->asic_type == CHIP_FIJI) ||
> -                           (adev->asic_type == CHIP_STONEY) ||
> -                           (adev->asic_type == CHIP_POLARIS11) ||
> -                           (adev->asic_type == CHIP_POLARIS10) ||
> -                           (adev->asic_type == CHIP_POLARIS12)) {
> -                               WREG32(mmCP_MEC_DOORBELL_RANGE_LOWER,
> -                                      AMDGPU_DOORBELL_KIQ << 2);
> -                               WREG32(mmCP_MEC_DOORBELL_RANGE_UPPER,
> -                                      AMDGPU_DOORBELL_MEC_RING7 << 2);
> -                       }
> -                       tmp = RREG32(mmCP_HQD_PQ_DOORBELL_CONTROL);
> -                       tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,
> -                                           DOORBELL_OFFSET, ring->doorbell_index);
> -                       tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_EN, 1);
> -                       tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_SOURCE, 0);
> -                       tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_HIT, 0);
> -                       mqd->cp_hqd_pq_doorbell_control = tmp;
> -
> -               } else {
> -                       mqd->cp_hqd_pq_doorbell_control = 0;
> +               if ((adev->asic_type == CHIP_CARRIZO) ||
> +                   (adev->asic_type == CHIP_FIJI) ||
> +                   (adev->asic_type == CHIP_STONEY) ||
> +                   (adev->asic_type == CHIP_POLARIS11) ||
> +                   (adev->asic_type == CHIP_POLARIS10) ||
> +                   (adev->asic_type == CHIP_POLARIS12)) {
> +                       WREG32(mmCP_MEC_DOORBELL_RANGE_LOWER, AMDGPU_DOORBELL_KIQ << 2);
> +                       WREG32(mmCP_MEC_DOORBELL_RANGE_UPPER, AMDGPU_DOORBELL_MEC_RING7 << 2);
>                 }
> +               tmp = RREG32(mmCP_HQD_PQ_DOORBELL_CONTROL);
> +               tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,
> +                                  DOORBELL_OFFSET, ring->doorbell_index);
> +               tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_EN, 1);
> +               tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_SOURCE, 0);
> +               tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_HIT, 0);
> +               mqd->cp_hqd_pq_doorbell_control = tmp;
> +
>                 WREG32(mmCP_HQD_PQ_DOORBELL_CONTROL,
>                        mqd->cp_hqd_pq_doorbell_control);
>
> @@ -5217,11 +5206,9 @@ static int gfx_v8_0_cp_compute_resume(struct amdgpu_device *adev)
>                 amdgpu_bo_unreserve(ring->mqd_obj);
>         }
>
> -       if (use_doorbell) {
> -               tmp = RREG32(mmCP_PQ_STATUS);
> -               tmp = REG_SET_FIELD(tmp, CP_PQ_STATUS, DOORBELL_ENABLE, 1);
> -               WREG32(mmCP_PQ_STATUS, tmp);
> -       }
> +       tmp = RREG32(mmCP_PQ_STATUS);
> +       tmp = REG_SET_FIELD(tmp, CP_PQ_STATUS, DOORBELL_ENABLE, 1);
> +       WREG32(mmCP_PQ_STATUS, tmp);
>
>         gfx_v8_0_cp_compute_enable(adev, true);
>
> --
> 2.5.0
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH] gpu: drm: amd: amdgpu: remove dead code
@ 2017-05-09 12:53   ` Alex Deucher
  0 siblings, 0 replies; 7+ messages in thread
From: Alex Deucher @ 2017-05-09 12:53 UTC (permalink / raw)
  To: Gustavo A. R. Silva
  Cc: Alex Deucher, Christian König, David Airlie, Tom St Denis,
	Monk Liu, Rex Zhu, Xiangliang Yu, Huang Rui, Peter Senna Tschudin,
	Maling list - DRI developers, amd-gfx list, LKML

On Mon, May 8, 2017 at 1:01 PM, Gustavo A. R. Silva
<garsilva@embeddedor.com> wrote:
> Local variable use_doorbell is assigned to a constant value and it is never
> updated again. Remove this variable and the dead code it guards.
>
> Addresses-Coverity-ID: 1401828
> Signed-off-by: Gustavo A. R. Silva <garsilva@embeddedor.com>

This code is already removed in the latest code queued for the next
kernel for gfx8.  For gfx7, I think Andres' priority patch set fixes
this up for gfx7.

Alex

> ---
>  drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 53 +++++++++++++----------------------
>  1 file changed, 20 insertions(+), 33 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> index 67afc90..e824c2b 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> @@ -4991,7 +4991,6 @@ static int gfx_v8_0_cp_compute_resume(struct amdgpu_device *adev)
>  {
>         int r, i, j;
>         u32 tmp;
> -       bool use_doorbell = true;
>         u64 hqd_gpu_addr;
>         u64 mqd_gpu_addr;
>         u64 eop_gpu_addr;
> @@ -5079,11 +5078,7 @@ static int gfx_v8_0_cp_compute_resume(struct amdgpu_device *adev)
>
>                 /* enable doorbell? */
>                 tmp = RREG32(mmCP_HQD_PQ_DOORBELL_CONTROL);
> -               if (use_doorbell) {
> -                       tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_EN, 1);
> -               } else {
> -                       tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_EN, 0);
> -               }
> +               tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_EN, 1);
>                 WREG32(mmCP_HQD_PQ_DOORBELL_CONTROL, tmp);
>                 mqd->cp_hqd_pq_doorbell_control = tmp;
>
> @@ -5157,29 +5152,23 @@ static int gfx_v8_0_cp_compute_resume(struct amdgpu_device *adev)
>                        mqd->cp_hqd_pq_wptr_poll_addr_hi);
>
>                 /* enable the doorbell if requested */
> -               if (use_doorbell) {
> -                       if ((adev->asic_type == CHIP_CARRIZO) ||
> -                           (adev->asic_type == CHIP_FIJI) ||
> -                           (adev->asic_type == CHIP_STONEY) ||
> -                           (adev->asic_type == CHIP_POLARIS11) ||
> -                           (adev->asic_type == CHIP_POLARIS10) ||
> -                           (adev->asic_type == CHIP_POLARIS12)) {
> -                               WREG32(mmCP_MEC_DOORBELL_RANGE_LOWER,
> -                                      AMDGPU_DOORBELL_KIQ << 2);
> -                               WREG32(mmCP_MEC_DOORBELL_RANGE_UPPER,
> -                                      AMDGPU_DOORBELL_MEC_RING7 << 2);
> -                       }
> -                       tmp = RREG32(mmCP_HQD_PQ_DOORBELL_CONTROL);
> -                       tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,
> -                                           DOORBELL_OFFSET, ring->doorbell_index);
> -                       tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_EN, 1);
> -                       tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_SOURCE, 0);
> -                       tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_HIT, 0);
> -                       mqd->cp_hqd_pq_doorbell_control = tmp;
> -
> -               } else {
> -                       mqd->cp_hqd_pq_doorbell_control = 0;
> +               if ((adev->asic_type == CHIP_CARRIZO) ||
> +                   (adev->asic_type == CHIP_FIJI) ||
> +                   (adev->asic_type == CHIP_STONEY) ||
> +                   (adev->asic_type == CHIP_POLARIS11) ||
> +                   (adev->asic_type == CHIP_POLARIS10) ||
> +                   (adev->asic_type == CHIP_POLARIS12)) {
> +                       WREG32(mmCP_MEC_DOORBELL_RANGE_LOWER, AMDGPU_DOORBELL_KIQ << 2);
> +                       WREG32(mmCP_MEC_DOORBELL_RANGE_UPPER, AMDGPU_DOORBELL_MEC_RING7 << 2);
>                 }
> +               tmp = RREG32(mmCP_HQD_PQ_DOORBELL_CONTROL);
> +               tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,
> +                                  DOORBELL_OFFSET, ring->doorbell_index);
> +               tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_EN, 1);
> +               tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_SOURCE, 0);
> +               tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_HIT, 0);
> +               mqd->cp_hqd_pq_doorbell_control = tmp;
> +
>                 WREG32(mmCP_HQD_PQ_DOORBELL_CONTROL,
>                        mqd->cp_hqd_pq_doorbell_control);
>
> @@ -5217,11 +5206,9 @@ static int gfx_v8_0_cp_compute_resume(struct amdgpu_device *adev)
>                 amdgpu_bo_unreserve(ring->mqd_obj);
>         }
>
> -       if (use_doorbell) {
> -               tmp = RREG32(mmCP_PQ_STATUS);
> -               tmp = REG_SET_FIELD(tmp, CP_PQ_STATUS, DOORBELL_ENABLE, 1);
> -               WREG32(mmCP_PQ_STATUS, tmp);
> -       }
> +       tmp = RREG32(mmCP_PQ_STATUS);
> +       tmp = REG_SET_FIELD(tmp, CP_PQ_STATUS, DOORBELL_ENABLE, 1);
> +       WREG32(mmCP_PQ_STATUS, tmp);
>
>         gfx_v8_0_cp_compute_enable(adev, true);
>
> --
> 2.5.0
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH] gpu: drm: amd: amdgpu: remove dead code
  2017-05-09 12:53   ` Alex Deucher
  (?)
@ 2017-05-09 19:19   ` Andres Rodriguez
  -1 siblings, 0 replies; 7+ messages in thread
From: Andres Rodriguez @ 2017-05-09 19:19 UTC (permalink / raw)
  To: dri-devel



On 2017-05-09 08:53 AM, Alex Deucher wrote:
> On Mon, May 8, 2017 at 1:01 PM, Gustavo A. R. Silva
> <garsilva@embeddedor.com> wrote:
>> Local variable use_doorbell is assigned to a constant value and it is never
>> updated again. Remove this variable and the dead code it guards.
>>
>> Addresses-Coverity-ID: 1401828
>> Signed-off-by: Gustavo A. R. Silva <garsilva@embeddedor.com>
>
> This code is already removed in the latest code queued for the next
> kernel for gfx8.  For gfx7, I think Andres' priority patch set fixes
> this up for gfx7.

Yeah, on gfx7 it should use ring->use_doorbell instead of the hard-coded 
local variable.

Andres

>
> Alex
>
>> ---
>>  drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 53 +++++++++++++----------------------
>>  1 file changed, 20 insertions(+), 33 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
>> index 67afc90..e824c2b 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
>> @@ -4991,7 +4991,6 @@ static int gfx_v8_0_cp_compute_resume(struct amdgpu_device *adev)
>>  {
>>         int r, i, j;
>>         u32 tmp;
>> -       bool use_doorbell = true;
>>         u64 hqd_gpu_addr;
>>         u64 mqd_gpu_addr;
>>         u64 eop_gpu_addr;
>> @@ -5079,11 +5078,7 @@ static int gfx_v8_0_cp_compute_resume(struct amdgpu_device *adev)
>>
>>                 /* enable doorbell? */
>>                 tmp = RREG32(mmCP_HQD_PQ_DOORBELL_CONTROL);
>> -               if (use_doorbell) {
>> -                       tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_EN, 1);
>> -               } else {
>> -                       tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_EN, 0);
>> -               }
>> +               tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_EN, 1);
>>                 WREG32(mmCP_HQD_PQ_DOORBELL_CONTROL, tmp);
>>                 mqd->cp_hqd_pq_doorbell_control = tmp;
>>
>> @@ -5157,29 +5152,23 @@ static int gfx_v8_0_cp_compute_resume(struct amdgpu_device *adev)
>>                        mqd->cp_hqd_pq_wptr_poll_addr_hi);
>>
>>                 /* enable the doorbell if requested */
>> -               if (use_doorbell) {
>> -                       if ((adev->asic_type == CHIP_CARRIZO) ||
>> -                           (adev->asic_type == CHIP_FIJI) ||
>> -                           (adev->asic_type == CHIP_STONEY) ||
>> -                           (adev->asic_type == CHIP_POLARIS11) ||
>> -                           (adev->asic_type == CHIP_POLARIS10) ||
>> -                           (adev->asic_type == CHIP_POLARIS12)) {
>> -                               WREG32(mmCP_MEC_DOORBELL_RANGE_LOWER,
>> -                                      AMDGPU_DOORBELL_KIQ << 2);
>> -                               WREG32(mmCP_MEC_DOORBELL_RANGE_UPPER,
>> -                                      AMDGPU_DOORBELL_MEC_RING7 << 2);
>> -                       }
>> -                       tmp = RREG32(mmCP_HQD_PQ_DOORBELL_CONTROL);
>> -                       tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,
>> -                                           DOORBELL_OFFSET, ring->doorbell_index);
>> -                       tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_EN, 1);
>> -                       tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_SOURCE, 0);
>> -                       tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_HIT, 0);
>> -                       mqd->cp_hqd_pq_doorbell_control = tmp;
>> -
>> -               } else {
>> -                       mqd->cp_hqd_pq_doorbell_control = 0;
>> +               if ((adev->asic_type == CHIP_CARRIZO) ||
>> +                   (adev->asic_type == CHIP_FIJI) ||
>> +                   (adev->asic_type == CHIP_STONEY) ||
>> +                   (adev->asic_type == CHIP_POLARIS11) ||
>> +                   (adev->asic_type == CHIP_POLARIS10) ||
>> +                   (adev->asic_type == CHIP_POLARIS12)) {
>> +                       WREG32(mmCP_MEC_DOORBELL_RANGE_LOWER, AMDGPU_DOORBELL_KIQ << 2);
>> +                       WREG32(mmCP_MEC_DOORBELL_RANGE_UPPER, AMDGPU_DOORBELL_MEC_RING7 << 2);
>>                 }
>> +               tmp = RREG32(mmCP_HQD_PQ_DOORBELL_CONTROL);
>> +               tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL,
>> +                                  DOORBELL_OFFSET, ring->doorbell_index);
>> +               tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_EN, 1);
>> +               tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_SOURCE, 0);
>> +               tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_HIT, 0);
>> +               mqd->cp_hqd_pq_doorbell_control = tmp;
>> +
>>                 WREG32(mmCP_HQD_PQ_DOORBELL_CONTROL,
>>                        mqd->cp_hqd_pq_doorbell_control);
>>
>> @@ -5217,11 +5206,9 @@ static int gfx_v8_0_cp_compute_resume(struct amdgpu_device *adev)
>>                 amdgpu_bo_unreserve(ring->mqd_obj);
>>         }
>>
>> -       if (use_doorbell) {
>> -               tmp = RREG32(mmCP_PQ_STATUS);
>> -               tmp = REG_SET_FIELD(tmp, CP_PQ_STATUS, DOORBELL_ENABLE, 1);
>> -               WREG32(mmCP_PQ_STATUS, tmp);
>> -       }
>> +       tmp = RREG32(mmCP_PQ_STATUS);
>> +       tmp = REG_SET_FIELD(tmp, CP_PQ_STATUS, DOORBELL_ENABLE, 1);
>> +       WREG32(mmCP_PQ_STATUS, tmp);
>>
>>         gfx_v8_0_cp_compute_enable(adev, true);
>>
>> --
>> 2.5.0
>>
>> _______________________________________________
>> amd-gfx mailing list
>> amd-gfx@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel
>
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

^ permalink raw reply	[flat|nested] 7+ messages in thread

end of thread, other threads:[~2017-05-09 19:19 UTC | newest]

Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2017-05-08 16:41 [PATCH] gpu: drm: amd: amdgpu: remove dead code Gustavo A. R. Silva
2017-05-09 11:27 ` Christian König
2017-05-09 11:27   ` Christian König
  -- strict thread matches above, loose matches on Subject: below --
2017-05-08 17:01 Gustavo A. R. Silva
2017-05-09 12:53 ` Alex Deucher
2017-05-09 12:53   ` Alex Deucher
2017-05-09 19:19   ` Andres Rodriguez

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