* [PATCH 0/2] Disable and remove decoupled MMIO feature
@ 2017-05-23 21:58 kai.chen
2017-05-23 21:58 ` [PATCH 1/2] drm/i915: Disable decoupled MMIO kai.chen
` (3 more replies)
0 siblings, 4 replies; 9+ messages in thread
From: kai.chen @ 2017-05-23 21:58 UTC (permalink / raw)
To: intel-gfx
From: Kai Chen <kai.chen@intel.com>
In theory, decoupled mmio should require less cycles for single read/write
operation by avoiding frequent software forcewake. However, it turns out
this design not to be true on HW reality and not to provide any decoupling
benefit. It also introduces problems which cause failures in intel-gpu-tools
tests (gem), and also cause driver code and debugging more complex.
The patch set is organized as follows:
- Patch 1 is to disable decoupled MMIO. This patch can also be backported
to other shipped kernel as a quick fix.
- Patch 2 is to totally remove implemented decoupled MMIO code on top of
Patch 1.
Kai Chen (2):
drm/i915: Disable decoupled MMIO
drm/i915: Remove decoupled MMIO code
drivers/gpu/drm/i915/i915_drv.h | 3 -
drivers/gpu/drm/i915/i915_pci.c | 1 -
drivers/gpu/drm/i915/i915_reg.h | 7 --
drivers/gpu/drm/i915/intel_uncore.c | 126 ------------------------------------
4 files changed, 137 deletions(-)
--
2.9.3
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^ permalink raw reply [flat|nested] 9+ messages in thread* [PATCH 1/2] drm/i915: Disable decoupled MMIO 2017-05-23 21:58 [PATCH 0/2] Disable and remove decoupled MMIO feature kai.chen @ 2017-05-23 21:58 ` kai.chen 2017-05-24 9:06 ` Tvrtko Ursulin 2017-05-23 21:58 ` [PATCH 2/2] drm/i915: Remove decoupled MMIO code kai.chen ` (2 subsequent siblings) 3 siblings, 1 reply; 9+ messages in thread From: kai.chen @ 2017-05-23 21:58 UTC (permalink / raw) To: intel-gfx From: Kai Chen <kai.chen@intel.com> The decoupled MMIO feature doesn't work as intended by HW team. Enabling it with forcewake will only make debugging efforts more difficult, so let's disable it. Fixes: 85ee17ebeedd ("drm/i915/bxt: Broxton decoupled MMIO") Cc: Zhe Wang <zhe1.wang@intel.com> Cc: Praveen Paneri <praveen.paneri@intel.com> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: Daniel Vetter <daniel.vetter@intel.com> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: intel-gfx@lists.freedesktop.org Cc: <stable@vger.kernel.org> # v4.10+ Signed-off-by: Kai Chen <kai.chen@intel.com> --- drivers/gpu/drm/i915/i915_pci.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c index f80db2c..cf43dc1 100644 --- a/drivers/gpu/drm/i915/i915_pci.c +++ b/drivers/gpu/drm/i915/i915_pci.c @@ -385,7 +385,6 @@ static const struct intel_device_info intel_skylake_gt3_info = { .has_gmbus_irq = 1, \ .has_logical_ring_contexts = 1, \ .has_guc = 1, \ - .has_decoupled_mmio = 1, \ .has_aliasing_ppgtt = 1, \ .has_full_ppgtt = 1, \ .has_full_48bit_ppgtt = 1, \ -- 2.9.3 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH 1/2] drm/i915: Disable decoupled MMIO 2017-05-23 21:58 ` [PATCH 1/2] drm/i915: Disable decoupled MMIO kai.chen @ 2017-05-24 9:06 ` Tvrtko Ursulin 0 siblings, 0 replies; 9+ messages in thread From: Tvrtko Ursulin @ 2017-05-24 9:06 UTC (permalink / raw) To: kai.chen, intel-gfx On 23/05/2017 22:58, kai.chen@intel.com wrote: > From: Kai Chen <kai.chen@intel.com> > > The decoupled MMIO feature doesn't work as intended by HW team. Enabling > it with forcewake will only make debugging efforts more difficult, so > let's disable it. > > Fixes: 85ee17ebeedd ("drm/i915/bxt: Broxton decoupled MMIO") > Cc: Zhe Wang <zhe1.wang@intel.com> > Cc: Praveen Paneri <praveen.paneri@intel.com> > Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> > Cc: Daniel Vetter <daniel.vetter@intel.com> > Cc: Jani Nikula <jani.nikula@linux.intel.com> > Cc: intel-gfx@lists.freedesktop.org > Cc: <stable@vger.kernel.org> # v4.10+ > > Signed-off-by: Kai Chen <kai.chen@intel.com> > --- > drivers/gpu/drm/i915/i915_pci.c | 1 - > 1 file changed, 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c > index f80db2c..cf43dc1 100644 > --- a/drivers/gpu/drm/i915/i915_pci.c > +++ b/drivers/gpu/drm/i915/i915_pci.c > @@ -385,7 +385,6 @@ static const struct intel_device_info intel_skylake_gt3_info = { > .has_gmbus_irq = 1, \ > .has_logical_ring_contexts = 1, \ > .has_guc = 1, \ > - .has_decoupled_mmio = 1, \ > .has_aliasing_ppgtt = 1, \ > .has_full_ppgtt = 1, \ > .has_full_48bit_ppgtt = 1, \ > Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Regards, Tvrtko _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 2/2] drm/i915: Remove decoupled MMIO code 2017-05-23 21:58 [PATCH 0/2] Disable and remove decoupled MMIO feature kai.chen 2017-05-23 21:58 ` [PATCH 1/2] drm/i915: Disable decoupled MMIO kai.chen @ 2017-05-23 21:58 ` kai.chen 2017-05-24 9:08 ` Tvrtko Ursulin 2017-05-23 22:12 ` ✓ Fi.CI.BAT: success for Disable and remove decoupled MMIO feature Patchwork 2017-05-24 8:54 ` Patchwork 3 siblings, 1 reply; 9+ messages in thread From: kai.chen @ 2017-05-23 21:58 UTC (permalink / raw) To: intel-gfx From: Kai Chen <kai.chen@intel.com> This is a follow-up patch to the previous patch ([PATCH[1/2] drm/i915: Disable decoupled MMIO) to remove the dead code for decoupled MMIO implementation, as it won't be used any longer on GEN9LP. Therefore, this patch reverts: commit 85ee17ebeedd1af0dccd98f82ab4e644e29d84c0 Author: Praveen Paneri <praveen.paneri@intel.com> Date: Tue Nov 15 22:49:20 2016 +0530 drm/i915/bxt: Broxton decoupled MMIO Signed-off-by: Kai Chen <kai.chen@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 3 - drivers/gpu/drm/i915/i915_reg.h | 7 -- drivers/gpu/drm/i915/intel_uncore.c | 126 ------------------------------------ 3 files changed, 136 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index a6f2047..41ff031 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -703,7 +703,6 @@ struct intel_csr { func(has_aliasing_ppgtt); \ func(has_csr); \ func(has_ddi); \ - func(has_decoupled_mmio); \ func(has_dp_mst); \ func(has_fbc); \ func(has_fpga_dbg); \ @@ -2944,8 +2943,6 @@ intel_info(const struct drm_i915_private *dev_priv) #define GT_FREQUENCY_MULTIPLIER 50 #define GEN9_FREQ_SCALER 3 -#define HAS_DECOUPLED_MMIO(dev_priv) (INTEL_INFO(dev_priv)->has_decoupled_mmio) - #include "i915_trace.h" static inline bool intel_scanout_needs_vtd_wa(struct drm_i915_private *dev_priv) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index ee144ec..78872f9 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -7792,13 +7792,6 @@ enum { #define SKL_FUSE_PG1_DIST_STATUS (1<<26) #define SKL_FUSE_PG2_DIST_STATUS (1<<25) -/* Decoupled MMIO register pair for kernel driver */ -#define GEN9_DECOUPLED_REG0_DW0 _MMIO(0xF00) -#define GEN9_DECOUPLED_REG0_DW1 _MMIO(0xF04) -#define GEN9_DECOUPLED_DW1_GO (1<<31) -#define GEN9_DECOUPLED_PD_SHIFT 28 -#define GEN9_DECOUPLED_OP_SHIFT 24 - /* Per-pipe DDI Function Control */ #define _TRANS_DDI_FUNC_CTL_A 0x60400 #define _TRANS_DDI_FUNC_CTL_B 0x61400 diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c index a9a6933..3901800 100644 --- a/drivers/gpu/drm/i915/intel_uncore.c +++ b/drivers/gpu/drm/i915/intel_uncore.c @@ -400,8 +400,6 @@ check_for_unclaimed_mmio(struct drm_i915_private *dev_priv) static void __intel_uncore_early_sanitize(struct drm_i915_private *dev_priv, bool restore_forcewake) { - struct intel_device_info *info = mkwrite_device_info(dev_priv); - /* clear out unclaimed reg detection bit */ if (check_for_unclaimed_mmio(dev_priv)) DRM_DEBUG("unclaimed mmio detected on uncore init, clearing\n"); @@ -414,9 +412,6 @@ static void __intel_uncore_early_sanitize(struct drm_i915_private *dev_priv, GT_FIFO_CTL_RC6_POLICY_STALL); } - if (IS_BXT_REVID(dev_priv, 0, BXT_REVID_B_LAST)) - info->has_decoupled_mmio = false; - intel_uncore_forcewake_reset(dev_priv, restore_forcewake); } @@ -801,78 +796,6 @@ unclaimed_reg_debug(struct drm_i915_private *dev_priv, __unclaimed_reg_debug(dev_priv, reg, read, before); } -enum decoupled_power_domain { - GEN9_DECOUPLED_PD_BLITTER = 0, - GEN9_DECOUPLED_PD_RENDER, - GEN9_DECOUPLED_PD_MEDIA, - GEN9_DECOUPLED_PD_ALL -}; - -enum decoupled_ops { - GEN9_DECOUPLED_OP_WRITE = 0, - GEN9_DECOUPLED_OP_READ -}; - -static const enum decoupled_power_domain fw2dpd_domain[] = { - GEN9_DECOUPLED_PD_RENDER, - GEN9_DECOUPLED_PD_BLITTER, - GEN9_DECOUPLED_PD_ALL, - GEN9_DECOUPLED_PD_MEDIA, - GEN9_DECOUPLED_PD_ALL, - GEN9_DECOUPLED_PD_ALL, - GEN9_DECOUPLED_PD_ALL -}; - -/* - * Decoupled MMIO access for only 1 DWORD - */ -static void __gen9_decoupled_mmio_access(struct drm_i915_private *dev_priv, - u32 reg, - enum forcewake_domains fw_domain, - enum decoupled_ops operation) -{ - enum decoupled_power_domain dp_domain; - u32 ctrl_reg_data = 0; - - dp_domain = fw2dpd_domain[fw_domain - 1]; - - ctrl_reg_data |= reg; - ctrl_reg_data |= (operation << GEN9_DECOUPLED_OP_SHIFT); - ctrl_reg_data |= (dp_domain << GEN9_DECOUPLED_PD_SHIFT); - ctrl_reg_data |= GEN9_DECOUPLED_DW1_GO; - __raw_i915_write32(dev_priv, GEN9_DECOUPLED_REG0_DW1, ctrl_reg_data); - - if (wait_for_atomic((__raw_i915_read32(dev_priv, - GEN9_DECOUPLED_REG0_DW1) & - GEN9_DECOUPLED_DW1_GO) == 0, - FORCEWAKE_ACK_TIMEOUT_MS)) - DRM_ERROR("Decoupled MMIO wait timed out\n"); -} - -static inline u32 -__gen9_decoupled_mmio_read32(struct drm_i915_private *dev_priv, - u32 reg, - enum forcewake_domains fw_domain) -{ - __gen9_decoupled_mmio_access(dev_priv, reg, fw_domain, - GEN9_DECOUPLED_OP_READ); - - return __raw_i915_read32(dev_priv, GEN9_DECOUPLED_REG0_DW0); -} - -static inline void -__gen9_decoupled_mmio_write(struct drm_i915_private *dev_priv, - u32 reg, u32 data, - enum forcewake_domains fw_domain) -{ - - __raw_i915_write32(dev_priv, GEN9_DECOUPLED_REG0_DW0, data); - - __gen9_decoupled_mmio_access(dev_priv, reg, fw_domain, - GEN9_DECOUPLED_OP_WRITE); -} - - #define GEN2_READ_HEADER(x) \ u##x val = 0; \ assert_rpm_wakelock_held(dev_priv); @@ -969,28 +892,6 @@ func##_read##x(struct drm_i915_private *dev_priv, i915_reg_t reg, bool trace) { #define __gen6_read(x) __gen_read(gen6, x) #define __fwtable_read(x) __gen_read(fwtable, x) -#define __gen9_decoupled_read(x) \ -static u##x \ -gen9_decoupled_read##x(struct drm_i915_private *dev_priv, \ - i915_reg_t reg, bool trace) { \ - enum forcewake_domains fw_engine; \ - GEN6_READ_HEADER(x); \ - fw_engine = __fwtable_reg_read_fw_domains(offset); \ - if (fw_engine & ~dev_priv->uncore.fw_domains_active) { \ - unsigned i; \ - u32 *ptr_data = (u32 *) &val; \ - for (i = 0; i < x/32; i++, offset += sizeof(u32), ptr_data++) \ - *ptr_data = __gen9_decoupled_mmio_read32(dev_priv, \ - offset, \ - fw_engine); \ - } else { \ - val = __raw_i915_read##x(dev_priv, reg); \ - } \ - GEN6_READ_FOOTER; \ -} - -__gen9_decoupled_read(32) -__gen9_decoupled_read(64) __fwtable_read(8) __fwtable_read(16) __fwtable_read(32) @@ -1077,25 +978,6 @@ func##_write##x(struct drm_i915_private *dev_priv, i915_reg_t reg, u##x val, boo #define __gen8_write(x) __gen_write(gen8, x) #define __fwtable_write(x) __gen_write(fwtable, x) -#define __gen9_decoupled_write(x) \ -static void \ -gen9_decoupled_write##x(struct drm_i915_private *dev_priv, \ - i915_reg_t reg, u##x val, \ - bool trace) { \ - enum forcewake_domains fw_engine; \ - GEN6_WRITE_HEADER; \ - fw_engine = __fwtable_reg_write_fw_domains(offset); \ - if (fw_engine & ~dev_priv->uncore.fw_domains_active) \ - __gen9_decoupled_mmio_write(dev_priv, \ - offset, \ - val, \ - fw_engine); \ - else \ - __raw_i915_write##x(dev_priv, reg, val); \ - GEN6_WRITE_FOOTER; \ -} - -__gen9_decoupled_write(32) __fwtable_write(8) __fwtable_write(16) __fwtable_write(32) @@ -1332,14 +1214,6 @@ void intel_uncore_init(struct drm_i915_private *dev_priv) ASSIGN_FW_DOMAINS_TABLE(__gen9_fw_ranges); ASSIGN_WRITE_MMIO_VFUNCS(dev_priv, fwtable); ASSIGN_READ_MMIO_VFUNCS(dev_priv, fwtable); - if (HAS_DECOUPLED_MMIO(dev_priv)) { - dev_priv->uncore.funcs.mmio_readl = - gen9_decoupled_read32; - dev_priv->uncore.funcs.mmio_readq = - gen9_decoupled_read64; - dev_priv->uncore.funcs.mmio_writel = - gen9_decoupled_write32; - } } iosf_mbi_register_pmic_bus_access_notifier( -- 2.9.3 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH 2/2] drm/i915: Remove decoupled MMIO code 2017-05-23 21:58 ` [PATCH 2/2] drm/i915: Remove decoupled MMIO code kai.chen @ 2017-05-24 9:08 ` Tvrtko Ursulin 2017-05-30 7:05 ` Jani Nikula 0 siblings, 1 reply; 9+ messages in thread From: Tvrtko Ursulin @ 2017-05-24 9:08 UTC (permalink / raw) To: kai.chen, intel-gfx On 23/05/2017 22:58, kai.chen@intel.com wrote: > From: Kai Chen <kai.chen@intel.com> > > This is a follow-up patch to the previous patch ([PATCH[1/2] drm/i915: > Disable decoupled MMIO) to remove the dead code for decoupled MMIO > implementation, as it won't be used any longer on GEN9LP. > > Therefore, this patch reverts: > > commit 85ee17ebeedd1af0dccd98f82ab4e644e29d84c0 > Author: Praveen Paneri <praveen.paneri@intel.com> > Date: Tue Nov 15 22:49:20 2016 +0530 > > drm/i915/bxt: Broxton decoupled MMIO > > Signed-off-by: Kai Chen <kai.chen@intel.com> > --- > drivers/gpu/drm/i915/i915_drv.h | 3 - > drivers/gpu/drm/i915/i915_reg.h | 7 -- > drivers/gpu/drm/i915/intel_uncore.c | 126 ------------------------------------ > 3 files changed, 136 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index a6f2047..41ff031 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -703,7 +703,6 @@ struct intel_csr { > func(has_aliasing_ppgtt); \ > func(has_csr); \ > func(has_ddi); \ > - func(has_decoupled_mmio); \ > func(has_dp_mst); \ > func(has_fbc); \ > func(has_fpga_dbg); \ > @@ -2944,8 +2943,6 @@ intel_info(const struct drm_i915_private *dev_priv) > #define GT_FREQUENCY_MULTIPLIER 50 > #define GEN9_FREQ_SCALER 3 > > -#define HAS_DECOUPLED_MMIO(dev_priv) (INTEL_INFO(dev_priv)->has_decoupled_mmio) > - > #include "i915_trace.h" > > static inline bool intel_scanout_needs_vtd_wa(struct drm_i915_private *dev_priv) > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index ee144ec..78872f9 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -7792,13 +7792,6 @@ enum { > #define SKL_FUSE_PG1_DIST_STATUS (1<<26) > #define SKL_FUSE_PG2_DIST_STATUS (1<<25) > > -/* Decoupled MMIO register pair for kernel driver */ > -#define GEN9_DECOUPLED_REG0_DW0 _MMIO(0xF00) > -#define GEN9_DECOUPLED_REG0_DW1 _MMIO(0xF04) > -#define GEN9_DECOUPLED_DW1_GO (1<<31) > -#define GEN9_DECOUPLED_PD_SHIFT 28 > -#define GEN9_DECOUPLED_OP_SHIFT 24 > - > /* Per-pipe DDI Function Control */ > #define _TRANS_DDI_FUNC_CTL_A 0x60400 > #define _TRANS_DDI_FUNC_CTL_B 0x61400 > diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c > index a9a6933..3901800 100644 > --- a/drivers/gpu/drm/i915/intel_uncore.c > +++ b/drivers/gpu/drm/i915/intel_uncore.c > @@ -400,8 +400,6 @@ check_for_unclaimed_mmio(struct drm_i915_private *dev_priv) > static void __intel_uncore_early_sanitize(struct drm_i915_private *dev_priv, > bool restore_forcewake) > { > - struct intel_device_info *info = mkwrite_device_info(dev_priv); > - > /* clear out unclaimed reg detection bit */ > if (check_for_unclaimed_mmio(dev_priv)) > DRM_DEBUG("unclaimed mmio detected on uncore init, clearing\n"); > @@ -414,9 +412,6 @@ static void __intel_uncore_early_sanitize(struct drm_i915_private *dev_priv, > GT_FIFO_CTL_RC6_POLICY_STALL); > } > > - if (IS_BXT_REVID(dev_priv, 0, BXT_REVID_B_LAST)) > - info->has_decoupled_mmio = false; > - > intel_uncore_forcewake_reset(dev_priv, restore_forcewake); > } > > @@ -801,78 +796,6 @@ unclaimed_reg_debug(struct drm_i915_private *dev_priv, > __unclaimed_reg_debug(dev_priv, reg, read, before); > } > > -enum decoupled_power_domain { > - GEN9_DECOUPLED_PD_BLITTER = 0, > - GEN9_DECOUPLED_PD_RENDER, > - GEN9_DECOUPLED_PD_MEDIA, > - GEN9_DECOUPLED_PD_ALL > -}; > - > -enum decoupled_ops { > - GEN9_DECOUPLED_OP_WRITE = 0, > - GEN9_DECOUPLED_OP_READ > -}; > - > -static const enum decoupled_power_domain fw2dpd_domain[] = { > - GEN9_DECOUPLED_PD_RENDER, > - GEN9_DECOUPLED_PD_BLITTER, > - GEN9_DECOUPLED_PD_ALL, > - GEN9_DECOUPLED_PD_MEDIA, > - GEN9_DECOUPLED_PD_ALL, > - GEN9_DECOUPLED_PD_ALL, > - GEN9_DECOUPLED_PD_ALL > -}; > - > -/* > - * Decoupled MMIO access for only 1 DWORD > - */ > -static void __gen9_decoupled_mmio_access(struct drm_i915_private *dev_priv, > - u32 reg, > - enum forcewake_domains fw_domain, > - enum decoupled_ops operation) > -{ > - enum decoupled_power_domain dp_domain; > - u32 ctrl_reg_data = 0; > - > - dp_domain = fw2dpd_domain[fw_domain - 1]; > - > - ctrl_reg_data |= reg; > - ctrl_reg_data |= (operation << GEN9_DECOUPLED_OP_SHIFT); > - ctrl_reg_data |= (dp_domain << GEN9_DECOUPLED_PD_SHIFT); > - ctrl_reg_data |= GEN9_DECOUPLED_DW1_GO; > - __raw_i915_write32(dev_priv, GEN9_DECOUPLED_REG0_DW1, ctrl_reg_data); > - > - if (wait_for_atomic((__raw_i915_read32(dev_priv, > - GEN9_DECOUPLED_REG0_DW1) & > - GEN9_DECOUPLED_DW1_GO) == 0, > - FORCEWAKE_ACK_TIMEOUT_MS)) > - DRM_ERROR("Decoupled MMIO wait timed out\n"); > -} > - > -static inline u32 > -__gen9_decoupled_mmio_read32(struct drm_i915_private *dev_priv, > - u32 reg, > - enum forcewake_domains fw_domain) > -{ > - __gen9_decoupled_mmio_access(dev_priv, reg, fw_domain, > - GEN9_DECOUPLED_OP_READ); > - > - return __raw_i915_read32(dev_priv, GEN9_DECOUPLED_REG0_DW0); > -} > - > -static inline void > -__gen9_decoupled_mmio_write(struct drm_i915_private *dev_priv, > - u32 reg, u32 data, > - enum forcewake_domains fw_domain) > -{ > - > - __raw_i915_write32(dev_priv, GEN9_DECOUPLED_REG0_DW0, data); > - > - __gen9_decoupled_mmio_access(dev_priv, reg, fw_domain, > - GEN9_DECOUPLED_OP_WRITE); > -} > - > - > #define GEN2_READ_HEADER(x) \ > u##x val = 0; \ > assert_rpm_wakelock_held(dev_priv); > @@ -969,28 +892,6 @@ func##_read##x(struct drm_i915_private *dev_priv, i915_reg_t reg, bool trace) { > #define __gen6_read(x) __gen_read(gen6, x) > #define __fwtable_read(x) __gen_read(fwtable, x) > > -#define __gen9_decoupled_read(x) \ > -static u##x \ > -gen9_decoupled_read##x(struct drm_i915_private *dev_priv, \ > - i915_reg_t reg, bool trace) { \ > - enum forcewake_domains fw_engine; \ > - GEN6_READ_HEADER(x); \ > - fw_engine = __fwtable_reg_read_fw_domains(offset); \ > - if (fw_engine & ~dev_priv->uncore.fw_domains_active) { \ > - unsigned i; \ > - u32 *ptr_data = (u32 *) &val; \ > - for (i = 0; i < x/32; i++, offset += sizeof(u32), ptr_data++) \ > - *ptr_data = __gen9_decoupled_mmio_read32(dev_priv, \ > - offset, \ > - fw_engine); \ > - } else { \ > - val = __raw_i915_read##x(dev_priv, reg); \ > - } \ > - GEN6_READ_FOOTER; \ > -} > - > -__gen9_decoupled_read(32) > -__gen9_decoupled_read(64) > __fwtable_read(8) > __fwtable_read(16) > __fwtable_read(32) > @@ -1077,25 +978,6 @@ func##_write##x(struct drm_i915_private *dev_priv, i915_reg_t reg, u##x val, boo > #define __gen8_write(x) __gen_write(gen8, x) > #define __fwtable_write(x) __gen_write(fwtable, x) > > -#define __gen9_decoupled_write(x) \ > -static void \ > -gen9_decoupled_write##x(struct drm_i915_private *dev_priv, \ > - i915_reg_t reg, u##x val, \ > - bool trace) { \ > - enum forcewake_domains fw_engine; \ > - GEN6_WRITE_HEADER; \ > - fw_engine = __fwtable_reg_write_fw_domains(offset); \ > - if (fw_engine & ~dev_priv->uncore.fw_domains_active) \ > - __gen9_decoupled_mmio_write(dev_priv, \ > - offset, \ > - val, \ > - fw_engine); \ > - else \ > - __raw_i915_write##x(dev_priv, reg, val); \ > - GEN6_WRITE_FOOTER; \ > -} > - > -__gen9_decoupled_write(32) > __fwtable_write(8) > __fwtable_write(16) > __fwtable_write(32) > @@ -1332,14 +1214,6 @@ void intel_uncore_init(struct drm_i915_private *dev_priv) > ASSIGN_FW_DOMAINS_TABLE(__gen9_fw_ranges); > ASSIGN_WRITE_MMIO_VFUNCS(dev_priv, fwtable); > ASSIGN_READ_MMIO_VFUNCS(dev_priv, fwtable); > - if (HAS_DECOUPLED_MMIO(dev_priv)) { > - dev_priv->uncore.funcs.mmio_readl = > - gen9_decoupled_read32; > - dev_priv->uncore.funcs.mmio_readq = > - gen9_decoupled_read64; > - dev_priv->uncore.funcs.mmio_writel = > - gen9_decoupled_write32; > - } > } > > iosf_mbi_register_pmic_bus_access_notifier( > Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Thanks for sorting this out! Regards, Tvrtko _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 2/2] drm/i915: Remove decoupled MMIO code 2017-05-24 9:08 ` Tvrtko Ursulin @ 2017-05-30 7:05 ` Jani Nikula 0 siblings, 0 replies; 9+ messages in thread From: Jani Nikula @ 2017-05-30 7:05 UTC (permalink / raw) To: Tvrtko Ursulin, kai.chen, intel-gfx On Wed, 24 May 2017, Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> wrote: > On 23/05/2017 22:58, kai.chen@intel.com wrote: >> From: Kai Chen <kai.chen@intel.com> >> >> This is a follow-up patch to the previous patch ([PATCH[1/2] drm/i915: >> Disable decoupled MMIO) to remove the dead code for decoupled MMIO >> implementation, as it won't be used any longer on GEN9LP. >> >> Therefore, this patch reverts: >> >> commit 85ee17ebeedd1af0dccd98f82ab4e644e29d84c0 >> Author: Praveen Paneri <praveen.paneri@intel.com> >> Date: Tue Nov 15 22:49:20 2016 +0530 >> >> drm/i915/bxt: Broxton decoupled MMIO >> >> Signed-off-by: Kai Chen <kai.chen@intel.com> >> --- >> drivers/gpu/drm/i915/i915_drv.h | 3 - >> drivers/gpu/drm/i915/i915_reg.h | 7 -- >> drivers/gpu/drm/i915/intel_uncore.c | 126 ------------------------------------ >> 3 files changed, 136 deletions(-) >> >> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h >> index a6f2047..41ff031 100644 >> --- a/drivers/gpu/drm/i915/i915_drv.h >> +++ b/drivers/gpu/drm/i915/i915_drv.h >> @@ -703,7 +703,6 @@ struct intel_csr { >> func(has_aliasing_ppgtt); \ >> func(has_csr); \ >> func(has_ddi); \ >> - func(has_decoupled_mmio); \ >> func(has_dp_mst); \ >> func(has_fbc); \ >> func(has_fpga_dbg); \ >> @@ -2944,8 +2943,6 @@ intel_info(const struct drm_i915_private *dev_priv) >> #define GT_FREQUENCY_MULTIPLIER 50 >> #define GEN9_FREQ_SCALER 3 >> >> -#define HAS_DECOUPLED_MMIO(dev_priv) (INTEL_INFO(dev_priv)->has_decoupled_mmio) >> - >> #include "i915_trace.h" >> >> static inline bool intel_scanout_needs_vtd_wa(struct drm_i915_private *dev_priv) >> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h >> index ee144ec..78872f9 100644 >> --- a/drivers/gpu/drm/i915/i915_reg.h >> +++ b/drivers/gpu/drm/i915/i915_reg.h >> @@ -7792,13 +7792,6 @@ enum { >> #define SKL_FUSE_PG1_DIST_STATUS (1<<26) >> #define SKL_FUSE_PG2_DIST_STATUS (1<<25) >> >> -/* Decoupled MMIO register pair for kernel driver */ >> -#define GEN9_DECOUPLED_REG0_DW0 _MMIO(0xF00) >> -#define GEN9_DECOUPLED_REG0_DW1 _MMIO(0xF04) >> -#define GEN9_DECOUPLED_DW1_GO (1<<31) >> -#define GEN9_DECOUPLED_PD_SHIFT 28 >> -#define GEN9_DECOUPLED_OP_SHIFT 24 >> - >> /* Per-pipe DDI Function Control */ >> #define _TRANS_DDI_FUNC_CTL_A 0x60400 >> #define _TRANS_DDI_FUNC_CTL_B 0x61400 >> diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c >> index a9a6933..3901800 100644 >> --- a/drivers/gpu/drm/i915/intel_uncore.c >> +++ b/drivers/gpu/drm/i915/intel_uncore.c >> @@ -400,8 +400,6 @@ check_for_unclaimed_mmio(struct drm_i915_private *dev_priv) >> static void __intel_uncore_early_sanitize(struct drm_i915_private *dev_priv, >> bool restore_forcewake) >> { >> - struct intel_device_info *info = mkwrite_device_info(dev_priv); >> - >> /* clear out unclaimed reg detection bit */ >> if (check_for_unclaimed_mmio(dev_priv)) >> DRM_DEBUG("unclaimed mmio detected on uncore init, clearing\n"); >> @@ -414,9 +412,6 @@ static void __intel_uncore_early_sanitize(struct drm_i915_private *dev_priv, >> GT_FIFO_CTL_RC6_POLICY_STALL); >> } >> >> - if (IS_BXT_REVID(dev_priv, 0, BXT_REVID_B_LAST)) >> - info->has_decoupled_mmio = false; >> - >> intel_uncore_forcewake_reset(dev_priv, restore_forcewake); >> } >> >> @@ -801,78 +796,6 @@ unclaimed_reg_debug(struct drm_i915_private *dev_priv, >> __unclaimed_reg_debug(dev_priv, reg, read, before); >> } >> >> -enum decoupled_power_domain { >> - GEN9_DECOUPLED_PD_BLITTER = 0, >> - GEN9_DECOUPLED_PD_RENDER, >> - GEN9_DECOUPLED_PD_MEDIA, >> - GEN9_DECOUPLED_PD_ALL >> -}; >> - >> -enum decoupled_ops { >> - GEN9_DECOUPLED_OP_WRITE = 0, >> - GEN9_DECOUPLED_OP_READ >> -}; >> - >> -static const enum decoupled_power_domain fw2dpd_domain[] = { >> - GEN9_DECOUPLED_PD_RENDER, >> - GEN9_DECOUPLED_PD_BLITTER, >> - GEN9_DECOUPLED_PD_ALL, >> - GEN9_DECOUPLED_PD_MEDIA, >> - GEN9_DECOUPLED_PD_ALL, >> - GEN9_DECOUPLED_PD_ALL, >> - GEN9_DECOUPLED_PD_ALL >> -}; >> - >> -/* >> - * Decoupled MMIO access for only 1 DWORD >> - */ >> -static void __gen9_decoupled_mmio_access(struct drm_i915_private *dev_priv, >> - u32 reg, >> - enum forcewake_domains fw_domain, >> - enum decoupled_ops operation) >> -{ >> - enum decoupled_power_domain dp_domain; >> - u32 ctrl_reg_data = 0; >> - >> - dp_domain = fw2dpd_domain[fw_domain - 1]; >> - >> - ctrl_reg_data |= reg; >> - ctrl_reg_data |= (operation << GEN9_DECOUPLED_OP_SHIFT); >> - ctrl_reg_data |= (dp_domain << GEN9_DECOUPLED_PD_SHIFT); >> - ctrl_reg_data |= GEN9_DECOUPLED_DW1_GO; >> - __raw_i915_write32(dev_priv, GEN9_DECOUPLED_REG0_DW1, ctrl_reg_data); >> - >> - if (wait_for_atomic((__raw_i915_read32(dev_priv, >> - GEN9_DECOUPLED_REG0_DW1) & >> - GEN9_DECOUPLED_DW1_GO) == 0, >> - FORCEWAKE_ACK_TIMEOUT_MS)) >> - DRM_ERROR("Decoupled MMIO wait timed out\n"); >> -} >> - >> -static inline u32 >> -__gen9_decoupled_mmio_read32(struct drm_i915_private *dev_priv, >> - u32 reg, >> - enum forcewake_domains fw_domain) >> -{ >> - __gen9_decoupled_mmio_access(dev_priv, reg, fw_domain, >> - GEN9_DECOUPLED_OP_READ); >> - >> - return __raw_i915_read32(dev_priv, GEN9_DECOUPLED_REG0_DW0); >> -} >> - >> -static inline void >> -__gen9_decoupled_mmio_write(struct drm_i915_private *dev_priv, >> - u32 reg, u32 data, >> - enum forcewake_domains fw_domain) >> -{ >> - >> - __raw_i915_write32(dev_priv, GEN9_DECOUPLED_REG0_DW0, data); >> - >> - __gen9_decoupled_mmio_access(dev_priv, reg, fw_domain, >> - GEN9_DECOUPLED_OP_WRITE); >> -} >> - >> - >> #define GEN2_READ_HEADER(x) \ >> u##x val = 0; \ >> assert_rpm_wakelock_held(dev_priv); >> @@ -969,28 +892,6 @@ func##_read##x(struct drm_i915_private *dev_priv, i915_reg_t reg, bool trace) { >> #define __gen6_read(x) __gen_read(gen6, x) >> #define __fwtable_read(x) __gen_read(fwtable, x) >> >> -#define __gen9_decoupled_read(x) \ >> -static u##x \ >> -gen9_decoupled_read##x(struct drm_i915_private *dev_priv, \ >> - i915_reg_t reg, bool trace) { \ >> - enum forcewake_domains fw_engine; \ >> - GEN6_READ_HEADER(x); \ >> - fw_engine = __fwtable_reg_read_fw_domains(offset); \ >> - if (fw_engine & ~dev_priv->uncore.fw_domains_active) { \ >> - unsigned i; \ >> - u32 *ptr_data = (u32 *) &val; \ >> - for (i = 0; i < x/32; i++, offset += sizeof(u32), ptr_data++) \ >> - *ptr_data = __gen9_decoupled_mmio_read32(dev_priv, \ >> - offset, \ >> - fw_engine); \ >> - } else { \ >> - val = __raw_i915_read##x(dev_priv, reg); \ >> - } \ >> - GEN6_READ_FOOTER; \ >> -} >> - >> -__gen9_decoupled_read(32) >> -__gen9_decoupled_read(64) >> __fwtable_read(8) >> __fwtable_read(16) >> __fwtable_read(32) >> @@ -1077,25 +978,6 @@ func##_write##x(struct drm_i915_private *dev_priv, i915_reg_t reg, u##x val, boo >> #define __gen8_write(x) __gen_write(gen8, x) >> #define __fwtable_write(x) __gen_write(fwtable, x) >> >> -#define __gen9_decoupled_write(x) \ >> -static void \ >> -gen9_decoupled_write##x(struct drm_i915_private *dev_priv, \ >> - i915_reg_t reg, u##x val, \ >> - bool trace) { \ >> - enum forcewake_domains fw_engine; \ >> - GEN6_WRITE_HEADER; \ >> - fw_engine = __fwtable_reg_write_fw_domains(offset); \ >> - if (fw_engine & ~dev_priv->uncore.fw_domains_active) \ >> - __gen9_decoupled_mmio_write(dev_priv, \ >> - offset, \ >> - val, \ >> - fw_engine); \ >> - else \ >> - __raw_i915_write##x(dev_priv, reg, val); \ >> - GEN6_WRITE_FOOTER; \ >> -} >> - >> -__gen9_decoupled_write(32) >> __fwtable_write(8) >> __fwtable_write(16) >> __fwtable_write(32) >> @@ -1332,14 +1214,6 @@ void intel_uncore_init(struct drm_i915_private *dev_priv) >> ASSIGN_FW_DOMAINS_TABLE(__gen9_fw_ranges); >> ASSIGN_WRITE_MMIO_VFUNCS(dev_priv, fwtable); >> ASSIGN_READ_MMIO_VFUNCS(dev_priv, fwtable); >> - if (HAS_DECOUPLED_MMIO(dev_priv)) { >> - dev_priv->uncore.funcs.mmio_readl = >> - gen9_decoupled_read32; >> - dev_priv->uncore.funcs.mmio_readq = >> - gen9_decoupled_read64; >> - dev_priv->uncore.funcs.mmio_writel = >> - gen9_decoupled_write32; >> - } >> } >> >> iosf_mbi_register_pmic_bus_access_notifier( >> > > Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> > > Thanks for sorting this out! Both pushed to dinq, thanks for the patches and review. BR, Jani. > > Regards, > > Tvrtko > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Jani Nikula, Intel Open Source Technology Center _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* ✓ Fi.CI.BAT: success for Disable and remove decoupled MMIO feature 2017-05-23 21:58 [PATCH 0/2] Disable and remove decoupled MMIO feature kai.chen 2017-05-23 21:58 ` [PATCH 1/2] drm/i915: Disable decoupled MMIO kai.chen 2017-05-23 21:58 ` [PATCH 2/2] drm/i915: Remove decoupled MMIO code kai.chen @ 2017-05-23 22:12 ` Patchwork 2017-05-24 5:33 ` Saarinen, Jani 2017-05-24 8:54 ` Patchwork 3 siblings, 1 reply; 9+ messages in thread From: Patchwork @ 2017-05-23 22:12 UTC (permalink / raw) To: kai.chen; +Cc: intel-gfx == Series Details == Series: Disable and remove decoupled MMIO feature URL : https://patchwork.freedesktop.org/series/24851/ State : success == Summary == Series 24851v1 Disable and remove decoupled MMIO feature https://patchwork.freedesktop.org/api/1.0/series/24851/revisions/1/mbox/ fi-bdw-gvtdvm total:278 pass:256 dwarn:8 dfail:0 fail:0 skip:14 time:437s fi-skl-gvtdvm total:278 pass:265 dwarn:0 dfail:0 fail:0 skip:13 time:439s fi-bdw-5557u failed to collect. IGT log at Patchwork_4791/fi-bdw-5557u/igt.log fi-bxt-j4205 failed to collect. IGT log at Patchwork_4791/fi-bxt-j4205/igt.log fi-byt-j1900 failed to collect. IGT log at Patchwork_4791/fi-byt-j1900/igt.log fi-hsw-4770 failed to collect. IGT log at Patchwork_4791/fi-hsw-4770/igt.log fi-hsw-4770r failed to collect. IGT log at Patchwork_4791/fi-hsw-4770r/igt.log fi-ilk-650 failed to collect. IGT log at Patchwork_4791/fi-ilk-650/igt.log fi-ivb-3520m failed to collect. IGT log at Patchwork_4791/fi-ivb-3520m/igt.log fi-ivb-3770 failed to collect. IGT log at Patchwork_4791/fi-ivb-3770/igt.log fi-kbl-7500u failed to collect. IGT log at Patchwork_4791/fi-kbl-7500u/igt.log fi-kbl-7560u failed to collect. IGT log at Patchwork_4791/fi-kbl-7560u/igt.log fi-skl-6260u failed to collect. IGT log at Patchwork_4791/fi-skl-6260u/igt.log fi-skl-6700hq failed to collect. IGT log at Patchwork_4791/fi-skl-6700hq/igt.log fi-skl-6700k failed to collect. IGT log at Patchwork_4791/fi-skl-6700k/igt.log fi-skl-6770hq failed to collect. IGT log at Patchwork_4791/fi-skl-6770hq/igt.log fi-snb-2520m failed to collect. IGT log at Patchwork_4791/fi-snb-2520m/igt.log fi-snb-2600 failed to collect. IGT log at Patchwork_4791/fi-snb-2600/igt.log 26f8446d6f098e0f05c0aaaa09f29f7f086decf8 drm-tip: 2017y-05m-23d-21h-09m-34s UTC integration manifest 4b06135 drm/i915: Remove decoupled MMIO code eb3aab9 drm/i915: Disable decoupled MMIO == Logs == For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_4791/ _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: ✓ Fi.CI.BAT: success for Disable and remove decoupled MMIO feature 2017-05-23 22:12 ` ✓ Fi.CI.BAT: success for Disable and remove decoupled MMIO feature Patchwork @ 2017-05-24 5:33 ` Saarinen, Jani 0 siblings, 0 replies; 9+ messages in thread From: Saarinen, Jani @ 2017-05-24 5:33 UTC (permalink / raw) To: intel-gfx@lists.freedesktop.org, Chen, Kai HI, > -----Original Message----- > From: Intel-gfx [mailto:intel-gfx-bounces@lists.freedesktop.org] On Behalf Of > Patchwork > Sent: Wednesday, May 24, 2017 1:13 AM > To: Chen, Kai <kai.chen@intel.com> > Cc: intel-gfx@lists.freedesktop.org > Subject: [Intel-gfx] ✓ Fi.CI.BAT: success for Disable and remove decoupled MMIO > feature > > == Series Details == > > Series: Disable and remove decoupled MMIO feature > URL : https://patchwork.freedesktop.org/series/24851/ > State : success > > == Summary == > > Series 24851v1 Disable and remove decoupled MMIO feature > https://patchwork.freedesktop.org/api/1.0/series/24851/revisions/1/mbox/ > > fi-bdw-gvtdvm total:278 pass:256 dwarn:8 dfail:0 fail:0 skip:14 time:437s > fi-skl-gvtdvm total:278 pass:265 dwarn:0 dfail:0 fail:0 skip:13 time:439s And here...to be investigated. > fi-bdw-5557u failed to collect. IGT log at Patchwork_4791/fi-bdw-5557u/igt.log > fi-bxt-j4205 failed to collect. IGT log at Patchwork_4791/fi-bxt-j4205/igt.log > fi-byt-j1900 failed to collect. IGT log at Patchwork_4791/fi-byt-j1900/igt.log > fi-hsw-4770 failed to collect. IGT log at Patchwork_4791/fi-hsw-4770/igt.log > fi-hsw-4770r failed to collect. IGT log at Patchwork_4791/fi-hsw-4770r/igt.log > fi-ilk-650 failed to collect. IGT log at Patchwork_4791/fi-ilk-650/igt.log fi-ivb- > 3520m failed to collect. IGT log at Patchwork_4791/fi-ivb-3520m/igt.log > fi-ivb-3770 failed to collect. IGT log at Patchwork_4791/fi-ivb-3770/igt.log > fi-kbl-7500u failed to collect. IGT log at Patchwork_4791/fi-kbl-7500u/igt.log > fi-kbl-7560u failed to collect. IGT log at Patchwork_4791/fi-kbl-7560u/igt.log > fi-skl-6260u failed to collect. IGT log at Patchwork_4791/fi-skl-6260u/igt.log > fi-skl-6700hq failed to collect. IGT log at Patchwork_4791/fi-skl-6700hq/igt.log > fi-skl-6700k failed to collect. IGT log at Patchwork_4791/fi-skl-6700k/igt.log > fi-skl-6770hq failed to collect. IGT log at Patchwork_4791/fi-skl-6770hq/igt.log > fi-snb-2520m failed to collect. IGT log at Patchwork_4791/fi-snb-2520m/igt.log > fi-snb-2600 failed to collect. IGT log at Patchwork_4791/fi-snb-2600/igt.log > > 26f8446d6f098e0f05c0aaaa09f29f7f086decf8 drm-tip: 2017y-05m-23d-21h- > 09m-34s UTC integration manifest > 4b06135 drm/i915: Remove decoupled MMIO code > eb3aab9 drm/i915: Disable decoupled MMIO > > == Logs == > > For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_4791/ > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* ✓ Fi.CI.BAT: success for Disable and remove decoupled MMIO feature 2017-05-23 21:58 [PATCH 0/2] Disable and remove decoupled MMIO feature kai.chen ` (2 preceding siblings ...) 2017-05-23 22:12 ` ✓ Fi.CI.BAT: success for Disable and remove decoupled MMIO feature Patchwork @ 2017-05-24 8:54 ` Patchwork 3 siblings, 0 replies; 9+ messages in thread From: Patchwork @ 2017-05-24 8:54 UTC (permalink / raw) To: kai.chen; +Cc: intel-gfx == Series Details == Series: Disable and remove decoupled MMIO feature URL : https://patchwork.freedesktop.org/series/24851/ State : success == Summary == Series 24851v1 Disable and remove decoupled MMIO feature https://patchwork.freedesktop.org/api/1.0/series/24851/revisions/1/mbox/ Test gem_exec_flush: Subgroup basic-batch-kernel-default-uc: pass -> FAIL (fi-snb-2600) fdo#100007 Test gem_exec_suspend: Subgroup basic-s4-devices: dmesg-warn -> PASS (fi-snb-2600) fdo#100125 Test kms_flip: Subgroup basic-flip-vs-dpms: dmesg-fail -> DMESG-WARN (fi-skl-6700hq) fdo#101144 Subgroup basic-flip-vs-modeset: skip -> PASS (fi-skl-6700hq) fdo#100867 Subgroup basic-flip-vs-wf_vblank: skip -> PASS (fi-skl-6700hq) fdo#99739 Subgroup basic-plain-flip: skip -> PASS (fi-skl-6700hq) Test kms_frontbuffer_tracking: Subgroup basic: skip -> PASS (fi-skl-6700hq) Test kms_pipe_crc_basic: Subgroup hang-read-crc-pipe-a: fail -> PASS (fi-skl-6700hq) fdo#101154 +16 fdo#100007 https://bugs.freedesktop.org/show_bug.cgi?id=100007 fdo#100125 https://bugs.freedesktop.org/show_bug.cgi?id=100125 fdo#101144 https://bugs.freedesktop.org/show_bug.cgi?id=101144 fdo#100867 https://bugs.freedesktop.org/show_bug.cgi?id=100867 fdo#99739 https://bugs.freedesktop.org/show_bug.cgi?id=99739 fdo#101154 https://bugs.freedesktop.org/show_bug.cgi?id=101154 fi-bdw-5557u total:278 pass:267 dwarn:0 dfail:0 fail:0 skip:11 time:446s fi-bdw-gvtdvm total:278 pass:256 dwarn:8 dfail:0 fail:0 skip:14 time:434s fi-bsw-n3050 total:278 pass:242 dwarn:0 dfail:0 fail:0 skip:36 time:589s fi-bxt-j4205 total:278 pass:259 dwarn:0 dfail:0 fail:0 skip:19 time:509s fi-byt-j1900 total:278 pass:254 dwarn:0 dfail:0 fail:0 skip:24 time:493s fi-byt-n2820 total:278 pass:250 dwarn:0 dfail:0 fail:0 skip:28 time:488s fi-hsw-4770 total:278 pass:262 dwarn:0 dfail:0 fail:0 skip:16 time:426s fi-hsw-4770r total:278 pass:262 dwarn:0 dfail:0 fail:0 skip:16 time:414s fi-ilk-650 total:278 pass:228 dwarn:0 dfail:0 fail:0 skip:50 time:423s fi-ivb-3520m total:278 pass:260 dwarn:0 dfail:0 fail:0 skip:18 time:490s fi-ivb-3770 total:278 pass:260 dwarn:0 dfail:0 fail:0 skip:18 time:465s fi-kbl-7500u total:278 pass:255 dwarn:5 dfail:0 fail:0 skip:18 time:465s fi-kbl-7560u total:278 pass:263 dwarn:5 dfail:0 fail:0 skip:10 time:575s fi-skl-6260u total:278 pass:268 dwarn:0 dfail:0 fail:0 skip:10 time:456s fi-skl-6700hq total:278 pass:260 dwarn:1 dfail:0 fail:0 skip:17 time:571s fi-skl-6700k total:278 pass:256 dwarn:4 dfail:0 fail:0 skip:18 time:470s fi-skl-6770hq total:278 pass:268 dwarn:0 dfail:0 fail:0 skip:10 time:502s fi-skl-gvtdvm total:278 pass:265 dwarn:0 dfail:0 fail:0 skip:13 time:439s fi-snb-2520m total:278 pass:250 dwarn:0 dfail:0 fail:0 skip:28 time:533s fi-snb-2600 total:278 pass:248 dwarn:0 dfail:0 fail:1 skip:29 time:415s c8f2238b9cbfef358e61596cd49b1f648c85811e drm-tip: 2017y-05m-24d-08h-04m-41s UTC integration manifest ada7ff6 drm/i915: Remove decoupled MMIO code e4421ef drm/i915: Disable decoupled MMIO == Logs == For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_4794/ _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2017-05-30 7:02 UTC | newest] Thread overview: 9+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2017-05-23 21:58 [PATCH 0/2] Disable and remove decoupled MMIO feature kai.chen 2017-05-23 21:58 ` [PATCH 1/2] drm/i915: Disable decoupled MMIO kai.chen 2017-05-24 9:06 ` Tvrtko Ursulin 2017-05-23 21:58 ` [PATCH 2/2] drm/i915: Remove decoupled MMIO code kai.chen 2017-05-24 9:08 ` Tvrtko Ursulin 2017-05-30 7:05 ` Jani Nikula 2017-05-23 22:12 ` ✓ Fi.CI.BAT: success for Disable and remove decoupled MMIO feature Patchwork 2017-05-24 5:33 ` Saarinen, Jani 2017-05-24 8:54 ` Patchwork
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