From: vinod.koul@intel.com (Vinod Koul)
To: linux-arm-kernel@lists.infradead.org
Subject: [linux-sunxi] Re: [PATCH 1/2] dmaengine: sun6i: make gate bit in sun8i's DMA engines a common quirk
Date: Thu, 15 Jun 2017 09:24:08 +0530 [thread overview]
Message-ID: <20170615035407.GM13020@localhost> (raw)
In-Reply-To: <20170614090439.rkdaoo3uqzjqwuxq@flea.lan>
On Wed, Jun 14, 2017 at 11:04:39AM +0200, Maxime Ripard wrote:
> On Wed, Jun 14, 2017 at 02:15:29PM +0530, Vinod Koul wrote:
> > > SoC info is in compatible, so there's no reason to make it a property.
> >
> > that's why it would need to be optional for the SoC's that needs these..
>
> There's nothing optional about that behaviour, it's mandatory for the
> SoC that need it, and useless on the SoC that don't.
And why should kernel put strings for each hw behaviour. I am expecting DT
to tell me if this SoC is a special case or not and kernel shall handle
accordingly
> Plus, that would require changing the DT binding, which isn't
> something we can do.
Any reason why bindings can't change..? I though this was support for new
SoC...
--
~Vinod
WARNING: multiple messages have this Message-ID (diff)
From: Vinod Koul <vinod.koul@intel.com>
To: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Icenowy Zheng <icenowy@aosc.io>,
linux-arm-kernel@lists.infradead.org,
Chen-Yu Tsai <wens@csie.org>,
linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com,
Icenowy Zheng <icenowy@aosc.xyz>,
dmaengine@vger.kernel.org
Subject: Re: [linux-sunxi] Re: [PATCH 1/2] dmaengine: sun6i: make gate bit in sun8i's DMA engines a common quirk
Date: Thu, 15 Jun 2017 09:24:08 +0530 [thread overview]
Message-ID: <20170615035407.GM13020@localhost> (raw)
In-Reply-To: <20170614090439.rkdaoo3uqzjqwuxq@flea.lan>
On Wed, Jun 14, 2017 at 11:04:39AM +0200, Maxime Ripard wrote:
> On Wed, Jun 14, 2017 at 02:15:29PM +0530, Vinod Koul wrote:
> > > SoC info is in compatible, so there's no reason to make it a property.
> >
> > that's why it would need to be optional for the SoC's that needs these..
>
> There's nothing optional about that behaviour, it's mandatory for the
> SoC that need it, and useless on the SoC that don't.
And why should kernel put strings for each hw behaviour. I am expecting DT
to tell me if this SoC is a special case or not and kernel shall handle
accordingly
> Plus, that would require changing the DT binding, which isn't
> something we can do.
Any reason why bindings can't change..? I though this was support for new
SoC...
--
~Vinod
next prev parent reply other threads:[~2017-06-15 3:54 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-05 12:33 [PATCH 0/2] Allwinner V3s DMA support Icenowy Zheng
2017-06-05 12:33 ` Icenowy Zheng
2017-06-05 12:33 ` [PATCH 1/2] dmaengine: sun6i: make gate bit in sun8i's DMA engines a common quirk Icenowy Zheng
2017-06-05 12:33 ` Icenowy Zheng
2017-06-05 13:15 ` [linux-sunxi] " Chen-Yu Tsai
2017-06-05 13:15 ` Chen-Yu Tsai
2017-06-14 8:32 ` Vinod Koul
2017-06-14 8:32 ` Vinod Koul
2017-06-14 8:32 ` Icenowy Zheng
2017-06-14 8:32 ` Icenowy Zheng
2017-06-14 8:45 ` Vinod Koul
2017-06-14 8:45 ` Vinod Koul
2017-06-14 8:46 ` [linux-sunxi] " Icenowy Zheng
2017-06-14 8:46 ` Icenowy Zheng
2017-06-14 9:04 ` Maxime Ripard
2017-06-14 9:04 ` Maxime Ripard
2017-06-15 3:54 ` Vinod Koul [this message]
2017-06-15 3:54 ` Vinod Koul
2017-06-15 3:53 ` Icenowy Zheng
2017-06-15 3:53 ` Icenowy Zheng
2017-06-20 8:45 ` Maxime Ripard
2017-06-20 8:45 ` Maxime Ripard
2017-06-05 12:33 ` [PATCH 2/2] dmaengine: sun6i: support V3s SoC variant Icenowy Zheng
2017-06-05 12:33 ` Icenowy Zheng
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