[meta-rockchip][PATCH 0/2] u-boot: various improvements

[meta-rockchip][PATCH 0/2] u-boot: various improvements

[Romain Perier]

This first fixes a build issue regarding SPL_BINARY that is not copied
from the correct seach path. Then it backports an upstream fix for a
regression we have in u-boot 2017.05, that makes ethernet works again
on RK3288.

Romain Perier (2):
  u-boot: Copy ${SPL_BINARY} to the default search path
  u-boot: Backport upstream fix for gmac_rockchip

 ...3288-grf-Fix-shift-for-RK3288_TXCLK_DLY_E.patch | 36 ++++++++++++++++++++++
 recipes-bsp/u-boot/u-boot_%.bbappend               | 14 +++++++++
 2 files changed, 50 insertions(+)
 create mode 100644 recipes-bsp/u-boot/u-boot/0001-rockchip-rk3288-grf-Fix-shift-for-RK3288_TXCLK_DLY_E.patch
 create mode 100644 recipes-bsp/u-boot/u-boot_%.bbappend

-- 
1.8.3.1

[meta-rockchip][PATCH 1/2] u-boot: Copy ${SPL_BINARY} to the default search path

[Romain Perier]

The do_install task from u-boot.inc, expects to find ${SPL_BINARY} into
${B}, while for some platforms, including Rockchip, this binary is
generated under the spl directory. Extend the compile task to copy
${SPL_BINARY} to the defaut search path and make the build process work.

Signed-off-by: Romain Perier <romain.perier@collabora.com>
---
 recipes-bsp/u-boot/u-boot_%.bbappend | 8 ++++++++
 1 file changed, 8 insertions(+)
 create mode 100644 recipes-bsp/u-boot/u-boot_%.bbappend

diff --git a/recipes-bsp/u-boot/u-boot_%.bbappend b/recipes-bsp/u-boot/u-boot_%.bbappend
new file mode 100644
index 0000000..efa5eae
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot_%.bbappend
@@ -0,0 +1,8 @@
+# Copyright (C) 2017 Romain Perier <romain.perier@collabora.com>
+# Released under the MIT license (see COPYING.MIT for the terms)
+
+do_compile_append () {
+    # Copy spl to default search path, so do_install from u-boot.inc
+    # works
+    cp ${B}/spl/${SPL_BINARY} ${B}/
+}
-- 
1.8.3.1

[meta-rockchip][PATCH 2/2] u-boot: Backport upstream fix for gmac_rockchip

[Romain Perier]

This backports an upstream patch that makes ethernet
work again for RK3288.

Signed-off-by: Romain Perier <romain.perier@collabora.com>
---
 ...3288-grf-Fix-shift-for-RK3288_TXCLK_DLY_E.patch | 36 ++++++++++++++++++++++
 recipes-bsp/u-boot/u-boot_%.bbappend               |  6 ++++
 2 files changed, 42 insertions(+)
 create mode 100644 recipes-bsp/u-boot/u-boot/0001-rockchip-rk3288-grf-Fix-shift-for-RK3288_TXCLK_DLY_E.patch

diff --git a/recipes-bsp/u-boot/u-boot/0001-rockchip-rk3288-grf-Fix-shift-for-RK3288_TXCLK_DLY_E.patch b/recipes-bsp/u-boot/u-boot/0001-rockchip-rk3288-grf-Fix-shift-for-RK3288_TXCLK_DLY_E.patch
new file mode 100644
index 0000000..b08d331
--- /dev/null
+++ b/recipes-bsp/u-boot/u-boot/0001-rockchip-rk3288-grf-Fix-shift-for-RK3288_TXCLK_DLY_E.patch
@@ -0,0 +1,36 @@
+From fefe9d06bd0917739822a4be4c702f1d5d0e0899 Mon Sep 17 00:00:00 2001
+From: Romain Perier <romain.perier@collabora.com>
+Date: Fri, 2 Jun 2017 11:19:43 +0200
+Subject: [PATCH] rockchip: rk3288: grf: Fix shift for
+ RK3288_TXCLK_DLY_ENA_GMAC_ENABLE
+
+RK3288_TXCLK_DLY_ENA_GMAC_ENABLE, in GRF_SOC_CON3, is supposed to be bit
+0xe and not 0xf. Otherwise, it is RGMII RX clock delayline enable and
+introduces random delays and data lose.
+
+This commit fixes the issue by replacing RK3288_TXCLK_DLY_ENA_GMAC_ENABLE
+with the right shift.
+
+Upstream-Status: Backported (http://git.denx.de/?p=u-boot/u-boot-rockchip.git;a=patch;h=fefe9d06bd0917739822a4be4c702f1d5d0e0899)
+
+Signed-off-by: Romain Perier <romain.perier@collabora.com>
+Reviewed-by: Simon Glass <sjg@chromium.org>
+---
+ arch/arm/include/asm/arch-rockchip/grf_rk3288.h |    2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3288.h b/arch/arm/include/asm/arch-rockchip/grf_rk3288.h
+index 7d56b8c..fbc4a0d 100644
+--- a/arch/arm/include/asm/arch-rockchip/grf_rk3288.h
++++ b/arch/arm/include/asm/arch-rockchip/grf_rk3288.h
+@@ -813,7 +813,7 @@ enum {
+ 		(1 << RK3288_TXCLK_DLY_ENA_GMAC_SHIFT),
+ 	RK3288_TXCLK_DLY_ENA_GMAC_DISABLE = 0,
+ 	RK3288_TXCLK_DLY_ENA_GMAC_ENABLE =
+-		(1 << RK3288_RXCLK_DLY_ENA_GMAC_SHIFT),
++		(1 << RK3288_TXCLK_DLY_ENA_GMAC_SHIFT),
+ 
+ 	RK3288_CLK_RX_DL_CFG_GMAC_SHIFT = 0x7,
+ 	RK3288_CLK_RX_DL_CFG_GMAC_MASK =
+-- 
+1.7.10.4
diff --git a/recipes-bsp/u-boot/u-boot_%.bbappend b/recipes-bsp/u-boot/u-boot_%.bbappend
index efa5eae..1c4c150 100644
--- a/recipes-bsp/u-boot/u-boot_%.bbappend
+++ b/recipes-bsp/u-boot/u-boot_%.bbappend
@@ -1,6 +1,12 @@
 # Copyright (C) 2017 Romain Perier <romain.perier@collabora.com>
 # Released under the MIT license (see COPYING.MIT for the terms)
 
+FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:"
+
+SRC_URI += "\
+    file://0001-rockchip-rk3288-grf-Fix-shift-for-RK3288_TXCLK_DLY_E.patch \
+"
+
 do_compile_append () {
     # Copy spl to default search path, so do_install from u-boot.inc
     # works
-- 
1.8.3.1

Re: [meta-rockchip][PATCH 2/2] u-boot: Backport upstream fix for gmac_rockchip

[Trevor Woerner]

Hi Romain,

I assume this patch is meant to fix an ethernet issue in u-boot? How does
someone test that ethernet is working from u-boot?

Here is my firefly booting with these patches:


	U-Boot SPL 2017.05 (Jun 17 2017 - 17:12:20)
	Returning to boot ROM...

	U-Boot 2017.05 (Jun 17 2017 - 17:12:20 -0400)

	Model: Firefly-RK3288
	DRAM:  1.7 GiB
	MMC:   dwmmc@ff0c0000: 1, dwmmc@ff0f0000: 0
	*** Warning - bad CRC, using default environment

	In:    serial
	Out:   serial
	Err:   serial
	Net:   
	Warning: ethernet@ff290000 (eth0) using random MAC address - 5a:40:1a:28:0e:43
	eth0: ethernet@ff290000
	Hit any key to stop autoboot:  0 

Here is me configuring the networking stuff in u-boot:

	=> setenv ipaddr 192.168.142.20
	=> setenv netmask 255.255.255.0
	=> setenv serverip 192.168.142.1

Then I try pinging my server:

	=> ping 192.168.142.1
	ethernet@ff290000 Waiting for PHY auto negotiation to complete... done
	Speed: 100, full duplex
	Using ethernet@ff290000 device

The next thing I know my firefly is rebooting:

	data abort
	pc : [<6ada703a>]          lr : [<6ada7dbb>]
	reloc pc : [<0003303a>]    lr : [<00033dbb>]
	sp : 68d67e48  ip : 00000000     fp : 00000002
	r10: 68d77e60  r9 : 68d71ee8     r8 : 00000000
	r7 : 00000001  r6 : 00000000     r5 : 0000002a  r4 : 6adfd04e
	r3 : 14000045  r2 : 148ea8c0     r1 : 018ea8c0  r0 : 6adfd04e
	Flags: nzcv  IRQs off  FIQs off  Mode SVC_32
	Resetting CPU ...


	U-Boot SPL 2017.05 (Jun 17 2017 - 17:12:20)
	Returning to boot ROM...

Re: [meta-rockchip][PATCH 2/2] u-boot: Backport upstream fix for gmac_rockchip

[Romain Perier]

Hi,


Le 18/06/2017 à 00:29, Trevor Woerner a écrit :
> Hi Romain,
>
> I assume this patch is meant to fix an ethernet issue in u-boot? How does
> someone test that ethernet is working from u-boot?

Because it has been merged on upstream and tested by Simon and me.
It only fixes ethernet for 100mbps, another fix for 1gbs is on the way.

Could you retry with ethernet 100mbs ? (in the worst case force your
autonego with ethtool...)

Thanks,
Romain

>
> Here is my firefly booting with these patches:
>
>
> 	U-Boot SPL 2017.05 (Jun 17 2017 - 17:12:20)
> 	Returning to boot ROM...
>
> 	U-Boot 2017.05 (Jun 17 2017 - 17:12:20 -0400)
>
> 	Model: Firefly-RK3288
> 	DRAM:  1.7 GiB
> 	MMC:   dwmmc@ff0c0000: 1, dwmmc@ff0f0000: 0
> 	*** Warning - bad CRC, using default environment
>
> 	In:    serial
> 	Out:   serial
> 	Err:   serial
> 	Net:   
> 	Warning: ethernet@ff290000 (eth0) using random MAC address - 5a:40:1a:28:0e:43
> 	eth0: ethernet@ff290000
> 	Hit any key to stop autoboot:  0 
>
> Here is me configuring the networking stuff in u-boot:
>
> 	=> setenv ipaddr 192.168.142.20
> 	=> setenv netmask 255.255.255.0
> 	=> setenv serverip 192.168.142.1
>
> Then I try pinging my server:
>
> 	=> ping 192.168.142.1
> 	ethernet@ff290000 Waiting for PHY auto negotiation to complete... done
> 	Speed: 100, full duplex
> 	Using ethernet@ff290000 device
>
> The next thing I know my firefly is rebooting:
>
> 	data abort
> 	pc : [<6ada703a>]          lr : [<6ada7dbb>]
> 	reloc pc : [<0003303a>]    lr : [<00033dbb>]
> 	sp : 68d67e48  ip : 00000000     fp : 00000002
> 	r10: 68d77e60  r9 : 68d71ee8     r8 : 00000000
> 	r7 : 00000001  r6 : 00000000     r5 : 0000002a  r4 : 6adfd04e
> 	r3 : 14000045  r2 : 148ea8c0     r1 : 018ea8c0  r0 : 6adfd04e
> 	Flags: nzcv  IRQs off  FIQs off  Mode SVC_32
> 	Resetting CPU ...
>
>
> 	U-Boot SPL 2017.05 (Jun 17 2017 - 17:12:20)
> 	Returning to boot ROM...