* [PATCH v3] iommu/arm-smmu: Plumb in new ACPI identifiers
@ 2017-06-19 15:41 ` Robin Murphy
0 siblings, 0 replies; 6+ messages in thread
From: Robin Murphy @ 2017-06-19 15:41 UTC (permalink / raw)
To: will.deacon-5wv7dgnIgG8, joro-zLv9SwRftAIdnm+yROfE0A
Cc: rrichter-YGCgFSpz5w/QT0dZR+AlfA,
iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA,
stable-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
Revision C of IORT now allows us to identify ARM MMU-401 and the Cavium
ThunderX implementation. Wire them up so that we can probe these models
once firmware starts using the new codes in place of generic ones, and
so that the appropriate features and quirks get enabled when we do.
For the sake of backports and mitigating sychronisation problems with
the ACPICA headers, we'll carry a backup copy of the new definitions
locally for the short term to make life simpler.
CC: stable-u79uwXL29TY76Z2rM5mHXA@public.gmane.org # 4.10
Acked-by: Robert Richter <rrichter-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org>
Tested-by: Robert Richter <rrichter-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org>
Signed-off-by: Robin Murphy <robin.murphy-5wv7dgnIgG8@public.gmane.org>
---
v3: The patch that actually landed in ACPICA was slightly tweaked for
self-consistency, so s/CAVIUM_SMMUV2/CAVIUM_THUNDERX/ to match.
drivers/iommu/arm-smmu.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index 7ec30b08b3bd..7ecd1a0b8419 100644
--- a/drivers/iommu/arm-smmu.c
+++ b/drivers/iommu/arm-smmu.c
@@ -312,6 +312,14 @@ enum arm_smmu_implementation {
CAVIUM_SMMUV2,
};
+/* Until ACPICA headers cover IORT rev. C */
+#ifndef ACPI_IORT_SMMU_CORELINK_MMU401
+#define ACPI_IORT_SMMU_CORELINK_MMU401 0x4
+#endif
+#ifndef ACPI_IORT_SMMU_CAVIUM_THUNDERX
+#define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x5
+#endif
+
struct arm_smmu_s2cr {
struct iommu_group *group;
int count;
@@ -2073,6 +2081,10 @@ static int acpi_smmu_get_data(u32 model, struct arm_smmu_device *smmu)
smmu->version = ARM_SMMU_V1;
smmu->model = GENERIC_SMMU;
break;
+ case ACPI_IORT_SMMU_CORELINK_MMU401:
+ smmu->version = ARM_SMMU_V1_64K;
+ smmu->model = GENERIC_SMMU;
+ break;
case ACPI_IORT_SMMU_V2:
smmu->version = ARM_SMMU_V2;
smmu->model = GENERIC_SMMU;
@@ -2081,6 +2093,10 @@ static int acpi_smmu_get_data(u32 model, struct arm_smmu_device *smmu)
smmu->version = ARM_SMMU_V2;
smmu->model = ARM_MMU500;
break;
+ case ACPI_IORT_SMMU_CAVIUM_THUNDERX:
+ smmu->version = ARM_SMMU_V2;
+ smmu->model = CAVIUM_SMMUV2;
+ break;
default:
ret = -ENODEV;
}
--
2.12.2.dirty
^ permalink raw reply related [flat|nested] 6+ messages in thread* [PATCH v3] iommu/arm-smmu: Plumb in new ACPI identifiers
@ 2017-06-19 15:41 ` Robin Murphy
0 siblings, 0 replies; 6+ messages in thread
From: Robin Murphy @ 2017-06-19 15:41 UTC (permalink / raw)
To: will.deacon, joro; +Cc: iommu, linux-arm-kernel, rrichter, stable
Revision C of IORT now allows us to identify ARM MMU-401 and the Cavium
ThunderX implementation. Wire them up so that we can probe these models
once firmware starts using the new codes in place of generic ones, and
so that the appropriate features and quirks get enabled when we do.
For the sake of backports and mitigating sychronisation problems with
the ACPICA headers, we'll carry a backup copy of the new definitions
locally for the short term to make life simpler.
CC: stable@vger.kernel.org # 4.10
Acked-by: Robert Richter <rrichter@cavium.com>
Tested-by: Robert Richter <rrichter@cavium.com>
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
---
v3: The patch that actually landed in ACPICA was slightly tweaked for
self-consistency, so s/CAVIUM_SMMUV2/CAVIUM_THUNDERX/ to match.
drivers/iommu/arm-smmu.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index 7ec30b08b3bd..7ecd1a0b8419 100644
--- a/drivers/iommu/arm-smmu.c
+++ b/drivers/iommu/arm-smmu.c
@@ -312,6 +312,14 @@ enum arm_smmu_implementation {
CAVIUM_SMMUV2,
};
+/* Until ACPICA headers cover IORT rev. C */
+#ifndef ACPI_IORT_SMMU_CORELINK_MMU401
+#define ACPI_IORT_SMMU_CORELINK_MMU401 0x4
+#endif
+#ifndef ACPI_IORT_SMMU_CAVIUM_THUNDERX
+#define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x5
+#endif
+
struct arm_smmu_s2cr {
struct iommu_group *group;
int count;
@@ -2073,6 +2081,10 @@ static int acpi_smmu_get_data(u32 model, struct arm_smmu_device *smmu)
smmu->version = ARM_SMMU_V1;
smmu->model = GENERIC_SMMU;
break;
+ case ACPI_IORT_SMMU_CORELINK_MMU401:
+ smmu->version = ARM_SMMU_V1_64K;
+ smmu->model = GENERIC_SMMU;
+ break;
case ACPI_IORT_SMMU_V2:
smmu->version = ARM_SMMU_V2;
smmu->model = GENERIC_SMMU;
@@ -2081,6 +2093,10 @@ static int acpi_smmu_get_data(u32 model, struct arm_smmu_device *smmu)
smmu->version = ARM_SMMU_V2;
smmu->model = ARM_MMU500;
break;
+ case ACPI_IORT_SMMU_CAVIUM_THUNDERX:
+ smmu->version = ARM_SMMU_V2;
+ smmu->model = CAVIUM_SMMUV2;
+ break;
default:
ret = -ENODEV;
}
--
2.12.2.dirty
^ permalink raw reply related [flat|nested] 6+ messages in thread* [PATCH v3] iommu/arm-smmu: Plumb in new ACPI identifiers
@ 2017-06-19 15:41 ` Robin Murphy
0 siblings, 0 replies; 6+ messages in thread
From: Robin Murphy @ 2017-06-19 15:41 UTC (permalink / raw)
To: linux-arm-kernel
Revision C of IORT now allows us to identify ARM MMU-401 and the Cavium
ThunderX implementation. Wire them up so that we can probe these models
once firmware starts using the new codes in place of generic ones, and
so that the appropriate features and quirks get enabled when we do.
For the sake of backports and mitigating sychronisation problems with
the ACPICA headers, we'll carry a backup copy of the new definitions
locally for the short term to make life simpler.
CC: stable at vger.kernel.org # 4.10
Acked-by: Robert Richter <rrichter@cavium.com>
Tested-by: Robert Richter <rrichter@cavium.com>
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
---
v3: The patch that actually landed in ACPICA was slightly tweaked for
self-consistency, so s/CAVIUM_SMMUV2/CAVIUM_THUNDERX/ to match.
drivers/iommu/arm-smmu.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index 7ec30b08b3bd..7ecd1a0b8419 100644
--- a/drivers/iommu/arm-smmu.c
+++ b/drivers/iommu/arm-smmu.c
@@ -312,6 +312,14 @@ enum arm_smmu_implementation {
CAVIUM_SMMUV2,
};
+/* Until ACPICA headers cover IORT rev. C */
+#ifndef ACPI_IORT_SMMU_CORELINK_MMU401
+#define ACPI_IORT_SMMU_CORELINK_MMU401 0x4
+#endif
+#ifndef ACPI_IORT_SMMU_CAVIUM_THUNDERX
+#define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x5
+#endif
+
struct arm_smmu_s2cr {
struct iommu_group *group;
int count;
@@ -2073,6 +2081,10 @@ static int acpi_smmu_get_data(u32 model, struct arm_smmu_device *smmu)
smmu->version = ARM_SMMU_V1;
smmu->model = GENERIC_SMMU;
break;
+ case ACPI_IORT_SMMU_CORELINK_MMU401:
+ smmu->version = ARM_SMMU_V1_64K;
+ smmu->model = GENERIC_SMMU;
+ break;
case ACPI_IORT_SMMU_V2:
smmu->version = ARM_SMMU_V2;
smmu->model = GENERIC_SMMU;
@@ -2081,6 +2093,10 @@ static int acpi_smmu_get_data(u32 model, struct arm_smmu_device *smmu)
smmu->version = ARM_SMMU_V2;
smmu->model = ARM_MMU500;
break;
+ case ACPI_IORT_SMMU_CAVIUM_THUNDERX:
+ smmu->version = ARM_SMMU_V2;
+ smmu->model = CAVIUM_SMMUV2;
+ break;
default:
ret = -ENODEV;
}
--
2.12.2.dirty
^ permalink raw reply related [flat|nested] 6+ messages in thread[parent not found: <063a50cff2942c96dc6f24d4f8c8a854a4a6cc30.1497886335.git.robin.murphy-5wv7dgnIgG8@public.gmane.org>]
* Re: [PATCH v3] iommu/arm-smmu: Plumb in new ACPI identifiers
2017-06-19 15:41 ` Robin Murphy
(?)
@ 2017-06-21 9:27 ` Will Deacon
-1 siblings, 0 replies; 6+ messages in thread
From: Will Deacon @ 2017-06-21 9:27 UTC (permalink / raw)
To: Robin Murphy
Cc: rrichter-YGCgFSpz5w/QT0dZR+AlfA, stable-u79uwXL29TY76Z2rM5mHXA,
iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
On Mon, Jun 19, 2017 at 04:41:56PM +0100, Robin Murphy wrote:
> Revision C of IORT now allows us to identify ARM MMU-401 and the Cavium
> ThunderX implementation. Wire them up so that we can probe these models
> once firmware starts using the new codes in place of generic ones, and
> so that the appropriate features and quirks get enabled when we do.
>
> For the sake of backports and mitigating sychronisation problems with
> the ACPICA headers, we'll carry a backup copy of the new definitions
> locally for the short term to make life simpler.
>
> CC: stable-u79uwXL29TY76Z2rM5mHXA@public.gmane.org # 4.10
> Acked-by: Robert Richter <rrichter-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org>
> Tested-by: Robert Richter <rrichter-YGCgFSpz5w/QT0dZR+AlfA@public.gmane.org>
> Signed-off-by: Robin Murphy <robin.murphy-5wv7dgnIgG8@public.gmane.org>
> ---
>
> v3: The patch that actually landed in ACPICA was slightly tweaked for
> self-consistency, so s/CAVIUM_SMMUV2/CAVIUM_THUNDERX/ to match.
>
> drivers/iommu/arm-smmu.c | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
I've picked this one up.
Will
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v3] iommu/arm-smmu: Plumb in new ACPI identifiers
@ 2017-06-21 9:27 ` Will Deacon
0 siblings, 0 replies; 6+ messages in thread
From: Will Deacon @ 2017-06-21 9:27 UTC (permalink / raw)
To: Robin Murphy; +Cc: joro, iommu, linux-arm-kernel, rrichter, stable
On Mon, Jun 19, 2017 at 04:41:56PM +0100, Robin Murphy wrote:
> Revision C of IORT now allows us to identify ARM MMU-401 and the Cavium
> ThunderX implementation. Wire them up so that we can probe these models
> once firmware starts using the new codes in place of generic ones, and
> so that the appropriate features and quirks get enabled when we do.
>
> For the sake of backports and mitigating sychronisation problems with
> the ACPICA headers, we'll carry a backup copy of the new definitions
> locally for the short term to make life simpler.
>
> CC: stable@vger.kernel.org # 4.10
> Acked-by: Robert Richter <rrichter@cavium.com>
> Tested-by: Robert Richter <rrichter@cavium.com>
> Signed-off-by: Robin Murphy <robin.murphy@arm.com>
> ---
>
> v3: The patch that actually landed in ACPICA was slightly tweaked for
> self-consistency, so s/CAVIUM_SMMUV2/CAVIUM_THUNDERX/ to match.
>
> drivers/iommu/arm-smmu.c | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
I've picked this one up.
Will
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH v3] iommu/arm-smmu: Plumb in new ACPI identifiers
@ 2017-06-21 9:27 ` Will Deacon
0 siblings, 0 replies; 6+ messages in thread
From: Will Deacon @ 2017-06-21 9:27 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Jun 19, 2017 at 04:41:56PM +0100, Robin Murphy wrote:
> Revision C of IORT now allows us to identify ARM MMU-401 and the Cavium
> ThunderX implementation. Wire them up so that we can probe these models
> once firmware starts using the new codes in place of generic ones, and
> so that the appropriate features and quirks get enabled when we do.
>
> For the sake of backports and mitigating sychronisation problems with
> the ACPICA headers, we'll carry a backup copy of the new definitions
> locally for the short term to make life simpler.
>
> CC: stable at vger.kernel.org # 4.10
> Acked-by: Robert Richter <rrichter@cavium.com>
> Tested-by: Robert Richter <rrichter@cavium.com>
> Signed-off-by: Robin Murphy <robin.murphy@arm.com>
> ---
>
> v3: The patch that actually landed in ACPICA was slightly tweaked for
> self-consistency, so s/CAVIUM_SMMUV2/CAVIUM_THUNDERX/ to match.
>
> drivers/iommu/arm-smmu.c | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
I've picked this one up.
Will
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2017-06-21 9:27 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2017-06-19 15:41 [PATCH v3] iommu/arm-smmu: Plumb in new ACPI identifiers Robin Murphy
2017-06-19 15:41 ` Robin Murphy
2017-06-19 15:41 ` Robin Murphy
[not found] ` <063a50cff2942c96dc6f24d4f8c8a854a4a6cc30.1497886335.git.robin.murphy-5wv7dgnIgG8@public.gmane.org>
2017-06-21 9:27 ` Will Deacon
2017-06-21 9:27 ` Will Deacon
2017-06-21 9:27 ` Will Deacon
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.