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* [PATCH] advsync: Substitute 'Figure' for 'Table'
@ 2017-06-23 15:17 Akira Yokosawa
  2017-06-23 17:30 ` Paul E. McKenney
  0 siblings, 1 reply; 2+ messages in thread
From: Akira Yokosawa @ 2017-06-23 15:17 UTC (permalink / raw)
  To: Paul E. McKenney; +Cc: perfbook, Akira Yokosawa

From b65cb246b772bf16020ef1f1dab55208a5444fcd Mon Sep 17 00:00:00 2001
From: Akira Yokosawa <akiyks@gmail.com>
Date: Sat, 24 Jun 2017 00:04:14 +0900
Subject: [PATCH] advsync: Substitute 'Figure' for 'Table'

Commit 96ab6febd94c ("advsync: Convert memory-misordering table to
herd7 litmus test") missed these substitutions.

Signed-off-by: Akira Yokosawa <akiyks@gmail.com>
---
 advsync/memorybarriers.tex | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/advsync/memorybarriers.tex b/advsync/memorybarriers.tex
index f165946..901c5a6 100644
--- a/advsync/memorybarriers.tex
+++ b/advsync/memorybarriers.tex
@@ -49,7 +49,7 @@ Unfortunately, these intuitions break down completely in face of
 code that makes direct use of explicit memory barriers for data structures
 in shared memory.
 For example, the litmus test in
-Table~\ref{fig:advsync:Memory Misordering: Store-Buffering Litmus Test}
+Figure~\ref{fig:advsync:Memory Misordering: Store-Buffering Litmus Test}
 appears to guarantee that the assertion never fires.
 After all, if \nbco{0:r2=0},\footnote{
 	That is, Thread~\co{P0()}'s instance of local variable \co{r2}
@@ -65,7 +65,7 @@ assertion.
 The example is symmetric, so similar hopeful reasoning might lead
 us to hope that \nbco{1:r2=0} guarantees that \nbco{0:r2=1}.
 Unfortunately, the lack of memory barriers in
-Table~\ref{fig:advsync:Memory Misordering: Store-Buffering Litmus Test}
+Figure~\ref{fig:advsync:Memory Misordering: Store-Buffering Litmus Test}
 dashes these hopes.
 Both the compiler and the CPU are within their rights to reorder
 the statements within both Thread~\co{P0()} and Thread~\co{P1()},
-- 
2.7.4


^ permalink raw reply related	[flat|nested] 2+ messages in thread

* Re: [PATCH] advsync: Substitute 'Figure' for 'Table'
  2017-06-23 15:17 [PATCH] advsync: Substitute 'Figure' for 'Table' Akira Yokosawa
@ 2017-06-23 17:30 ` Paul E. McKenney
  0 siblings, 0 replies; 2+ messages in thread
From: Paul E. McKenney @ 2017-06-23 17:30 UTC (permalink / raw)
  To: Akira Yokosawa; +Cc: perfbook

On Sat, Jun 24, 2017 at 12:17:50AM +0900, Akira Yokosawa wrote:
> >From b65cb246b772bf16020ef1f1dab55208a5444fcd Mon Sep 17 00:00:00 2001
> From: Akira Yokosawa <akiyks@gmail.com>
> Date: Sat, 24 Jun 2017 00:04:14 +0900
> Subject: [PATCH] advsync: Substitute 'Figure' for 'Table'
> 
> Commit 96ab6febd94c ("advsync: Convert memory-misordering table to
> herd7 litmus test") missed these substitutions.
> 
> Signed-off-by: Akira Yokosawa <akiyks@gmail.com>

I knew I was forgetting something! ;-)

Good catch, queued and pushed, thank you!

							Thanx, Paul

> ---
>  advsync/memorybarriers.tex | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/advsync/memorybarriers.tex b/advsync/memorybarriers.tex
> index f165946..901c5a6 100644
> --- a/advsync/memorybarriers.tex
> +++ b/advsync/memorybarriers.tex
> @@ -49,7 +49,7 @@ Unfortunately, these intuitions break down completely in face of
>  code that makes direct use of explicit memory barriers for data structures
>  in shared memory.
>  For example, the litmus test in
> -Table~\ref{fig:advsync:Memory Misordering: Store-Buffering Litmus Test}
> +Figure~\ref{fig:advsync:Memory Misordering: Store-Buffering Litmus Test}
>  appears to guarantee that the assertion never fires.
>  After all, if \nbco{0:r2=0},\footnote{
>  	That is, Thread~\co{P0()}'s instance of local variable \co{r2}
> @@ -65,7 +65,7 @@ assertion.
>  The example is symmetric, so similar hopeful reasoning might lead
>  us to hope that \nbco{1:r2=0} guarantees that \nbco{0:r2=1}.
>  Unfortunately, the lack of memory barriers in
> -Table~\ref{fig:advsync:Memory Misordering: Store-Buffering Litmus Test}
> +Figure~\ref{fig:advsync:Memory Misordering: Store-Buffering Litmus Test}
>  dashes these hopes.
>  Both the compiler and the CPU are within their rights to reorder
>  the statements within both Thread~\co{P0()} and Thread~\co{P1()},
> -- 
> 2.7.4
> 


^ permalink raw reply	[flat|nested] 2+ messages in thread

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2017-06-23 17:30 ` Paul E. McKenney

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