From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
To: linux-pci@vger.kernel.org, bhelgaas@google.com
Cc: Andrew Lunn <andrew@lunn.ch>,
Gabriele Paoloni <gabriele.paoloni@huawei.com>,
Shawn Lin <shawn.lin@rock-chips.com>,
Will Deacon <will.deacon@arm.com>,
Michal Simek <michal.simek@xilinx.com>,
Thierry Reding <thierry.reding@gmail.com>,
Tanmay Inamdar <tinamdar@apm.com>,
Matthew Minter <matt@masarand.com>, Rob Herring <robh@kernel.org>,
Joao Pinto <Joao.Pinto@synopsys.com>,
Pratyush Anand <pratyush.anand@gmail.com>,
Russell King <linux@armlinux.org.uk>,
Murali Karicheri <m-karicheri2@ti.com>,
Linus Walleij <linus.walleij@linaro.org>,
Jason Cooper <jason@lakedaemon.net>,
Arnd Bergmann <arnd@arndb.de>,
Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com>,
Simon Horman <horms@verge.net.au>,
Mingkai Hu <mingkai.hu@freescale.com>,
linux-arm-kernel@lists.infradead.org,
Thomas Petazzoni <thomas.petazzoni@free-electrons.com>,
Jingoo Han <jingoohan1@gmail.com>,
Stanimir Varbanov <svarbanov@mm-sol.com>,
Minghuan Lian <minghuan.Lian@freescale.com>,
Zhou Wang <wangzhou1@hisilicon.com>,
Roy Zang <tie-fei.zang@freescale.com>
Subject: Re: [RFT PATCH v2 29/42] ARM: PCI: Remove pci_fixup_irqs() call for bios32 host controllers
Date: Sat, 1 Jul 2017 15:06:30 +0100 [thread overview]
Message-ID: <20170701140629.GC8977@red-moon> (raw)
In-Reply-To: <20170608141342.2018-30-lorenzo.pieralisi@arm.com>
Hi Bjorn,
On Thu, Jun 08, 2017 at 03:13:29PM +0100, Lorenzo Pieralisi wrote:
> Legacy PCI host controllers (ie host controllers that set-up the PCI bus
> through the ARM pci_common_init() API) are currently relying on
> pci_fixup_irqs() to assign legacy PCI irqs to devices. This is not ideal
> in that pci_fixup_irqs() assign IRQs for all PCI devices present in a
> given system some of which may well be enabled by the time
> pci_fixup_irqs() is called (ie a system with multiple host controllers).
> With the introduction of struct pci_host_bridge.(*map_irq) pointer it is
> possible to assign IRQs for all devices originating from a PCI host
> bridge at probe time; this is implemented through pci_assign_irq() that
> relies on the struct pci_host_bridge.map_irq pointer to map IRQ for a
> given device.
>
> The benefits this brings are twofold:
>
> - the IRQ for a device is assigned once at probe time
> - the IRQ assignment works also for hotplugged devices
>
> Remove pci_fixup_irqs() call from bios32 code and rely on
> pci_assign_irq() to carry out the IRQ mapping at device probe
> time.
>
> The map_irq() and swizzle_irq() struct pci_host_bridge callbacks are
> set-up in the struct pci_host_bridge created in the bios32
> pcibios_init_hw() function and mach-* code paths (for PCI mach
> implementations that require a specific struct hw_pci.(*scan) function
> callback).
>
> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> Cc: Jason Cooper <jason@lakedaemon.net>
> Cc: Bjorn Helgaas <bhelgaas@google.com>
> Cc: Russell King <linux@armlinux.org.uk>
> Cc: Andrew Lunn <andrew@lunn.ch>
> ---
> arch/arm/kernel/bios32.c | 4 ++--
> arch/arm/mach-dove/pcie.c | 18 ++++++++++--------
> arch/arm/mach-iop13xx/pci.c | 2 ++
> arch/arm/mach-orion5x/pci.c | 28 +++++++++++++++-------------
> 4 files changed, 29 insertions(+), 23 deletions(-)
As I mentioned to you, this patch is incomplete and needs an upgrade
(ie I misread how Orion and the gazillions board file that go with
it to map irqs - apologies but it is very hard to untangle).
I am inlining below an incremental patch to be folded in commit:
feaec00e757a ("ARM/PCI: Remove pci_fixup_irqs() call for bios32 host
controllers")
in your pci/irq-fixups branch, or if you prefer I can send you the
resulting squashed-in patch to replace this one, as you prefer.
I understand timing is tight I am doing all I can to fix this series
up and make 4.13.
Please let me know how I can help, thank you !
Lorenzo
-- >8 --
diff --git a/arch/arm/kernel/bios32.c b/arch/arm/kernel/bios32.c
index da201a2..56dc1a3 100644
--- a/arch/arm/kernel/bios32.c
+++ b/arch/arm/kernel/bios32.c
@@ -484,6 +484,9 @@ static void pcibios_init_hw(struct device *parent, struct hw_pci *hw,
break;
}
+ bridge->map_irq = pcibios_map_irq;
+ bridge->swizzle_irq = pcibios_swizzle;
+
if (hw->scan)
ret = hw->scan(nr, bridge);
else {
@@ -494,8 +497,6 @@ static void pcibios_init_hw(struct device *parent, struct hw_pci *hw,
bridge->busnr = sys->busnr;
bridge->ops = hw->ops;
bridge->msi = hw->msi_ctrl;
- bridge->map_irq = pcibios_map_irq;
- bridge->swizzle_irq = pcibios_swizzle;
bridge->align_resource =
hw->align_resource;
diff --git a/arch/arm/mach-dove/pcie.c b/arch/arm/mach-dove/pcie.c
index 8d54a67..dfb62f3 100644
--- a/arch/arm/mach-dove/pcie.c
+++ b/arch/arm/mach-dove/pcie.c
@@ -152,14 +152,6 @@ static void rc_pci_fixup(struct pci_dev *dev)
}
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MARVELL, PCI_ANY_ID, rc_pci_fixup);
-static int __init dove_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
-{
- struct pci_sys_data *sys = dev->sysdata;
- struct pcie_port *pp = sys->private_data;
-
- return pp->index ? IRQ_DOVE_PCIE1 : IRQ_DOVE_PCIE0;
-}
-
static int __init
dove_pcie_scan_bus(int nr, struct pci_host_bridge *bridge)
{
@@ -175,12 +167,18 @@ dove_pcie_scan_bus(int nr, struct pci_host_bridge *bridge)
bridge->sysdata = sys;
bridge->busnr = sys->busnr;
bridge->ops = &pcie_ops;
- bridge->map_irq = dove_pcie_map_irq;
- bridge->swizzle_irq = pci_common_swizzle;
return pci_scan_root_bus_bridge(bridge);
}
+static int __init dove_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
+{
+ struct pci_sys_data *sys = dev->sysdata;
+ struct pcie_port *pp = sys->private_data;
+
+ return pp->index ? IRQ_DOVE_PCIE1 : IRQ_DOVE_PCIE0;
+}
+
static struct hw_pci dove_pci __initdata = {
.nr_controllers = 2,
.setup = dove_pcie_setup,
diff --git a/arch/arm/mach-iop13xx/pci.c b/arch/arm/mach-iop13xx/pci.c
index 3c51a9b..070d92a 100644
--- a/arch/arm/mach-iop13xx/pci.c
+++ b/arch/arm/mach-iop13xx/pci.c
@@ -532,7 +532,6 @@ int iop13xx_scan_bus(int nr, struct pci_host_bridge *bridge)
bridge->dev.parent = NULL;
bridge->sysdata = sys;
bridge->busnr = sys->busnr;
- bridge->swizzle_irq = pci_common_swizzle;
switch (which_atu) {
case IOP13XX_INIT_ATU_ATUX:
@@ -548,7 +547,6 @@ int iop13xx_scan_bus(int nr, struct pci_host_bridge *bridge)
break;
case IOP13XX_INIT_ATU_ATUE:
bridge->ops = &iop13xx_atue_ops;
- bridge->map_irq = iop13xx_pcie_map_irq;
ret = pci_scan_root_bus_bridge(bridge);
if (!ret)
pci_bus_atue = bridge->bus;
diff --git a/arch/arm/mach-orion5x/pci.c b/arch/arm/mach-orion5x/pci.c
index 0f1c343..76951bf 100644
--- a/arch/arm/mach-orion5x/pci.c
+++ b/arch/arm/mach-orion5x/pci.c
@@ -555,19 +555,6 @@ int __init orion5x_pci_sys_setup(int nr, struct pci_sys_data *sys)
return 0;
}
-int __init orion5x_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
-{
- int bus = dev->bus->number;
-
- /*
- * PCIe endpoint?
- */
- if (orion5x_pci_disabled || bus < orion5x_pci_local_bus_nr())
- return IRQ_ORION5X_PCIE0_INT;
-
- return -1;
-}
-
int __init orion5x_pci_sys_scan_bus(int nr, struct pci_host_bridge *bridge)
{
struct pci_sys_data *sys = pci_host_bridge_priv(bridge);
@@ -576,8 +563,6 @@ int __init orion5x_pci_sys_scan_bus(int nr, struct pci_host_bridge *bridge)
bridge->dev.parent = NULL;
bridge->sysdata = sys;
bridge->busnr = sys->busnr;
- bridge->map_irq = orion5x_pci_map_irq;
- bridge->swizzle_irq = pci_common_swizzle;
if (nr == 0) {
bridge->ops = &pcie_ops;
@@ -592,3 +577,16 @@ int __init orion5x_pci_sys_scan_bus(int nr, struct pci_host_bridge *bridge)
BUG();
return -ENODEV;
}
+
+int __init orion5x_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
+{
+ int bus = dev->bus->number;
+
+ /*
+ * PCIe endpoint?
+ */
+ if (orion5x_pci_disabled || bus < orion5x_pci_local_bus_nr())
+ return IRQ_ORION5X_PCIE0_INT;
+
+ return -1;
+}
--
2.10.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: lorenzo.pieralisi@arm.com (Lorenzo Pieralisi)
To: linux-arm-kernel@lists.infradead.org
Subject: [RFT PATCH v2 29/42] ARM: PCI: Remove pci_fixup_irqs() call for bios32 host controllers
Date: Sat, 1 Jul 2017 15:06:30 +0100 [thread overview]
Message-ID: <20170701140629.GC8977@red-moon> (raw)
In-Reply-To: <20170608141342.2018-30-lorenzo.pieralisi@arm.com>
Hi Bjorn,
On Thu, Jun 08, 2017 at 03:13:29PM +0100, Lorenzo Pieralisi wrote:
> Legacy PCI host controllers (ie host controllers that set-up the PCI bus
> through the ARM pci_common_init() API) are currently relying on
> pci_fixup_irqs() to assign legacy PCI irqs to devices. This is not ideal
> in that pci_fixup_irqs() assign IRQs for all PCI devices present in a
> given system some of which may well be enabled by the time
> pci_fixup_irqs() is called (ie a system with multiple host controllers).
> With the introduction of struct pci_host_bridge.(*map_irq) pointer it is
> possible to assign IRQs for all devices originating from a PCI host
> bridge at probe time; this is implemented through pci_assign_irq() that
> relies on the struct pci_host_bridge.map_irq pointer to map IRQ for a
> given device.
>
> The benefits this brings are twofold:
>
> - the IRQ for a device is assigned once at probe time
> - the IRQ assignment works also for hotplugged devices
>
> Remove pci_fixup_irqs() call from bios32 code and rely on
> pci_assign_irq() to carry out the IRQ mapping at device probe
> time.
>
> The map_irq() and swizzle_irq() struct pci_host_bridge callbacks are
> set-up in the struct pci_host_bridge created in the bios32
> pcibios_init_hw() function and mach-* code paths (for PCI mach
> implementations that require a specific struct hw_pci.(*scan) function
> callback).
>
> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> Cc: Jason Cooper <jason@lakedaemon.net>
> Cc: Bjorn Helgaas <bhelgaas@google.com>
> Cc: Russell King <linux@armlinux.org.uk>
> Cc: Andrew Lunn <andrew@lunn.ch>
> ---
> arch/arm/kernel/bios32.c | 4 ++--
> arch/arm/mach-dove/pcie.c | 18 ++++++++++--------
> arch/arm/mach-iop13xx/pci.c | 2 ++
> arch/arm/mach-orion5x/pci.c | 28 +++++++++++++++-------------
> 4 files changed, 29 insertions(+), 23 deletions(-)
As I mentioned to you, this patch is incomplete and needs an upgrade
(ie I misread how Orion and the gazillions board file that go with
it to map irqs - apologies but it is very hard to untangle).
I am inlining below an incremental patch to be folded in commit:
feaec00e757a ("ARM/PCI: Remove pci_fixup_irqs() call for bios32 host
controllers")
in your pci/irq-fixups branch, or if you prefer I can send you the
resulting squashed-in patch to replace this one, as you prefer.
I understand timing is tight I am doing all I can to fix this series
up and make 4.13.
Please let me know how I can help, thank you !
Lorenzo
-- >8 --
diff --git a/arch/arm/kernel/bios32.c b/arch/arm/kernel/bios32.c
index da201a2..56dc1a3 100644
--- a/arch/arm/kernel/bios32.c
+++ b/arch/arm/kernel/bios32.c
@@ -484,6 +484,9 @@ static void pcibios_init_hw(struct device *parent, struct hw_pci *hw,
break;
}
+ bridge->map_irq = pcibios_map_irq;
+ bridge->swizzle_irq = pcibios_swizzle;
+
if (hw->scan)
ret = hw->scan(nr, bridge);
else {
@@ -494,8 +497,6 @@ static void pcibios_init_hw(struct device *parent, struct hw_pci *hw,
bridge->busnr = sys->busnr;
bridge->ops = hw->ops;
bridge->msi = hw->msi_ctrl;
- bridge->map_irq = pcibios_map_irq;
- bridge->swizzle_irq = pcibios_swizzle;
bridge->align_resource =
hw->align_resource;
diff --git a/arch/arm/mach-dove/pcie.c b/arch/arm/mach-dove/pcie.c
index 8d54a67..dfb62f3 100644
--- a/arch/arm/mach-dove/pcie.c
+++ b/arch/arm/mach-dove/pcie.c
@@ -152,14 +152,6 @@ static void rc_pci_fixup(struct pci_dev *dev)
}
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MARVELL, PCI_ANY_ID, rc_pci_fixup);
-static int __init dove_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
-{
- struct pci_sys_data *sys = dev->sysdata;
- struct pcie_port *pp = sys->private_data;
-
- return pp->index ? IRQ_DOVE_PCIE1 : IRQ_DOVE_PCIE0;
-}
-
static int __init
dove_pcie_scan_bus(int nr, struct pci_host_bridge *bridge)
{
@@ -175,12 +167,18 @@ dove_pcie_scan_bus(int nr, struct pci_host_bridge *bridge)
bridge->sysdata = sys;
bridge->busnr = sys->busnr;
bridge->ops = &pcie_ops;
- bridge->map_irq = dove_pcie_map_irq;
- bridge->swizzle_irq = pci_common_swizzle;
return pci_scan_root_bus_bridge(bridge);
}
+static int __init dove_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
+{
+ struct pci_sys_data *sys = dev->sysdata;
+ struct pcie_port *pp = sys->private_data;
+
+ return pp->index ? IRQ_DOVE_PCIE1 : IRQ_DOVE_PCIE0;
+}
+
static struct hw_pci dove_pci __initdata = {
.nr_controllers = 2,
.setup = dove_pcie_setup,
diff --git a/arch/arm/mach-iop13xx/pci.c b/arch/arm/mach-iop13xx/pci.c
index 3c51a9b..070d92a 100644
--- a/arch/arm/mach-iop13xx/pci.c
+++ b/arch/arm/mach-iop13xx/pci.c
@@ -532,7 +532,6 @@ int iop13xx_scan_bus(int nr, struct pci_host_bridge *bridge)
bridge->dev.parent = NULL;
bridge->sysdata = sys;
bridge->busnr = sys->busnr;
- bridge->swizzle_irq = pci_common_swizzle;
switch (which_atu) {
case IOP13XX_INIT_ATU_ATUX:
@@ -548,7 +547,6 @@ int iop13xx_scan_bus(int nr, struct pci_host_bridge *bridge)
break;
case IOP13XX_INIT_ATU_ATUE:
bridge->ops = &iop13xx_atue_ops;
- bridge->map_irq = iop13xx_pcie_map_irq;
ret = pci_scan_root_bus_bridge(bridge);
if (!ret)
pci_bus_atue = bridge->bus;
diff --git a/arch/arm/mach-orion5x/pci.c b/arch/arm/mach-orion5x/pci.c
index 0f1c343..76951bf 100644
--- a/arch/arm/mach-orion5x/pci.c
+++ b/arch/arm/mach-orion5x/pci.c
@@ -555,19 +555,6 @@ int __init orion5x_pci_sys_setup(int nr, struct pci_sys_data *sys)
return 0;
}
-int __init orion5x_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
-{
- int bus = dev->bus->number;
-
- /*
- * PCIe endpoint?
- */
- if (orion5x_pci_disabled || bus < orion5x_pci_local_bus_nr())
- return IRQ_ORION5X_PCIE0_INT;
-
- return -1;
-}
-
int __init orion5x_pci_sys_scan_bus(int nr, struct pci_host_bridge *bridge)
{
struct pci_sys_data *sys = pci_host_bridge_priv(bridge);
@@ -576,8 +563,6 @@ int __init orion5x_pci_sys_scan_bus(int nr, struct pci_host_bridge *bridge)
bridge->dev.parent = NULL;
bridge->sysdata = sys;
bridge->busnr = sys->busnr;
- bridge->map_irq = orion5x_pci_map_irq;
- bridge->swizzle_irq = pci_common_swizzle;
if (nr == 0) {
bridge->ops = &pcie_ops;
@@ -592,3 +577,16 @@ int __init orion5x_pci_sys_scan_bus(int nr, struct pci_host_bridge *bridge)
BUG();
return -ENODEV;
}
+
+int __init orion5x_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
+{
+ int bus = dev->bus->number;
+
+ /*
+ * PCIe endpoint?
+ */
+ if (orion5x_pci_disabled || bus < orion5x_pci_local_bus_nr())
+ return IRQ_ORION5X_PCIE0_INT;
+
+ return -1;
+}
--
2.10.0
next prev parent reply other threads:[~2017-07-01 14:06 UTC|newest]
Thread overview: 139+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-08 14:13 [RFT PATCH v2 00/42] PCI: ARM/ARM64: remove pci_fixup_irqs() usage Lorenzo Pieralisi
2017-06-08 14:13 ` Lorenzo Pieralisi
2017-06-08 14:13 ` [RFT PATCH v2 01/42] PCI: xilinx-nwl: Remove nwl_pcie_enable_msi() unused bus parameter Lorenzo Pieralisi
2017-06-08 14:13 ` Lorenzo Pieralisi
2017-06-08 14:13 ` [RFT PATCH v2 02/42] drivers: pci: host: iproc: Convert link check to raw PCI config accessors Lorenzo Pieralisi
2017-06-08 14:13 ` Lorenzo Pieralisi
2017-06-08 15:56 ` Ray Jui
2017-06-08 16:36 ` Lorenzo Pieralisi
2017-06-08 16:36 ` Lorenzo Pieralisi
2017-06-11 4:12 ` Oza Oza
2017-06-11 4:12 ` Oza Oza
2017-06-12 16:13 ` Lorenzo Pieralisi
2017-06-12 16:13 ` Lorenzo Pieralisi
2017-06-12 17:40 ` Oza Oza
2017-06-12 18:52 ` Ray Jui
2017-06-13 8:22 ` Oza Oza
2017-06-13 17:18 ` Ray Jui
2017-06-14 13:39 ` Lorenzo Pieralisi
2017-06-14 13:39 ` Lorenzo Pieralisi
2017-06-21 14:39 ` Oza Oza
2017-06-21 14:39 ` Oza Oza
2017-07-19 12:13 ` Oza Oza
2017-07-19 17:48 ` Lorenzo Pieralisi
2017-07-19 17:48 ` Lorenzo Pieralisi
2017-06-08 14:13 ` [RFT PATCH v2 03/42] drivers: pci: host: ftpci100: convert IRQ masking " Lorenzo Pieralisi
2017-06-08 14:13 ` Lorenzo Pieralisi
2017-06-16 9:05 ` Linus Walleij
2017-06-16 9:05 ` Linus Walleij
2017-06-08 14:13 ` [RFT PATCH v2 04/42] PCI: Initialize bridge release function at bridge allocation Lorenzo Pieralisi
2017-06-08 14:13 ` Lorenzo Pieralisi
2017-06-08 14:13 ` [RFT PATCH v2 05/42] PCI: Add pci_free_host_bridge interface Lorenzo Pieralisi
2017-06-08 14:13 ` Lorenzo Pieralisi
2017-06-08 14:13 ` [RFT PATCH v2 06/42] PCI: Add devm_pci_alloc_host_bridge() interface Lorenzo Pieralisi
2017-06-08 14:13 ` Lorenzo Pieralisi
2017-06-08 14:13 ` [RFT PATCH v2 07/42] drivers: pci: host: ftpci100: Fix host bridge memory leakage Lorenzo Pieralisi
2017-06-08 14:13 ` Lorenzo Pieralisi
2017-06-16 9:02 ` Linus Walleij
2017-06-16 9:02 ` Linus Walleij
2017-06-08 14:13 ` [RFT PATCH v2 08/42] drivers: pci: host: tegra: " Lorenzo Pieralisi
2017-06-08 14:13 ` Lorenzo Pieralisi
2017-06-08 14:13 ` [RFT PATCH v2 09/42] PCI: Introduce pci_scan_root_bus_bridge() Lorenzo Pieralisi
2017-06-08 14:13 ` Lorenzo Pieralisi
2017-06-08 14:13 ` [RFT PATCH v2 10/42] PCI: Make pci_register_host_bridge() PCI core internal Lorenzo Pieralisi
2017-06-08 14:13 ` Lorenzo Pieralisi
2017-06-08 14:13 ` [RFT PATCH v2 11/42] ARM: PCI: bios32: Convert PCI scan API to pci_scan_root_bus_bridge() Lorenzo Pieralisi
2017-06-08 14:13 ` Lorenzo Pieralisi
2017-06-08 14:13 ` [RFT PATCH v2 12/42] PCI: designware: " Lorenzo Pieralisi
2017-06-08 14:13 ` Lorenzo Pieralisi
2017-06-08 14:13 ` [RFT PATCH v2 13/42] PCI: aardvark: " Lorenzo Pieralisi
2017-06-08 14:13 ` Lorenzo Pieralisi
2017-06-08 14:13 ` [RFT PATCH v2 14/42] PCI: rcar: " Lorenzo Pieralisi
2017-06-08 14:13 ` Lorenzo Pieralisi
2017-06-08 14:13 ` [RFT PATCH v2 15/42] PCI: iproc: " Lorenzo Pieralisi
2017-06-08 14:13 ` Lorenzo Pieralisi
2017-06-08 14:13 ` [RFT PATCH v2 16/42] PCI: versatile: " Lorenzo Pieralisi
2017-06-08 14:13 ` Lorenzo Pieralisi
2017-06-08 14:13 ` [RFT PATCH v2 17/42] PCI: altera: " Lorenzo Pieralisi
2017-06-08 14:13 ` Lorenzo Pieralisi
2017-06-08 14:13 ` [RFT PATCH v2 18/42] PCI: xilinx: " Lorenzo Pieralisi
2017-06-08 14:13 ` Lorenzo Pieralisi
2017-06-08 14:13 ` [RFT PATCH v2 19/42] PCI: xgene: " Lorenzo Pieralisi
2017-06-08 14:13 ` Lorenzo Pieralisi
2017-06-08 14:13 ` [RFT PATCH v2 20/42] PCI: host-common: " Lorenzo Pieralisi
2017-06-08 14:13 ` Lorenzo Pieralisi
2017-06-08 14:13 ` [RFT PATCH v2 21/42] PCI: rockchip: " Lorenzo Pieralisi
2017-06-08 14:13 ` Lorenzo Pieralisi
2017-06-08 14:13 ` [RFT PATCH v2 22/42] PCI: xilinx-nwl: " Lorenzo Pieralisi
2017-06-08 14:13 ` Lorenzo Pieralisi
2017-06-08 14:13 ` [RFT PATCH v2 23/42] PCI: Remove pci_scan_root_bus_msi() Lorenzo Pieralisi
2017-06-08 14:13 ` Lorenzo Pieralisi
2017-06-08 14:13 ` [RFT PATCH v2 24/42] PCI: Build setup-irq.o on all arches Lorenzo Pieralisi
2017-06-08 14:13 ` Lorenzo Pieralisi
2017-06-08 14:13 ` [RFT PATCH v2 25/42] PCI: Add IRQ mapping function pointers to pci_host_bridge struct Lorenzo Pieralisi
2017-06-08 14:13 ` Lorenzo Pieralisi
2017-06-08 14:13 ` [RFT PATCH v2 26/42] PCI: Add pci_assign_irq() function and have pci_fixup_irqs() use it Lorenzo Pieralisi
2017-06-08 14:13 ` Lorenzo Pieralisi
2017-06-08 14:13 ` [RFT PATCH v2 27/42] OF/PCI: Update of_irq_parse_and_map_pci() comment Lorenzo Pieralisi
2017-06-08 14:13 ` Lorenzo Pieralisi
2017-06-08 14:13 ` [RFT PATCH v2 28/42] PCI: Add a call to pci_assign_irq() in pci_device_probe() Lorenzo Pieralisi
2017-06-08 14:13 ` Lorenzo Pieralisi
2017-06-08 14:13 ` [RFT PATCH v2 29/42] ARM: PCI: Remove pci_fixup_irqs() call for bios32 host controllers Lorenzo Pieralisi
2017-06-08 14:13 ` Lorenzo Pieralisi
2017-07-01 14:06 ` Lorenzo Pieralisi [this message]
2017-07-01 14:06 ` Lorenzo Pieralisi
2017-07-02 21:19 ` Bjorn Helgaas
2017-07-02 21:19 ` Bjorn Helgaas
2017-07-03 10:26 ` Lorenzo Pieralisi
2017-07-03 10:26 ` Lorenzo Pieralisi
2017-06-08 14:13 ` [RFT PATCH v2 30/42] PCI: tegra: Drop pci_fixup_irqs() Lorenzo Pieralisi
2017-06-08 14:13 ` Lorenzo Pieralisi
2017-06-08 14:13 ` [RFT PATCH v2 31/42] PCI: xilinx: " Lorenzo Pieralisi
2017-06-08 14:13 ` Lorenzo Pieralisi
2017-06-08 14:13 ` [RFT PATCH v2 32/42] PCI: rcar: " Lorenzo Pieralisi
2017-06-08 14:13 ` Lorenzo Pieralisi
2017-06-08 14:13 ` [RFT PATCH v2 33/42] PCI: iproc: " Lorenzo Pieralisi
2017-06-08 14:13 ` Lorenzo Pieralisi
2017-06-08 14:13 ` [RFT PATCH v2 34/42] PCI: designware-host: " Lorenzo Pieralisi
2017-06-08 14:13 ` Lorenzo Pieralisi
2017-06-08 14:13 ` [RFT PATCH v2 35/42] PCI: ftpci100: " Lorenzo Pieralisi
2017-06-08 14:13 ` Lorenzo Pieralisi
2017-06-08 14:13 ` [RFT PATCH v2 36/42] PCI: host-common: " Lorenzo Pieralisi
2017-06-08 14:13 ` Lorenzo Pieralisi
2017-06-08 14:13 ` [RFT PATCH v2 37/42] PCI: versatile: " Lorenzo Pieralisi
2017-06-08 14:13 ` Lorenzo Pieralisi
2017-06-08 14:13 ` [RFT PATCH v2 38/42] PCI: altera: " Lorenzo Pieralisi
2017-06-08 14:13 ` Lorenzo Pieralisi
2017-06-08 14:13 ` [RFT PATCH v2 39/42] PCI: xgene: Move to struct pci_host_bridge IRQ mapping functions Lorenzo Pieralisi
2017-06-08 14:13 ` Lorenzo Pieralisi
2017-06-08 14:13 ` [RFT PATCH v2 40/42] PCI: rockchip: " Lorenzo Pieralisi
2017-06-08 14:13 ` Lorenzo Pieralisi
2017-06-08 14:13 ` [RFT PATCH v2 41/42] PCI: xilinx-nwl: " Lorenzo Pieralisi
2017-06-08 14:13 ` Lorenzo Pieralisi
2017-06-08 14:13 ` [RFT PATCH v2 42/42] ARM64: PCI: Drop DT IRQ allocation from pcibios_alloc_irq() Lorenzo Pieralisi
2017-06-08 14:13 ` Lorenzo Pieralisi
2017-06-12 15:45 ` [RFT PATCH v2 00/42] PCI: ARM/ARM64: remove pci_fixup_irqs() usage Will Deacon
2017-06-12 15:45 ` Will Deacon
2017-06-12 16:20 ` Lorenzo Pieralisi
2017-06-12 16:20 ` Lorenzo Pieralisi
2017-06-12 23:58 ` Khuong Dinh
2017-06-19 23:12 ` Bjorn Helgaas
2017-06-19 23:12 ` Bjorn Helgaas
2017-06-20 14:44 ` Lorenzo Pieralisi
2017-06-20 14:44 ` Lorenzo Pieralisi
2017-06-21 8:39 ` Linus Walleij
2017-06-21 8:39 ` Linus Walleij
2017-06-21 9:50 ` Lorenzo Pieralisi
2017-06-21 9:50 ` Lorenzo Pieralisi
2017-06-21 10:30 ` Lorenzo Pieralisi
2017-06-21 10:30 ` Lorenzo Pieralisi
2017-06-21 10:45 ` Lorenzo Pieralisi
2017-06-21 10:45 ` Lorenzo Pieralisi
2017-06-21 14:51 ` Linus Walleij
2017-06-21 14:51 ` Linus Walleij
2017-06-21 15:14 ` Linus Walleij
2017-06-21 15:14 ` Linus Walleij
2017-06-21 15:41 ` Lorenzo Pieralisi
2017-06-21 15:41 ` Lorenzo Pieralisi
2017-06-21 16:28 ` Linus Walleij
2017-06-21 16:28 ` Linus Walleij
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20170701140629.GC8977@red-moon \
--to=lorenzo.pieralisi@arm.com \
--cc=Joao.Pinto@synopsys.com \
--cc=andrew@lunn.ch \
--cc=arnd@arndb.de \
--cc=bharat.kumar.gogada@xilinx.com \
--cc=bhelgaas@google.com \
--cc=gabriele.paoloni@huawei.com \
--cc=horms@verge.net.au \
--cc=jason@lakedaemon.net \
--cc=jingoohan1@gmail.com \
--cc=linus.walleij@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-pci@vger.kernel.org \
--cc=linux@armlinux.org.uk \
--cc=m-karicheri2@ti.com \
--cc=matt@masarand.com \
--cc=michal.simek@xilinx.com \
--cc=minghuan.Lian@freescale.com \
--cc=mingkai.hu@freescale.com \
--cc=pratyush.anand@gmail.com \
--cc=robh@kernel.org \
--cc=shawn.lin@rock-chips.com \
--cc=svarbanov@mm-sol.com \
--cc=thierry.reding@gmail.com \
--cc=thomas.petazzoni@free-electrons.com \
--cc=tie-fei.zang@freescale.com \
--cc=tinamdar@apm.com \
--cc=wangzhou1@hisilicon.com \
--cc=will.deacon@arm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.