From: "Michael S. Tsirkin" <mst@redhat.com>
To: Peter Xu <peterx@redhat.com>
Cc: qemu-devel@nongnu.org, Jason Wang <jasowang@redhat.com>
Subject: Re: [Qemu-devel] [PATCH v3 2/4] intel_iommu: let iotlb size tunable
Date: Thu, 13 Jul 2017 20:47:00 +0300 [thread overview]
Message-ID: <20170713204619-mutt-send-email-mst@kernel.org> (raw)
In-Reply-To: <1499847223-8078-3-git-send-email-peterx@redhat.com>
On Wed, Jul 12, 2017 at 04:13:41PM +0800, Peter Xu wrote:
> We were having static IOTLB size as 1024. Let it be a tunable. We can
> also turns IOTLB off if we want, by specify the size as zero.
>
> The tunable is named as "x-iotlb-size" since that should not really be
> something used by user yet, but mostly for debugging purpose now.
>
> Signed-off-by: Peter Xu <peterx@redhat.com>
I'm somewhat vary of adding tunables just for developers to play with.
People will find and abuse them :)
> ---
> hw/i386/intel_iommu.c | 11 ++++++++++-
> hw/i386/intel_iommu_internal.h | 1 -
> include/hw/i386/intel_iommu.h | 1 +
> 3 files changed, 11 insertions(+), 2 deletions(-)
>
> diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
> index 392da45..9c36866 100644
> --- a/hw/i386/intel_iommu.c
> +++ b/hw/i386/intel_iommu.c
> @@ -222,6 +222,10 @@ static VTDIOTLBEntry *vtd_lookup_iotlb(IntelIOMMUState *s, uint16_t source_id,
> uint64_t key;
> int level;
>
> + if (s->iotlb_size == 0) {
> + return NULL;
> + }
> +
> for (level = VTD_SL_PT_LEVEL; level < VTD_SL_PML4_LEVEL; level++) {
> key = vtd_get_iotlb_key(vtd_get_iotlb_gfn(addr, level),
> source_id, level);
> @@ -244,8 +248,12 @@ static void vtd_update_iotlb(IntelIOMMUState *s, uint16_t source_id,
> uint64_t *key = g_malloc(sizeof(*key));
> uint64_t gfn = vtd_get_iotlb_gfn(addr, level);
>
> + if (s->iotlb_size == 0) {
> + return;
> + }
> +
> trace_vtd_iotlb_page_update(source_id, addr, slpte, domain_id);
> - if (g_hash_table_size(s->iotlb) >= VTD_IOTLB_MAX_SIZE) {
> + if (g_hash_table_size(s->iotlb) >= s->iotlb_size) {
> trace_vtd_iotlb_reset("iotlb exceeds size limit");
> vtd_reset_iotlb(s);
> }
> @@ -2397,6 +2405,7 @@ static Property vtd_properties[] = {
> ON_OFF_AUTO_AUTO),
> DEFINE_PROP_BOOL("x-buggy-eim", IntelIOMMUState, buggy_eim, false),
> DEFINE_PROP_BOOL("caching-mode", IntelIOMMUState, caching_mode, FALSE),
> + DEFINE_PROP_UINT16("x-iotlb-size", IntelIOMMUState, iotlb_size, 1024),
> DEFINE_PROP_END_OF_LIST(),
> };
>
> diff --git a/hw/i386/intel_iommu_internal.h b/hw/i386/intel_iommu_internal.h
> index 754cf8a..2d77249 100644
> --- a/hw/i386/intel_iommu_internal.h
> +++ b/hw/i386/intel_iommu_internal.h
> @@ -116,7 +116,6 @@
> /* The shift of source_id in the key of IOTLB hash table */
> #define VTD_IOTLB_SID_SHIFT 36
> #define VTD_IOTLB_LVL_SHIFT 52
> -#define VTD_IOTLB_MAX_SIZE 1024 /* Max size of the hash table */
>
> /* IOTLB_REG */
> #define VTD_TLB_GLOBAL_FLUSH (1ULL << 60) /* Global invalidation */
> diff --git a/include/hw/i386/intel_iommu.h b/include/hw/i386/intel_iommu.h
> index 3e51876..a57f419 100644
> --- a/include/hw/i386/intel_iommu.h
> +++ b/include/hw/i386/intel_iommu.h
> @@ -288,6 +288,7 @@ struct IntelIOMMUState {
>
> uint32_t context_cache_gen; /* Should be in [1,MAX] */
> GHashTable *iotlb; /* IOTLB */
> + uint16_t iotlb_size; /* IOTLB max cache entries */
>
> MemoryRegionIOMMUOps iommu_ops;
> GHashTable *vtd_as_by_busptr; /* VTDBus objects indexed by PCIBus* reference */
> --
> 2.7.4
next prev parent reply other threads:[~2017-07-13 17:47 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-07-12 8:13 [Qemu-devel] [PATCH v3 0/4] VT-d: some enhancements on iotlb Peter Xu
2017-07-12 8:13 ` [Qemu-devel] [PATCH v3 1/4] intel_iommu: fix VTD_PAGE_MASK Peter Xu
2017-07-13 8:41 ` Jason Wang
2017-07-14 4:27 ` Peter Xu
2017-07-12 8:13 ` [Qemu-devel] [PATCH v3 2/4] intel_iommu: let iotlb size tunable Peter Xu
2017-07-13 17:47 ` Michael S. Tsirkin [this message]
2017-07-14 4:31 ` Peter Xu
2017-07-12 8:13 ` [Qemu-devel] [PATCH v3 3/4] intel_iommu: use access_flags for iotlb Peter Xu
2017-07-12 8:13 ` [Qemu-devel] [PATCH v3 4/4] intel_iommu: implement mru list " Peter Xu
2017-07-13 8:48 ` Jason Wang
2017-07-14 4:32 ` Peter Xu
2017-07-14 7:28 ` Jason Wang
2017-07-17 1:53 ` Peter Xu
2017-07-26 20:37 ` Michael S. Tsirkin
2017-07-27 2:19 ` Peter Xu
2017-07-13 17:49 ` Michael S. Tsirkin
2017-07-14 4:43 ` Peter Xu
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