From: jan.glauber@caviumnetworks.com (Jan Glauber)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters
Date: Wed, 26 Jul 2017 17:45:15 +0200 [thread overview]
Message-ID: <20170726154515.GA11453@hc> (raw)
In-Reply-To: <20170726153502.GE28875@nazgul.tnic>
On Wed, Jul 26, 2017 at 05:35:02PM +0200, Borislav Petkov wrote:
> On Wed, Jul 26, 2017 at 05:13:14PM +0200, Jan Glauber wrote:
> > I'm also looking for CPU implementor (MIDR), I could check for the model
> > too but I still need to detect devices based on PCI IDs as the model
> > check is not sufficient here (only multi-socket ThunderX has OCX TLK
> > devices).
>
> So what does that mean? The only way to load a PMU driver and an EDAC
> driver is the PCI ID of the memory controller? No other way?
I already tried multiple ways to load the drivers, so far with limited
success :)
The PMU/EDAC devices are all PCI devices do I need the 'struct pci_dev *'.
I'm not aware of other ways to access these devices. Please enlighten
me if I'm missing something.
--Jan
WARNING: multiple messages have this Message-ID (diff)
From: Jan Glauber <jan.glauber@caviumnetworks.com>
To: Borislav Petkov <bp@alien8.de>
Cc: Suzuki K Poulose <Suzuki.Poulose@arm.com>,
Mark Rutland <mark.rutland@arm.com>,
Will Deacon <will.deacon@arm.com>,
linux-arm-kernel@lists.infradead.org,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters
Date: Wed, 26 Jul 2017 17:45:15 +0200 [thread overview]
Message-ID: <20170726154515.GA11453@hc> (raw)
In-Reply-To: <20170726153502.GE28875@nazgul.tnic>
On Wed, Jul 26, 2017 at 05:35:02PM +0200, Borislav Petkov wrote:
> On Wed, Jul 26, 2017 at 05:13:14PM +0200, Jan Glauber wrote:
> > I'm also looking for CPU implementor (MIDR), I could check for the model
> > too but I still need to detect devices based on PCI IDs as the model
> > check is not sufficient here (only multi-socket ThunderX has OCX TLK
> > devices).
>
> So what does that mean? The only way to load a PMU driver and an EDAC
> driver is the PCI ID of the memory controller? No other way?
I already tried multiple ways to load the drivers, so far with limited
success :)
The PMU/EDAC devices are all PCI devices do I need the 'struct pci_dev *'.
I'm not aware of other ways to access these devices. Please enlighten
me if I'm missing something.
--Jan
next prev parent reply other threads:[~2017-07-26 15:45 UTC|newest]
Thread overview: 86+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-07-25 15:04 [PATCH v8 0/3] Cavium ARM64 uncore PMU support Jan Glauber
2017-07-25 15:04 ` Jan Glauber
2017-07-25 15:04 ` [PATCH v8 1/3] perf: cavium: Support memory controller PMU counters Jan Glauber
2017-07-25 15:04 ` Jan Glauber
2017-07-25 15:39 ` Suzuki K Poulose
2017-07-25 15:39 ` Suzuki K Poulose
2017-07-26 11:19 ` Jan Glauber
2017-07-26 11:19 ` Jan Glauber
2017-07-26 12:47 ` Suzuki K Poulose
2017-07-26 12:47 ` Suzuki K Poulose
2017-07-26 13:10 ` Jan Glauber
2017-07-26 13:10 ` Jan Glauber
2017-07-26 14:35 ` Suzuki K Poulose
2017-07-26 14:35 ` Suzuki K Poulose
2017-07-26 14:55 ` Borislav Petkov
2017-07-26 14:55 ` Borislav Petkov
2017-07-26 15:13 ` Jan Glauber
2017-07-26 15:13 ` Jan Glauber
2017-07-26 15:17 ` Suzuki K Poulose
2017-07-26 15:17 ` Suzuki K Poulose
2017-07-26 15:28 ` Borislav Petkov
2017-07-26 15:28 ` Borislav Petkov
2017-07-26 15:46 ` Jan Glauber
2017-07-26 15:46 ` Jan Glauber
2017-07-26 16:25 ` Jonathan Cameron
2017-07-26 16:25 ` Jonathan Cameron
2017-07-26 16:40 ` Jan Glauber
2017-07-26 16:40 ` Jan Glauber
2017-07-26 15:35 ` Borislav Petkov
2017-07-26 15:35 ` Borislav Petkov
2017-07-26 15:45 ` Jan Glauber [this message]
2017-07-26 15:45 ` Jan Glauber
2017-07-26 15:55 ` Borislav Petkov
2017-07-26 15:55 ` Borislav Petkov
2017-07-26 16:19 ` Greg KH
2017-07-26 16:19 ` Greg KH
2017-07-26 16:30 ` Borislav Petkov
2017-07-26 16:30 ` Borislav Petkov
2017-07-26 17:33 ` Greg KH
2017-07-26 17:33 ` Greg KH
2017-07-26 17:33 ` Greg KH
2017-07-26 20:02 ` David Daney
2017-07-26 20:02 ` David Daney
2017-07-26 20:02 ` David Daney
2017-07-26 20:08 ` Greg KH
2017-07-26 20:08 ` Greg KH
2017-07-26 21:02 ` David Daney
2017-07-26 21:02 ` David Daney
2017-07-26 21:02 ` David Daney
2017-07-27 2:29 ` Greg KH
2017-07-27 2:29 ` Greg KH
2017-07-27 2:29 ` Greg KH
2017-07-27 17:29 ` David Daney
2017-07-27 17:29 ` David Daney
2017-07-27 17:29 ` David Daney
2017-07-28 1:11 ` Greg KH
2017-07-28 1:11 ` Greg KH
2017-07-28 1:11 ` Greg KH
2017-07-28 7:23 ` Borislav Petkov
2017-07-28 7:23 ` Borislav Petkov
2017-07-28 7:23 ` Borislav Petkov
2017-07-27 5:11 ` Borislav Petkov
2017-07-27 5:11 ` Borislav Petkov
2017-07-27 5:11 ` Borislav Petkov
2017-07-27 9:08 ` Jan Glauber
2017-07-27 9:08 ` Jan Glauber
2017-07-27 9:08 ` Jan Glauber
2017-07-27 13:15 ` Borislav Petkov
2017-07-27 13:15 ` Borislav Petkov
2017-07-28 23:12 ` Greg KH
2017-07-28 23:12 ` Greg KH
2017-07-28 23:12 ` Greg KH
2017-08-08 13:25 ` Will Deacon
2017-08-08 13:25 ` Will Deacon
2017-08-08 13:25 ` Will Deacon
2017-08-15 9:13 ` Jan Glauber
2017-08-15 9:13 ` Jan Glauber
2017-08-15 9:13 ` Jan Glauber
2017-08-07 9:37 ` Suzuki K Poulose
2017-08-07 9:37 ` Suzuki K Poulose
2017-07-25 15:56 ` Jonathan Cameron
2017-07-25 15:56 ` Jonathan Cameron
2017-07-25 15:04 ` [PATCH v8 2/3] perf: cavium: Support transmit-link " Jan Glauber
2017-07-25 15:04 ` Jan Glauber
2017-07-25 15:04 ` [PATCH v8 3/3] perf: cavium: Add Documentation Jan Glauber
2017-07-25 15:04 ` Jan Glauber
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