From: Shawn Guo <shawnguo@kernel.org>
To: "Sébastien Szymanski" <sebastien.szymanski@armadeus.com>,
"Anson Huang" <anson.huang@nxp.com>,
"Leonard Crestez" <leonard.crestez@nxp.com>
Cc: linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org,
Viresh Kumar <viresh.kumar@linaro.org>,
"Rafael J. Wysocki" <rjw@rjwysocki.net>,
Julien Boibessot <julien.boibessot@armadeus.com>,
Fabio Estevam <fabio.estevam@nxp.com>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 1/1] cpufreq: imx6q: imx6ull: use PLL1 for frequency higher than 528MHz
Date: Thu, 3 Aug 2017 10:03:22 +0800 [thread overview]
Message-ID: <20170803020320.GG31819@dragon> (raw)
In-Reply-To: <1501230993-15812-1-git-send-email-sebastien.szymanski@armadeus.com>
On Fri, Jul 28, 2017 at 10:36:33AM +0200, Sébastien Szymanski wrote:
> Setting the frequency higher than 528Mhz actually sets the ARM
> clock to 528MHz. That's because PLL2 is used as the root clock when the
> frequency is higher than 396MHz.
>
> cpupower frequency-set -f 792000
>
> arm_clk_root on the CCM_CLKO2 signal is 528MHz instead of 792MHz.
>
> [ 61.606383] cpu cpu0: 396 MHz, 1025 mV --> 792 MHz, 1225 mV
>
> pll2 1 1 528000000 0 0
> pll2_bypass 1 1 528000000 0 0
> pll2_bus 3 3 528000000 0 0
> ca7_secondary_sel 1 1 528000000 0 0
> step 1 1 528000000 0 0
> pll1_sw 1 1 528000000 0 0
> arm 1 1 528000000 0 0
>
> Fixes this by using the PLL1 as the root clock when the frequency is
> higher than 528MHz.
>
> cpupower frequency-set -f 792000
>
> arm_clk_root on the CCM_CLKO2 signal is now 792MHz as expected.
>
> [ 69.717987] cpu cpu0: 198 MHz, 950 mV --> 792 MHz, 1225 mV
>
> pll1 1 1 792000000 0 0
> pll1_bypass 1 1 792000000 0 0
> pll1_sys 1 1 792000000 0 0
> pll1_sw 1 1 792000000 0 0
> arm 1 1 792000000 0 0
>
> Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
Can you please specify on which SoCs you are seeing this problem? And I
would like invite Anson and Leonard to review it.
Shawn
> ---
> drivers/cpufreq/imx6q-cpufreq.c | 11 +++++++++--
> 1 file changed, 9 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/cpufreq/imx6q-cpufreq.c b/drivers/cpufreq/imx6q-cpufreq.c
> index b6edd3c..e5fba50 100644
> --- a/drivers/cpufreq/imx6q-cpufreq.c
> +++ b/drivers/cpufreq/imx6q-cpufreq.c
> @@ -18,6 +18,7 @@
>
> #define PU_SOC_VOLTAGE_NORMAL 1250000
> #define PU_SOC_VOLTAGE_HIGH 1275000
> +#define FREQ_528_MHZ 528000000
> #define FREQ_1P2_GHZ 1200000000
>
> static struct regulator *arm_reg;
> @@ -110,14 +111,20 @@ static int imx6q_set_target(struct cpufreq_policy *policy, unsigned int index)
> * voltage of 528MHz, so lower the CPU frequency to one
> * half before changing CPU frequency.
> */
> - clk_set_rate(arm_clk, (old_freq >> 1) * 1000);
> - clk_set_parent(pll1_sw_clk, pll1_sys_clk);
> + if ((old_freq * 1000) <= FREQ_528_MHZ) {
> + clk_set_rate(arm_clk, (old_freq >> 1) * 1000);
> + clk_set_parent(pll1_sw_clk, pll1_sys_clk);
> + }
> if (freq_hz > clk_get_rate(pll2_pfd2_396m_clk))
> clk_set_parent(secondary_sel_clk, pll2_bus_clk);
> else
> clk_set_parent(secondary_sel_clk, pll2_pfd2_396m_clk);
> clk_set_parent(step_clk, secondary_sel_clk);
> clk_set_parent(pll1_sw_clk, step_clk);
> + if (freq_hz > FREQ_528_MHZ) {
> + clk_set_rate(pll1_sys_clk, freq_hz);
> + clk_set_parent(pll1_sw_clk, pll1_sys_clk);
> + }
> } else {
> clk_set_parent(step_clk, pll2_pfd2_396m_clk);
> clk_set_parent(pll1_sw_clk, step_clk);
> --
> 2.7.3
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: shawnguo@kernel.org (Shawn Guo)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/1] cpufreq: imx6q: imx6ull: use PLL1 for frequency higher than 528MHz
Date: Thu, 3 Aug 2017 10:03:22 +0800 [thread overview]
Message-ID: <20170803020320.GG31819@dragon> (raw)
In-Reply-To: <1501230993-15812-1-git-send-email-sebastien.szymanski@armadeus.com>
On Fri, Jul 28, 2017 at 10:36:33AM +0200, S?bastien Szymanski wrote:
> Setting the frequency higher than 528Mhz actually sets the ARM
> clock to 528MHz. That's because PLL2 is used as the root clock when the
> frequency is higher than 396MHz.
>
> cpupower frequency-set -f 792000
>
> arm_clk_root on the CCM_CLKO2 signal is 528MHz instead of 792MHz.
>
> [ 61.606383] cpu cpu0: 396 MHz, 1025 mV --> 792 MHz, 1225 mV
>
> pll2 1 1 528000000 0 0
> pll2_bypass 1 1 528000000 0 0
> pll2_bus 3 3 528000000 0 0
> ca7_secondary_sel 1 1 528000000 0 0
> step 1 1 528000000 0 0
> pll1_sw 1 1 528000000 0 0
> arm 1 1 528000000 0 0
>
> Fixes this by using the PLL1 as the root clock when the frequency is
> higher than 528MHz.
>
> cpupower frequency-set -f 792000
>
> arm_clk_root on the CCM_CLKO2 signal is now 792MHz as expected.
>
> [ 69.717987] cpu cpu0: 198 MHz, 950 mV --> 792 MHz, 1225 mV
>
> pll1 1 1 792000000 0 0
> pll1_bypass 1 1 792000000 0 0
> pll1_sys 1 1 792000000 0 0
> pll1_sw 1 1 792000000 0 0
> arm 1 1 792000000 0 0
>
> Signed-off-by: S?bastien Szymanski <sebastien.szymanski@armadeus.com>
Can you please specify on which SoCs you are seeing this problem? And I
would like invite Anson and Leonard to review it.
Shawn
> ---
> drivers/cpufreq/imx6q-cpufreq.c | 11 +++++++++--
> 1 file changed, 9 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/cpufreq/imx6q-cpufreq.c b/drivers/cpufreq/imx6q-cpufreq.c
> index b6edd3c..e5fba50 100644
> --- a/drivers/cpufreq/imx6q-cpufreq.c
> +++ b/drivers/cpufreq/imx6q-cpufreq.c
> @@ -18,6 +18,7 @@
>
> #define PU_SOC_VOLTAGE_NORMAL 1250000
> #define PU_SOC_VOLTAGE_HIGH 1275000
> +#define FREQ_528_MHZ 528000000
> #define FREQ_1P2_GHZ 1200000000
>
> static struct regulator *arm_reg;
> @@ -110,14 +111,20 @@ static int imx6q_set_target(struct cpufreq_policy *policy, unsigned int index)
> * voltage of 528MHz, so lower the CPU frequency to one
> * half before changing CPU frequency.
> */
> - clk_set_rate(arm_clk, (old_freq >> 1) * 1000);
> - clk_set_parent(pll1_sw_clk, pll1_sys_clk);
> + if ((old_freq * 1000) <= FREQ_528_MHZ) {
> + clk_set_rate(arm_clk, (old_freq >> 1) * 1000);
> + clk_set_parent(pll1_sw_clk, pll1_sys_clk);
> + }
> if (freq_hz > clk_get_rate(pll2_pfd2_396m_clk))
> clk_set_parent(secondary_sel_clk, pll2_bus_clk);
> else
> clk_set_parent(secondary_sel_clk, pll2_pfd2_396m_clk);
> clk_set_parent(step_clk, secondary_sel_clk);
> clk_set_parent(pll1_sw_clk, step_clk);
> + if (freq_hz > FREQ_528_MHZ) {
> + clk_set_rate(pll1_sys_clk, freq_hz);
> + clk_set_parent(pll1_sw_clk, pll1_sys_clk);
> + }
> } else {
> clk_set_parent(step_clk, pll2_pfd2_396m_clk);
> clk_set_parent(pll1_sw_clk, step_clk);
> --
> 2.7.3
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2017-08-03 2:04 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-07-28 8:36 [PATCH 1/1] cpufreq: imx6q: imx6ull: use PLL1 for frequency higher than 528MHz Sébastien Szymanski
2017-07-28 8:36 ` Sébastien Szymanski
2017-07-28 8:36 ` Sébastien Szymanski
2017-08-01 23:25 ` Rafael J. Wysocki
2017-08-01 23:25 ` Rafael J. Wysocki
2017-08-02 3:49 ` Viresh Kumar
2017-08-02 3:49 ` Viresh Kumar
2017-08-03 2:03 ` Shawn Guo [this message]
2017-08-03 2:03 ` Shawn Guo
2017-08-03 7:32 ` Sébastien Szymanski
2017-08-03 7:32 ` Sébastien Szymanski
2017-08-03 7:32 ` Sébastien Szymanski
2017-08-04 11:17 ` Leonard Crestez
2017-08-04 11:17 ` Leonard Crestez
2017-08-04 11:17 ` Leonard Crestez
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