[Qemu-devel] [PULL 0/2] virtio: fix for rc2

[Qemu-devel] [PULL 0/2] virtio: fix for rc2

[Michael S. Tsirkin]

The following changes since commit e6a74868d92f858ac33915b6772999d7de2fd288:

  build-sys: add --disable-vhost-user (2017-08-03 15:55:41 +0300)

are available in the git repository at:

  git://git.kernel.org/pub/scm/virt/kvm/mst/qemu.git tags/for_upstream

for you to fetch changes up to e2a7f28693aea7e194ec1435697ec4feb24f8a6f:

  cpu: add APIs to allocate/free CPU environment (2017-08-08 00:31:09 +0300)

----------------------------------------------------------------
virtio: fix for rc2

It turns out there's a way to setup SHPC on Q35: just put
a PCI to PCI bridge behind a DMI to PCI one. Our _OSC is
thus incorrect.

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>

----------------------------------------------------------------
Aleksandr Bezzubikov (1):
      hw/i386: allow SHPC for Q35 machine

Michael S. Tsirkin (1):
      cpu: add APIs to allocate/free CPU environment

 include/qom/cpu.h    | 31 +++++++++++++++++++++++++++++++
 hw/i386/acpi-build.c |  4 ++--
 qom/cpu.c            | 34 ++++++++++++++++++++++++++++++++++
 3 files changed, 67 insertions(+), 2 deletions(-)

[Qemu-devel] [PULL 1/2] hw/i386: allow SHPC for Q35 machine

[Michael S. Tsirkin]

From: Aleksandr Bezzubikov <zuban32s@gmail.com>

Unmask previously masked SHPC feature in _OSC method.

Signed-off-by: Aleksandr Bezzubikov <zuban32s@gmail.com>
Reviewed-by: Marcel Apfelbaum <marcel@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
 hw/i386/acpi-build.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index b9c245c..98dd424 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -1862,9 +1862,9 @@ static Aml *build_q35_osc_method(void)
 
     /*
      * Always allow native PME, AER (no dependencies)
-     * Never allow SHPC (no SHPC controller in this system)
+     * Allow SHPC (PCI bridges can have SHPC controller)
      */
-    aml_append(if_ctx, aml_and(a_ctrl, aml_int(0x1D), a_ctrl));
+    aml_append(if_ctx, aml_and(a_ctrl, aml_int(0x1F), a_ctrl));
 
     if_ctx2 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(1))));
     /* Unknown revision */
-- 
MST

[Qemu-devel] [PULL 2/2] cpu: add APIs to allocate/free CPU environment

[Michael S. Tsirkin]

These will be implemented and then used by follow-up patches.

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
 include/qom/cpu.h | 31 +++++++++++++++++++++++++++++++
 qom/cpu.c         | 34 ++++++++++++++++++++++++++++++++++
 2 files changed, 65 insertions(+)

diff --git a/include/qom/cpu.h b/include/qom/cpu.h
index 25eefea..e9d30c5 100644
--- a/include/qom/cpu.h
+++ b/include/qom/cpu.h
@@ -162,6 +162,10 @@ typedef struct CPUClass {
     void (*dump_statistics)(CPUState *cpu, FILE *f,
                             fprintf_function cpu_fprintf, int flags);
     int64_t (*get_arch_id)(CPUState *cpu);
+    void * (*alloc_env)(CPUState *cpu);
+    void (*get_env)(CPUState *cpu, void *env);
+    void (*set_env)(CPUState *cpu, void *env);
+    void (*free_env)(CPUState *cpu, void *env);
     bool (*get_paging_enabled)(const CPUState *cpu);
     void (*get_memory_mapping)(CPUState *cpu, MemoryMappingList *list,
                                Error **errp);
@@ -440,6 +444,33 @@ extern bool mttcg_enabled;
 #define qemu_tcg_mttcg_enabled() (mttcg_enabled)
 
 /**
+ * cpu_alloc_env: allocate CPU environment structure
+ * @cpu: allocate environment structure for this CPU
+ */
+void *cpu_alloc_env(CPUState *cpu);
+
+/**
+ * cpu_get_env: retrieve CPU environment structure
+ * @cpu: CPU to use
+ * @env: environment structure to use
+ */
+void cpu_get_env(CPUState *cpu, void *env);
+
+/**
+ * cpu_set_env: switch to given CPU environment
+ * @cpu: CPU to use
+ * @env: environment structure to use
+ */
+void cpu_set_env(CPUState *cpu, void *env);
+
+/**
+ * cpu_free_env: free CPU environment structure
+ * @cpu: free environment structure for this CPU
+ * @env: structure to free
+ */
+void cpu_free_env(CPUState *cpu, void *env);
+
+/**
  * cpu_paging_enabled:
  * @cpu: The CPU whose state is to be inspected.
  *
diff --git a/qom/cpu.c b/qom/cpu.c
index 4f38db0..9201fd9 100644
--- a/qom/cpu.c
+++ b/qom/cpu.c
@@ -89,6 +89,40 @@ out:
     return cpu;
 }
 
+void *cpu_alloc_env(CPUState *cpu)
+{
+    CPUClass *cc = CPU_GET_CLASS(cpu);
+
+    return cc->alloc_env ? cc->alloc_env(cpu) : NULL;
+}
+
+void cpu_get_env(CPUState *cpu, void *env)
+{
+    CPUClass *cc = CPU_GET_CLASS(cpu);
+
+    if (cc->get_env) {
+        cc->get_env(cpu, env);
+    }
+}
+
+void cpu_set_env(CPUState *cpu, void *env)
+{
+    CPUClass *cc = CPU_GET_CLASS(cpu);
+
+    if (cc->set_env) {
+        cc->set_env(cpu, env);
+    }
+}
+
+void cpu_free_env(CPUState *cpu, void *env)
+{
+    CPUClass *cc = CPU_GET_CLASS(cpu);
+
+    if (cc->free_env) {
+        cc->free_env(cpu, env);
+    }
+}
+
 bool cpu_paging_enabled(const CPUState *cpu)
 {
     CPUClass *cc = CPU_GET_CLASS(cpu);
-- 
MST

Re: [Qemu-devel] [PULL 1/2] hw/i386: allow SHPC for Q35 machine

[Michael S. Tsirkin]

On Tue, Aug 08, 2017 at 12:40:08AM +0300, Michael S. Tsirkin wrote:
> From: Aleksandr Bezzubikov <zuban32s@gmail.com>
> 
> Unmask previously masked SHPC feature in _OSC method.
> 
> Signed-off-by: Aleksandr Bezzubikov <zuban32s@gmail.com>
> Reviewed-by: Marcel Apfelbaum <marcel@redhat.com>
> Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>

Cc: qemu-stable@nongnu.org

> ---
>  hw/i386/acpi-build.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
> index b9c245c..98dd424 100644
> --- a/hw/i386/acpi-build.c
> +++ b/hw/i386/acpi-build.c
> @@ -1862,9 +1862,9 @@ static Aml *build_q35_osc_method(void)
>  
>      /*
>       * Always allow native PME, AER (no dependencies)
> -     * Never allow SHPC (no SHPC controller in this system)
> +     * Allow SHPC (PCI bridges can have SHPC controller)
>       */
> -    aml_append(if_ctx, aml_and(a_ctrl, aml_int(0x1D), a_ctrl));
> +    aml_append(if_ctx, aml_and(a_ctrl, aml_int(0x1F), a_ctrl));
>  
>      if_ctx2 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(1))));
>      /* Unknown revision */
> -- 
> MST

Re: [Qemu-devel] [PULL 0/2] virtio: fix for rc2

[Peter Maydell]

On 7 August 2017 at 22:40, Michael S. Tsirkin <mst@redhat.com> wrote:
> The following changes since commit e6a74868d92f858ac33915b6772999d7de2fd288:
>
>   build-sys: add --disable-vhost-user (2017-08-03 15:55:41 +0300)
>
> are available in the git repository at:
>
>   git://git.kernel.org/pub/scm/virt/kvm/mst/qemu.git tags/for_upstream
>
> for you to fetch changes up to e2a7f28693aea7e194ec1435697ec4feb24f8a6f:
>
>   cpu: add APIs to allocate/free CPU environment (2017-08-08 00:31:09 +0300)
>
> ----------------------------------------------------------------
> virtio: fix for rc2
>
> It turns out there's a way to setup SHPC on Q35: just put
> a PCI to PCI bridge behind a DMI to PCI one. Our _OSC is
> thus incorrect.
>
> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>

Applied, thanks.

-- PMM