[PATCH] perf/x86: Fix LBR related crashes on Intel Atom and Intel Xeon

[PATCH] perf/x86: Fix LBR related crashes on Intel Atom and Intel Xeon

[Denys Zagorui]

This backported patch should be applied to kernel 4.4. Otherwise GPF/NULL pointer
derefer will happens on related platforms upon attempt to use perf in some use cases
(perf record).

Stephane Eranian (1):
  perf/x86: Fix LBR related crashes on Intel Atom and Intel Xeon

 arch/x86/kernel/cpu/perf_event_intel_lbr.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

-- 
2.10.3.dirty

[PATCH] perf/x86: Fix LBR related crashes on Intel Atom and Intel Xeon

[Denys Zagorui]

From: Stephane Eranian <eranian@google.com>

commit 6fc2e83077b05a061afe9b24f2fdff7a0434eb67 upstream.

This patches fixes the LBR kernel crashes on Intel Atom and Intel Xeon.

The kernel was assuming that if the CPU supports 64-bit format
LBR, then it has an LBR_SELECT MSR. Atom, Xeon uses 64-bit LBR
format but does not have LBR_SELECT. That was causing NULL
pointer dereferences in a couple of places.

Change-Id: Ia2a8290d9ad9553ea54fef81be7e9f8af4fbf9fa
Signed-off-by: Stephane Eranian <eranian@google.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Vince Weaver <vincent.weaver@maine.edu>
Cc: kan.liang@intel.com
Fixes: 96f3eda67fcf ("perf/x86/intel: Fix static checker warning in lbr enable")
Link: http://lkml.kernel.org/r/1449182000-31524-2-git-send-email-eranian@google.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Denys Zagorui <dzagorui@cisco.com>
---
 arch/x86/kernel/cpu/perf_event_intel_lbr.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/arch/x86/kernel/cpu/perf_event_intel_lbr.c b/arch/x86/kernel/cpu/perf_event_intel_lbr.c
index 8900400..2cdae69 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_lbr.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_lbr.c
@@ -153,7 +153,7 @@ static void __intel_pmu_lbr_enable(bool pmi)
 	 */
 	if (cpuc->lbr_sel)
 		lbr_select = cpuc->lbr_sel->config;
-	if (!pmi)
+	if (!pmi && cpuc->lbr_sel)
 		wrmsrl(MSR_LBR_SELECT, lbr_select);
 
 	rdmsrl(MSR_IA32_DEBUGCTLMSR, debugctl);
@@ -432,8 +432,10 @@ static void intel_pmu_lbr_read_64(struct cpu_hw_events *cpuc)
 	int out = 0;
 	int num = x86_pmu.lbr_nr;
 
-	if (cpuc->lbr_sel->config & LBR_CALL_STACK)
-		num = tos;
+	if (cpuc->lbr_sel) {
+		if (cpuc->lbr_sel->config & LBR_CALL_STACK)
+			num = tos;
+	}
 
 	for (i = 0; i < num; i++) {
 		unsigned long lbr_idx = (tos - i) & mask;
-- 
2.10.3.dirty

Re: [PATCH] perf/x86: Fix LBR related crashes on Intel Atom and Intel Xeon

[Denys Zagorui]

This backported patch should be applied to kernel 4.4. Otherwise 
GPF/NULL pointer
derefer will happens on related platforms upon attempt to use perf in 
some use cases
(perf record).

On 08/21/2017 06:57 PM, Denys Zagorui wrote:
> From: Stephane Eranian <eranian@google.com>
> 
> commit 6fc2e83077b05a061afe9b24f2fdff7a0434eb67 upstream.
> 
> This patches fixes the LBR kernel crashes on Intel Atom and Intel Xeon.
> 
> The kernel was assuming that if the CPU supports 64-bit format
> LBR, then it has an LBR_SELECT MSR. Atom, Xeon uses 64-bit LBR
> format but does not have LBR_SELECT. That was causing NULL
> pointer dereferences in a couple of places.
> 
> Change-Id: Ia2a8290d9ad9553ea54fef81be7e9f8af4fbf9fa
> Signed-off-by: Stephane Eranian <eranian@google.com>
> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
> Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
> Cc: Jiri Olsa <jolsa@redhat.com>
> Cc: Linus Torvalds <torvalds@linux-foundation.org>
> Cc: Peter Zijlstra <peterz@infradead.org>
> Cc: Thomas Gleixner <tglx@linutronix.de>
> Cc: Vince Weaver <vincent.weaver@maine.edu>
> Cc: kan.liang@intel.com
> Fixes: 96f3eda67fcf ("perf/x86/intel: Fix static checker warning in lbr enable")
> Link: http://lkml.kernel.org/r/1449182000-31524-2-git-send-email-eranian@google.com
> Signed-off-by: Ingo Molnar <mingo@kernel.org>
> Signed-off-by: Denys Zagorui <dzagorui@cisco.com>
> ---
>   arch/x86/kernel/cpu/perf_event_intel_lbr.c | 8 +++++---
>   1 file changed, 5 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/x86/kernel/cpu/perf_event_intel_lbr.c b/arch/x86/kernel/cpu/perf_event_intel_lbr.c
> index 8900400..2cdae69 100644
> --- a/arch/x86/kernel/cpu/perf_event_intel_lbr.c
> +++ b/arch/x86/kernel/cpu/perf_event_intel_lbr.c
> @@ -153,7 +153,7 @@ static void __intel_pmu_lbr_enable(bool pmi)
>   	 */
>   	if (cpuc->lbr_sel)
>   		lbr_select = cpuc->lbr_sel->config;
> -	if (!pmi)
> +	if (!pmi && cpuc->lbr_sel)
>   		wrmsrl(MSR_LBR_SELECT, lbr_select);
>   
>   	rdmsrl(MSR_IA32_DEBUGCTLMSR, debugctl);
> @@ -432,8 +432,10 @@ static void intel_pmu_lbr_read_64(struct cpu_hw_events *cpuc)
>   	int out = 0;
>   	int num = x86_pmu.lbr_nr;
>   
> -	if (cpuc->lbr_sel->config & LBR_CALL_STACK)
> -		num = tos;
> +	if (cpuc->lbr_sel) {
> +		if (cpuc->lbr_sel->config & LBR_CALL_STACK)
> +			num = tos;
> +	}
>   
>   	for (i = 0; i < num; i++) {
>   		unsigned long lbr_idx = (tos - i) & mask;
> 

Re: [PATCH] perf/x86: Fix LBR related crashes on Intel Atom and Intel Xeon

[Greg KH]

On Mon, Aug 21, 2017 at 07:09:20PM +0300, Denys Zagorui wrote:
> This backported patch should be applied to kernel 4.4. Otherwise GPF/NULL
> pointer
> derefer will happens on related platforms upon attempt to use perf in some
> use cases
> (perf record).

Thanks for the backport, now queued up.

greg k-h