[PATCH] arm: sun8i: nanopi-neo: Enable USB OTG

[PATCH] arm: sun8i: nanopi-neo: Enable USB OTG

[David Disseldorp]

From: David Disseldorp <ddiss-eUNUBHrolfbYtjvyW6yDsg@public.gmane.org>

The NanoPi NEO features a MicroUSB port that can work in both host mode
and peripheral mode. Switching is handled via GPIO PG12.

Signed-off-by: David Disseldorp <ddiss-eUNUBHrolfbYtjvyW6yDsg@public.gmane.org>
---
 arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts | 27 +++++++++++++++++++++++++++
 1 file changed, 27 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
index 78f6c24952dd..5abf430ac5a6 100644
--- a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
@@ -47,9 +47,36 @@
 	compatible = "friendlyarm,nanopi-neo", "allwinner,sun8i-h3";
 };
 
+&ehci0 {
+	status = "okay";
+};
+
+&ehci3 {
+	status = "okay";
+};
+
 &emac {
 	phy-handle = <&int_mii_phy>;
 	phy-mode = "mii";
 	allwinner,leds-active-low;
 	status = "okay";
 };
+
+&ohci0 {
+	status = "okay";
+};
+
+&ohci3 {
+	status = "okay";
+};
+
+&usb_otg {
+	dr_mode = "otg";
+	status = "okay";
+};
+
+&usbphy {
+	/* USB Type-A port's VBUS is always on */
+	usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
+	status = "okay";
+};
-- 
2.13.5

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Re: [PATCH] arm: sun8i: nanopi-neo: Enable USB OTG

[icenowy-h8G6r0blFSE]

在 2017-08-28 08:12，David Disseldorp 写道：
> From: David Disseldorp <ddiss-eUNUBHrolfbYtjvyW6yDsg@public.gmane.org>
> 
> The NanoPi NEO features a MicroUSB port that can work in both host mode
> and peripheral mode. Switching is handled via GPIO PG12.

How's the Vbus of the OTG handled?

> 
> Signed-off-by: David Disseldorp <ddiss-eUNUBHrolfbYtjvyW6yDsg@public.gmane.org>
> ---
>  arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts | 27 
> +++++++++++++++++++++++++++
>  1 file changed, 27 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
> b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
> index 78f6c24952dd..5abf430ac5a6 100644
> --- a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
> +++ b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
> @@ -47,9 +47,36 @@
>  	compatible = "friendlyarm,nanopi-neo", "allwinner,sun8i-h3";
>  };
> 
> +&ehci0 {
> +	status = "okay";
> +};
> +
> +&ehci3 {
> +	status = "okay";
> +};

Why do you also enable ehci/ohci3 here?
I think they're already enabled in sun8i-h3-nanopi.dtsi .

> +
>  &emac {
>  	phy-handle = <&int_mii_phy>;
>  	phy-mode = "mii";
>  	allwinner,leds-active-low;
>  	status = "okay";
>  };
> +
> +&ohci0 {
> +	status = "okay";
> +};
> +
> +&ohci3 {
> +	status = "okay";
> +};
> +
> +&usb_otg {
> +	dr_mode = "otg";
> +	status = "okay";
> +};
> +
> +&usbphy {
> +	/* USB Type-A port's VBUS is always on */
> +	usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
> +	status = "okay";
> +};
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Re: [PATCH] arm: sun8i: nanopi-neo: Enable USB OTG

[David Disseldorp]

On Mon, 28 Aug 2017 10:37:56 +0800, icenowy-h8G6r0blFSE@public.gmane.org wrote:

> 在 2017-08-28 08:12，David Disseldorp 写道：
> > From: David Disseldorp <ddiss-eUNUBHrolfbYtjvyW6yDsg@public.gmane.org>
> > 
> > The NanoPi NEO features a MicroUSB port that can work in both host mode
> > and peripheral mode. Switching is handled via GPIO PG12.  
> 
> How's the Vbus of the OTG handled?

I don't know. Unlike the NanoPi NEO2[2], the NanoPi NEO schematics[1]
don't show a regulator connected to the Vbus pin. I've tested this
change with USB device mode only.

> > Signed-off-by: David Disseldorp <ddiss-eUNUBHrolfbYtjvyW6yDsg@public.gmane.org>
> > ---
> >  arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts | 27 
> > +++++++++++++++++++++++++++
> >  1 file changed, 27 insertions(+)
> > 
> > diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
> > b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
> > index 78f6c24952dd..5abf430ac5a6 100644
> > --- a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
> > +++ b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
> > @@ -47,9 +47,36 @@
> >  	compatible = "friendlyarm,nanopi-neo", "allwinner,sun8i-h3";
> >  };
> > 
> > +&ehci0 {
> > +	status = "okay";
> > +};
> > +
> > +&ehci3 {
> > +	status = "okay";
> > +};  
> 
> Why do you also enable ehci/ohci3 here?
> I think they're already enabled in sun8i-h3-nanopi.dtsi .

You're right. I'll drop the duplication here.

Cheers, David

1. NanoPi NEO schematics
   http://wiki.friendlyarm.com/wiki/images/1/1c/NanoPi-NEO-V1.2-1608-Schematic.pdf

2. NanoPi NEO2 schematics
   http://wiki.friendlyarm.com/wiki/images/a/a1/Schematic_NanoPi_NEO2-v1.0_1701.pdf
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