From: Pavel Machek <pavel@ucw.cz>
To: Marcin Wojtas <mw@semihalf.com>
Cc: linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-mtd@lists.infradead.org, linux-spi@vger.kernel.org,
robh+dt@kernel.org, mark.rutland@arm.com, will.deacon@arm.com,
cyrille.pitchen@wedev4u.fr, marek.vasut@gmail.com,
broonie@kernel.org, thomas.petazzoni@free-electrons.com,
gregory.clement@free-electrons.com, nadavh@marvell.com,
neta@marvell.com, omrii@marvell.com, hannah@marvell.com,
jaz@semihalf.com, tn@semihalf.com
Subject: Re: [PATCH 1/2] mtd: spi-nor: add an option to force 3byte adressing mode
Date: Mon, 4 Sep 2017 18:26:02 +0200 [thread overview]
Message-ID: <20170904162602.GC21849@amd> (raw)
In-Reply-To: <1503954854-30963-2-git-send-email-mw@semihalf.com>
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Hi!
> index 1413828..029c87d 100644
> --- a/drivers/mtd/spi-nor/spi-nor.c
> +++ b/drivers/mtd/spi-nor/spi-nor.c
> @@ -2002,7 +2002,17 @@ int spi_nor_scan(struct spi_nor *nor, const char *name,
> if (JEDEC_MFR(info) == SNOR_MFR_SPANSION ||
> info->flags & SPI_NOR_4B_OPCODES)
> spi_nor_set_4byte_opcodes(nor, info);
> - else
> + else if (of_property_read_bool(np, "spi-3byte-addressing")) {
> + /*
> + * Do not enter 4byte mode in order to prevent
> + * the early bootloader to come up on non-default
> + * SPI NOR memory during boot. Limit accessible
> + * size to 16MiB.
> + */
> + nor->addr_width = 3;
> + mtd->size = 0x1000000;
> + dev_info(dev, "Force 3B addressing mode\n");
I'd append "limiting access to first 16MiB" .. because otherwise
people will wonder where their flash went.
Pavel
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
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WARNING: multiple messages have this Message-ID (diff)
From: pavel@ucw.cz (Pavel Machek)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/2] mtd: spi-nor: add an option to force 3byte adressing mode
Date: Mon, 4 Sep 2017 18:26:02 +0200 [thread overview]
Message-ID: <20170904162602.GC21849@amd> (raw)
In-Reply-To: <1503954854-30963-2-git-send-email-mw@semihalf.com>
Hi!
> index 1413828..029c87d 100644
> --- a/drivers/mtd/spi-nor/spi-nor.c
> +++ b/drivers/mtd/spi-nor/spi-nor.c
> @@ -2002,7 +2002,17 @@ int spi_nor_scan(struct spi_nor *nor, const char *name,
> if (JEDEC_MFR(info) == SNOR_MFR_SPANSION ||
> info->flags & SPI_NOR_4B_OPCODES)
> spi_nor_set_4byte_opcodes(nor, info);
> - else
> + else if (of_property_read_bool(np, "spi-3byte-addressing")) {
> + /*
> + * Do not enter 4byte mode in order to prevent
> + * the early bootloader to come up on non-default
> + * SPI NOR memory during boot. Limit accessible
> + * size to 16MiB.
> + */
> + nor->addr_width = 3;
> + mtd->size = 0x1000000;
> + dev_info(dev, "Force 3B addressing mode\n");
I'd append "limiting access to first 16MiB" .. because otherwise
people will wonder where their flash went.
Pavel
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
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next prev parent reply other threads:[~2017-09-04 16:26 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-08-28 21:14 [PATCH 0/2] SPI NOR - force 3byte addressing mode Marcin Wojtas
2017-08-28 21:14 ` Marcin Wojtas
2017-08-28 21:14 ` Marcin Wojtas
2017-08-28 21:14 ` [PATCH 1/2] mtd: spi-nor: add an option to force 3byte adressing mode Marcin Wojtas
2017-08-28 21:14 ` Marcin Wojtas
2017-08-28 21:18 ` Geert Uytterhoeven
2017-08-28 21:18 ` Geert Uytterhoeven
2017-08-28 21:54 ` Marcin Wojtas
2017-08-28 21:54 ` Marcin Wojtas
2017-08-28 21:54 ` Marcin Wojtas
2017-08-28 23:24 ` Marek Vasut
2017-08-28 23:24 ` Marek Vasut
2017-08-29 7:40 ` Marcin Wojtas
2017-08-29 7:40 ` Marcin Wojtas
2017-09-04 16:26 ` Pavel Machek [this message]
2017-09-04 16:26 ` Pavel Machek
2017-08-28 21:14 ` [PATCH 2/2] arm64: dts: marvell: Force 3byte addressing mode for SPI on A7040 DB Marcin Wojtas
2017-08-28 21:14 ` Marcin Wojtas
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