From: Stafford Horne <shorne@gmail.com>
To: openrisc@lists.librecores.org
Subject: [OpenRISC] [PATCH v2 05/14] dt-bindings: add openrisc to vendor prefixes list
Date: Sun, 10 Sep 2017 15:49:17 +0900 [thread overview]
Message-ID: <20170910064926.5874-6-shorne@gmail.com> (raw)
In-Reply-To: <20170910064926.5874-1-shorne@gmail.com>
Add OpenRISC.io to vendor prefixes. This is reserved for softcores
developed by the OpenRISC community. The OpenRISC community has
separated from OpenCores.org requiring a new prefix.
Signed-off-by: Stafford Horne <shorne@gmail.com>
---
Changes since v1
- New patch
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
index daf465bef758..0025aa7c3745 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
@@ -241,6 +241,7 @@ onion Onion Corporation
onnn ON Semiconductor Corp.
ontat On Tat Industrial Company
opencores OpenCores.org
+openrisc OpenRISC.io
option Option NV
ORCL Oracle Corporation
ortustech Ortus Technology Co., Ltd.
--
2.13.5
WARNING: multiple messages have this Message-ID (diff)
From: Stafford Horne <shorne-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: LKML <linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>
Cc: Openrisc
<openrisc-cunTk1MwBs9a3B2Vnqf2dGD2FQJk+8+b@public.gmane.org>,
"Stafford Horne" <shorne-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
"Rob Herring" <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
"Mark Rutland" <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
"Kevin Hilman" <khilman-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>,
"Jonathan Cameron"
<jic23-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
"Thierry Reding"
<treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>,
"Andreas Färber" <afaerber-l3A5Bk7waGM@public.gmane.org>,
"Marek Vasut"
<marek.vasut-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
"Greg Kroah-Hartman"
<gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r@public.gmane.org>,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: [PATCH v2 05/14] dt-bindings: add openrisc to vendor prefixes list
Date: Sun, 10 Sep 2017 15:49:17 +0900 [thread overview]
Message-ID: <20170910064926.5874-6-shorne@gmail.com> (raw)
In-Reply-To: <20170910064926.5874-1-shorne-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Add OpenRISC.io to vendor prefixes. This is reserved for softcores
developed by the OpenRISC community. The OpenRISC community has
separated from OpenCores.org requiring a new prefix.
Signed-off-by: Stafford Horne <shorne-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
---
Changes since v1
- New patch
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
index daf465bef758..0025aa7c3745 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
@@ -241,6 +241,7 @@ onion Onion Corporation
onnn ON Semiconductor Corp.
ontat On Tat Industrial Company
opencores OpenCores.org
+openrisc OpenRISC.io
option Option NV
ORCL Oracle Corporation
ortustech Ortus Technology Co., Ltd.
--
2.13.5
--
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WARNING: multiple messages have this Message-ID (diff)
From: Stafford Horne <shorne@gmail.com>
To: LKML <linux-kernel@vger.kernel.org>
Cc: Openrisc <openrisc@lists.librecores.org>,
"Stafford Horne" <shorne@gmail.com>,
"Rob Herring" <robh+dt@kernel.org>,
"Mark Rutland" <mark.rutland@arm.com>,
"Kevin Hilman" <khilman@baylibre.com>,
"Jonathan Cameron" <jic23@kernel.org>,
"Thierry Reding" <treding@nvidia.com>,
"Andreas Färber" <afaerber@suse.de>,
"Marek Vasut" <marek.vasut@gmail.com>,
"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
devicetree@vger.kernel.org
Subject: [PATCH v2 05/14] dt-bindings: add openrisc to vendor prefixes list
Date: Sun, 10 Sep 2017 15:49:17 +0900 [thread overview]
Message-ID: <20170910064926.5874-6-shorne@gmail.com> (raw)
In-Reply-To: <20170910064926.5874-1-shorne@gmail.com>
Add OpenRISC.io to vendor prefixes. This is reserved for softcores
developed by the OpenRISC community. The OpenRISC community has
separated from OpenCores.org requiring a new prefix.
Signed-off-by: Stafford Horne <shorne@gmail.com>
---
Changes since v1
- New patch
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
index daf465bef758..0025aa7c3745 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
@@ -241,6 +241,7 @@ onion Onion Corporation
onnn ON Semiconductor Corp.
ontat On Tat Industrial Company
opencores OpenCores.org
+openrisc OpenRISC.io
option Option NV
ORCL Oracle Corporation
ortustech Ortus Technology Co., Ltd.
--
2.13.5
next prev parent reply other threads:[~2017-09-10 6:49 UTC|newest]
Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-09-10 6:49 [OpenRISC] [PATCH v2 00/14] OpenRISC SMP Support Stafford Horne
2017-09-10 6:49 ` Stafford Horne
2017-09-10 6:49 ` [OpenRISC] [PATCH v2 01/14] openrisc: use shadow registers to save regs on exception Stafford Horne
2017-09-10 6:49 ` Stafford Horne
2017-09-10 6:49 ` [OpenRISC] [PATCH v2 02/14] openrisc: define CPU_BIG_ENDIAN as true Stafford Horne
2017-09-10 6:49 ` Stafford Horne
2017-09-10 6:49 ` [OpenRISC] [PATCH v2 03/14] openrisc: add 1 and 2 byte cmpxchg support Stafford Horne
2017-09-10 6:49 ` Stafford Horne
2017-09-10 6:49 ` [OpenRISC] [PATCH v2 04/14] openrisc: use qspinlocks and qrwlocks Stafford Horne
2017-09-10 6:49 ` Stafford Horne
2017-09-10 6:49 ` Stafford Horne [this message]
2017-09-10 6:49 ` [PATCH v2 05/14] dt-bindings: add openrisc to vendor prefixes list Stafford Horne
2017-09-10 6:49 ` Stafford Horne
2017-09-10 11:13 ` [OpenRISC] " Andreas =?unknown-8bit?q?F=C3=A4rber?=
2017-09-10 11:13 ` Andreas Färber
2017-09-18 20:39 ` [OpenRISC] " Rob Herring
2017-09-18 20:39 ` Rob Herring
2017-09-10 6:49 ` [OpenRISC] [PATCH v2 06/14] irqchip: add initial support for ompic Stafford Horne
2017-09-10 6:49 ` Stafford Horne
2017-09-10 6:49 ` Stafford Horne
2017-09-13 17:21 ` [OpenRISC] " Marc Zyngier
2017-09-13 17:21 ` Marc Zyngier
2017-09-13 17:21 ` Marc Zyngier
2017-09-14 6:54 ` [OpenRISC] " Stafford Horne
2017-09-14 6:54 ` Stafford Horne
2017-09-14 6:54 ` Stafford Horne
2017-09-14 18:31 ` [OpenRISC] " Marc Zyngier
2017-09-14 18:31 ` Marc Zyngier
2017-09-18 20:29 ` [OpenRISC] " Rob Herring
2017-09-18 20:29 ` Rob Herring
2017-09-18 20:29 ` Rob Herring
2017-09-19 12:14 ` [OpenRISC] " Stafford Horne
2017-09-19 12:14 ` Stafford Horne
2017-09-18 20:43 ` [OpenRISC] " Rob Herring
2017-09-18 20:43 ` Rob Herring
2017-09-19 12:10 ` [OpenRISC] " Stafford Horne
2017-09-19 12:10 ` Stafford Horne
2017-09-19 12:10 ` Stafford Horne
2017-09-10 6:49 ` [OpenRISC] [PATCH v2 07/14] openrisc: initial SMP support Stafford Horne
2017-09-10 6:49 ` Stafford Horne
2017-09-10 6:49 ` [OpenRISC] [PATCH v2 08/14] openrisc: fix initial preempt state for secondary cpu tasks Stafford Horne
2017-09-10 6:49 ` Stafford Horne
2017-09-10 6:49 ` [OpenRISC] [PATCH v2 09/14] openrisc: sleep instead of spin on secondary wait Stafford Horne
2017-09-10 6:49 ` Stafford Horne
2017-09-10 6:49 ` [OpenRISC] [PATCH v2 10/14] openrisc: add cacheflush support to fix icache aliasing Stafford Horne
2017-09-10 6:49 ` Stafford Horne
2017-09-10 6:49 ` [OpenRISC] [PATCH v2 11/14] openrisc: add simple_smp dts and defconfig for simulators Stafford Horne
2017-09-10 6:49 ` Stafford Horne
2017-09-10 6:49 ` [OpenRISC] [PATCH v2 12/14] openrisc: support framepointers and STACKTRACE_SUPPORT Stafford Horne
2017-09-10 6:49 ` Stafford Horne
2017-09-10 6:49 ` [OpenRISC] [PATCH v2 13/14] openrisc: enable LOCKDEP_SUPPORT and irqflags tracing Stafford Horne
2017-09-10 6:49 ` Stafford Horne
2017-09-10 6:49 ` [OpenRISC] [PATCH v2 14/14] openrisc: add tick timer multicore sync logic Stafford Horne
2017-09-10 6:49 ` Stafford Horne
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