Re: [PATCH 1/2] drm/i915: Use mul_u32_u32() for 32b x 32b -> 64b result

["Ville Syrjälä" <ville.syrjala@linux.intel.com>]

On Wed, Sep 13, 2017 at 11:51:53AM +0100, Chris Wilson wrote:
> As realised by commit 9e3d6223d209 ("math64, timers: Fix 32bit
> mul_u64_u32_shr() and friends"), GCC does not always generate ideal code
> for performing a 32b x 32b multiply returning a 64b result (i.e. where
> we idiomatically use u64 result = (u64)x * (u32)x). This catches a
> couple of instances in the display code using (u64)x * (u32)y.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/intel_display.c | 2 +-
>  drivers/gpu/drm/i915/intel_tv.c      | 2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 6b3de6ad86d3..8f19d0b3512e 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -10223,7 +10223,7 @@ int intel_dotclock_calculate(int link_freq,
>  	if (!m_n->link_n)
>  		return 0;
>  
> -	return div_u64((u64)m_n->link_m * link_freq, m_n->link_n);
> +	return div_u64(mul_u32_u32(m_n->link_m, link_freq), m_n->link_n);
>  }
>  
>  static void ironlake_pch_clock_get(struct intel_crtc *crtc,
> diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c
> index 0cc999fa09c5..a79a7591b2cf 100644
> --- a/drivers/gpu/drm/i915/intel_tv.c
> +++ b/drivers/gpu/drm/i915/intel_tv.c
> @@ -1385,7 +1385,7 @@ intel_tv_get_modes(struct drm_connector *connector)
>  			mode_ptr->vsync_end = mode_ptr->vsync_start  + 1;
>  		mode_ptr->vtotal = vactive_s + 33;
>  
> -		tmp = (u64) tv_mode->refresh * mode_ptr->vtotal;
> +		tmp = mul_u32_u32(tv_mode->refresh, mode_ptr->vtotal);
>  		tmp *= mode_ptr->htotal;
>  		tmp = div_u64(tmp, 1000000);
>  		mode_ptr->clock = (int) tmp;
> -- 
> 2.14.1
> 
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-- 
Ville Syrjälä
Intel OTC
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