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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 2/2] drm/i915/selftests: Use mul_u32_u32() for 32b x 32b -> 64b result
Date: Wed, 13 Sep 2017 14:53:37 +0300	[thread overview]
Message-ID: <20170913115337.GI4914@intel.com> (raw)
In-Reply-To: <20170913105154.2910-2-chris@chris-wilson.co.uk>

On Wed, Sep 13, 2017 at 11:51:54AM +0100, Chris Wilson wrote:
> As realised by commit 9e3d6223d209 ("math64, timers: Fix 32bit
> mul_u64_u32_shr() and friends"), GCC does not always generate ideal code
> for performing a 32b x 32b multiply returning a 64b result (i.e. where
> we idiomatically use u64 result = (u64)x * (u32)x).
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/selftests/i915_gem_timeline.c | 2 +-
>  drivers/gpu/drm/i915/selftests/i915_random.c       | 5 -----
>  drivers/gpu/drm/i915/selftests/i915_random.h       | 5 +++++
>  3 files changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_timeline.c b/drivers/gpu/drm/i915/selftests/i915_gem_timeline.c
> index 7a44dab631b8..4795877abe56 100644
> --- a/drivers/gpu/drm/i915/selftests/i915_gem_timeline.c
> +++ b/drivers/gpu/drm/i915/selftests/i915_gem_timeline.c
> @@ -121,7 +121,7 @@ static int igt_sync(void *arg)
>  
>  static unsigned int random_engine(struct rnd_state *rnd)
>  {
> -	return ((u64)prandom_u32_state(rnd) * I915_NUM_ENGINES) >> 32;
> +	return i915_prandom_u32_max_state(I915_NUM_ENGINES, rnd);
>  }
>  
>  static int bench_sync(void *arg)
> diff --git a/drivers/gpu/drm/i915/selftests/i915_random.c b/drivers/gpu/drm/i915/selftests/i915_random.c
> index d044bf9a6feb..ea0f5dbc0eb7 100644
> --- a/drivers/gpu/drm/i915/selftests/i915_random.c
> +++ b/drivers/gpu/drm/i915/selftests/i915_random.c
> @@ -41,11 +41,6 @@ u64 i915_prandom_u64_state(struct rnd_state *rnd)
>  	return x;
>  }
>  
> -static inline u32 i915_prandom_u32_max_state(u32 ep_ro, struct rnd_state *state)
> -{
> -	return upper_32_bits((u64)prandom_u32_state(state) * ep_ro);
> -}
> -
>  void i915_random_reorder(unsigned int *order, unsigned int count,
>  			 struct rnd_state *state)
>  {
> diff --git a/drivers/gpu/drm/i915/selftests/i915_random.h b/drivers/gpu/drm/i915/selftests/i915_random.h
> index 6c9379871384..7dffedc501ca 100644
> --- a/drivers/gpu/drm/i915/selftests/i915_random.h
> +++ b/drivers/gpu/drm/i915/selftests/i915_random.h
> @@ -43,6 +43,11 @@
>  
>  u64 i915_prandom_u64_state(struct rnd_state *rnd);
>  
> +static inline u32 i915_prandom_u32_max_state(u32 ep_ro, struct rnd_state *state)
> +{
> +	return upper_32_bits(mul_u32_u32(prandom_u32_state(state), ep_ro));
> +}
> +
>  unsigned int *i915_random_order(unsigned int count,
>  				struct rnd_state *state);
>  void i915_random_reorder(unsigned int *order,
> -- 
> 2.14.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2017-09-13 11:53 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-09-13 10:51 [PATCH 1/2] drm/i915: Use mul_u32_u32() for 32b x 32b -> 64b result Chris Wilson
2017-09-13 10:51 ` [PATCH 2/2] drm/i915/selftests: " Chris Wilson
2017-09-13 11:53   ` Ville Syrjälä [this message]
2017-09-13 11:22 ` ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915: " Patchwork
2017-09-13 13:54   ` Chris Wilson
2017-09-13 11:51 ` [PATCH 1/2] " Ville Syrjälä
  -- strict thread matches above, loose matches on Subject: below --
2017-07-20 11:15 Chris Wilson
2017-07-20 11:15 ` [PATCH 2/2] drm/i915/selftests: " Chris Wilson

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