* [PATCH] drm/i915: Return IDI Hash Mask setup for gen9+
@ 2017-09-14 19:18 Rodrigo Vivi
2017-09-14 19:25 ` Chris Wilson
` (3 more replies)
0 siblings, 4 replies; 7+ messages in thread
From: Rodrigo Vivi @ 2017-09-14 19:18 UTC (permalink / raw)
To: intel-gfx; +Cc: Mika Kuoppala, Matthew Auld, Rodrigo Vivi
Spec teels:
"It is required for GFX Driver to set [19:16] to 1 when
eDRAM configuration is enabled."
This basically reverts commit 666fbcf5c21d ("drm/i915: Don't
program eLLC IDI hash mask for gen9+")
This requirement hasn't changed since HSW up to CNL.
But that commit was created before EDRAM was properly
organized with commit 3accaf7e734d ("drm/i915: Store
and use edram capabilities")
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Cc: Matthew Auld <matthew.auld@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
drivers/gpu/drm/i915/i915_gem.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index f445587c1a4b..25b59dbb29b0 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4714,7 +4714,7 @@ int i915_gem_init_hw(struct drm_i915_private *dev_priv)
/* Double layer security blanket, see i915_gem_init() */
intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
- if (HAS_EDRAM(dev_priv) && INTEL_GEN(dev_priv) < 9)
+ if (HAS_EDRAM(dev_priv))
I915_WRITE(HSW_IDICR, I915_READ(HSW_IDICR) | IDIHASHMSK(0xf));
if (IS_HASWELL(dev_priv))
--
2.13.5
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [PATCH] drm/i915: Return IDI Hash Mask setup for gen9+
2017-09-14 19:18 [PATCH] drm/i915: Return IDI Hash Mask setup for gen9+ Rodrigo Vivi
@ 2017-09-14 19:25 ` Chris Wilson
2017-09-14 19:52 ` Rodrigo Vivi
2017-09-14 19:38 ` ✓ Fi.CI.BAT: success for " Patchwork
` (2 subsequent siblings)
3 siblings, 1 reply; 7+ messages in thread
From: Chris Wilson @ 2017-09-14 19:25 UTC (permalink / raw)
To: intel-gfx; +Cc: Mika Kuoppala, Matthew Auld, Rodrigo Vivi
Quoting Rodrigo Vivi (2017-09-14 20:18:41)
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index f445587c1a4b..25b59dbb29b0 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -4714,7 +4714,7 @@ int i915_gem_init_hw(struct drm_i915_private *dev_priv)
> /* Double layer security blanket, see i915_gem_init() */
> intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
>
> - if (HAS_EDRAM(dev_priv) && INTEL_GEN(dev_priv) < 9)
> + if (HAS_EDRAM(dev_priv))
> I915_WRITE(HSW_IDICR, I915_READ(HSW_IDICR) | IDIHASHMSK(0xf));
> "It is required for GFX Driver to set [19:16] to 1 when
> eDRAM configuration is enabled."
0xf != 1 ?
-Chris
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH] drm/i915: Return IDI Hash Mask setup for gen9+
2017-09-14 19:25 ` Chris Wilson
@ 2017-09-14 19:52 ` Rodrigo Vivi
0 siblings, 0 replies; 7+ messages in thread
From: Rodrigo Vivi @ 2017-09-14 19:52 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx, Matthew Auld, Mika Kuoppala
On Thu, Sep 14, 2017 at 07:25:11PM +0000, Chris Wilson wrote:
> Quoting Rodrigo Vivi (2017-09-14 20:18:41)
> > diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> > index f445587c1a4b..25b59dbb29b0 100644
> > --- a/drivers/gpu/drm/i915/i915_gem.c
> > +++ b/drivers/gpu/drm/i915/i915_gem.c
> > @@ -4714,7 +4714,7 @@ int i915_gem_init_hw(struct drm_i915_private *dev_priv)
> > /* Double layer security blanket, see i915_gem_init() */
> > intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
> >
> > - if (HAS_EDRAM(dev_priv) && INTEL_GEN(dev_priv) < 9)
> > + if (HAS_EDRAM(dev_priv))
> > I915_WRITE(HSW_IDICR, I915_READ(HSW_IDICR) | IDIHASHMSK(0xf));
>
> > "It is required for GFX Driver to set [19:16] to 1 when
> > eDRAM configuration is enabled."
>
> 0xf != 1 ?
yeap... I had same question here...
but the old behaviour check against the old spec convinced my brain that
"[19:16] = 1" means "[19]=1 & [18]=1 & [17]=1 & [16]=1"
otherise they would just tell [16]=1 or [IDI HASH MASK]=1 or [21:16]=1
but that really seems a big elephant that needs more clarification as Ville
mentioned...
> -Chris
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915: Return IDI Hash Mask setup for gen9+
2017-09-14 19:18 [PATCH] drm/i915: Return IDI Hash Mask setup for gen9+ Rodrigo Vivi
2017-09-14 19:25 ` Chris Wilson
@ 2017-09-14 19:38 ` Patchwork
2017-09-14 19:44 ` [PATCH] " Ville Syrjälä
2017-09-15 4:05 ` ✗ Fi.CI.IGT: warning for " Patchwork
3 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2017-09-14 19:38 UTC (permalink / raw)
To: Rodrigo Vivi; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Return IDI Hash Mask setup for gen9+
URL : https://patchwork.freedesktop.org/series/30383/
State : success
== Summary ==
Series 30383v1 drm/i915: Return IDI Hash Mask setup for gen9+
https://patchwork.freedesktop.org/api/1.0/series/30383/revisions/1/mbox/
Test kms_flip:
Subgroup basic-flip-vs-modeset:
skip -> PASS (fi-skl-x1585l) fdo#101781
Subgroup basic-flip-vs-wf_vblank:
skip -> PASS (fi-skl-x1585l)
Test pm_rpm:
Subgroup basic-rte:
pass -> DMESG-WARN (fi-cfl-s) fdo#102294
fdo#101781 https://bugs.freedesktop.org/show_bug.cgi?id=101781
fdo#102294 https://bugs.freedesktop.org/show_bug.cgi?id=102294
fi-bdw-5557u total:289 pass:268 dwarn:0 dfail:0 fail:0 skip:21 time:450s
fi-bdw-gvtdvm total:289 pass:265 dwarn:0 dfail:0 fail:0 skip:24 time:448s
fi-blb-e6850 total:289 pass:224 dwarn:1 dfail:0 fail:0 skip:64 time:380s
fi-bsw-n3050 total:289 pass:243 dwarn:0 dfail:0 fail:0 skip:46 time:533s
fi-bwr-2160 total:289 pass:184 dwarn:0 dfail:0 fail:0 skip:105 time:268s
fi-bxt-j4205 total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:518s
fi-byt-j1900 total:289 pass:254 dwarn:1 dfail:0 fail:0 skip:34 time:512s
fi-byt-n2820 total:289 pass:250 dwarn:1 dfail:0 fail:0 skip:38 time:504s
fi-cfl-s total:289 pass:222 dwarn:35 dfail:0 fail:0 skip:32 time:563s
fi-elk-e7500 total:289 pass:230 dwarn:0 dfail:0 fail:0 skip:59 time:453s
fi-glk-2a total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:599s
fi-hsw-4770 total:289 pass:263 dwarn:0 dfail:0 fail:0 skip:26 time:430s
fi-hsw-4770r total:289 pass:263 dwarn:0 dfail:0 fail:0 skip:26 time:405s
fi-ilk-650 total:289 pass:229 dwarn:0 dfail:0 fail:0 skip:60 time:444s
fi-ivb-3520m total:289 pass:261 dwarn:0 dfail:0 fail:0 skip:28 time:490s
fi-ivb-3770 total:289 pass:261 dwarn:0 dfail:0 fail:0 skip:28 time:469s
fi-kbl-7500u total:289 pass:264 dwarn:1 dfail:0 fail:0 skip:24 time:497s
fi-kbl-7560u total:289 pass:270 dwarn:0 dfail:0 fail:0 skip:19 time:578s
fi-kbl-r total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:593s
fi-pnv-d510 total:289 pass:223 dwarn:1 dfail:0 fail:0 skip:65 time:549s
fi-skl-6260u total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:457s
fi-skl-6700k total:289 pass:265 dwarn:0 dfail:0 fail:0 skip:24 time:527s
fi-skl-6770hq total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:503s
fi-skl-gvtdvm total:289 pass:266 dwarn:0 dfail:0 fail:0 skip:23 time:459s
fi-skl-x1585l total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:505s
fi-snb-2520m total:289 pass:251 dwarn:0 dfail:0 fail:0 skip:38 time:574s
fi-snb-2600 total:289 pass:250 dwarn:0 dfail:0 fail:0 skip:39 time:428s
46e05d756fe32271bca4ac3ef1b3f1f6006fcc0c drm-tip: 2017y-09m-14d-14h-46m-01s UTC integration manifest
ec92f1f6ec6c drm/i915: Return IDI Hash Mask setup for gen9+
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_5710/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH] drm/i915: Return IDI Hash Mask setup for gen9+
2017-09-14 19:18 [PATCH] drm/i915: Return IDI Hash Mask setup for gen9+ Rodrigo Vivi
2017-09-14 19:25 ` Chris Wilson
2017-09-14 19:38 ` ✓ Fi.CI.BAT: success for " Patchwork
@ 2017-09-14 19:44 ` Ville Syrjälä
2017-09-14 19:54 ` Rodrigo Vivi
2017-09-15 4:05 ` ✗ Fi.CI.IGT: warning for " Patchwork
3 siblings, 1 reply; 7+ messages in thread
From: Ville Syrjälä @ 2017-09-14 19:44 UTC (permalink / raw)
To: Rodrigo Vivi; +Cc: intel-gfx, Matthew Auld, Mika Kuoppala
On Thu, Sep 14, 2017 at 12:18:41PM -0700, Rodrigo Vivi wrote:
> Spec teels:
> "It is required for GFX Driver to set [19:16] to 1 when
> eDRAM configuration is enabled."
>
> This basically reverts commit 666fbcf5c21d ("drm/i915: Don't
> program eLLC IDI hash mask for gen9+")
>
> This requirement hasn't changed since HSW up to CNL.
> But that commit was created before EDRAM was properly
> organized with commit 3accaf7e734d ("drm/i915: Store
> and use edram capabilities")
>
> Cc: Mika Kuoppala <mika.kuoppala@intel.com>
> Cc: Matthew Auld <matthew.auld@intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
> drivers/gpu/drm/i915/i915_gem.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index f445587c1a4b..25b59dbb29b0 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -4714,7 +4714,7 @@ int i915_gem_init_hw(struct drm_i915_private *dev_priv)
> /* Double layer security blanket, see i915_gem_init() */
> intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
>
> - if (HAS_EDRAM(dev_priv) && INTEL_GEN(dev_priv) < 9)
> + if (HAS_EDRAM(dev_priv))
> I915_WRITE(HSW_IDICR, I915_READ(HSW_IDICR) | IDIHASHMSK(0xf));
Hmm. For me the spec seems to be saying
"Note: It is required for GFX Driver to set [19:16] to 1 when eDRAM
configuration is enabled.
For Skylake, S/W is not needed to program this register as eDRAM is a
memory side cache."
But for CNL I only see the first sentence. Does that mean they moved
the eLLC back to the ring side of the system agent, or just someone
forgot to update this for CNL? The fact that eLLC moved to the memory
side of the system agent on SKL isn't really mentioned anywhere else
in the spec either AFAICS. Seems like a rather big elephant to overlook.
Might be nice to get some clarification into the spec for this stuff.
Oh and I wonder what we should be doing with bits [21:20]?
>
> if (IS_HASWELL(dev_priv))
> --
> 2.13.5
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH] drm/i915: Return IDI Hash Mask setup for gen9+
2017-09-14 19:44 ` [PATCH] " Ville Syrjälä
@ 2017-09-14 19:54 ` Rodrigo Vivi
0 siblings, 0 replies; 7+ messages in thread
From: Rodrigo Vivi @ 2017-09-14 19:54 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx, Matthew Auld, Mika Kuoppala
On Thu, Sep 14, 2017 at 07:44:29PM +0000, Ville Syrjälä wrote:
> On Thu, Sep 14, 2017 at 12:18:41PM -0700, Rodrigo Vivi wrote:
> > Spec teels:
> > "It is required for GFX Driver to set [19:16] to 1 when
> > eDRAM configuration is enabled."
> >
> > This basically reverts commit 666fbcf5c21d ("drm/i915: Don't
> > program eLLC IDI hash mask for gen9+")
> >
> > This requirement hasn't changed since HSW up to CNL.
> > But that commit was created before EDRAM was properly
> > organized with commit 3accaf7e734d ("drm/i915: Store
> > and use edram capabilities")
> >
> > Cc: Mika Kuoppala <mika.kuoppala@intel.com>
> > Cc: Matthew Auld <matthew.auld@intel.com>
> > Cc: Chris Wilson <chris@chris-wilson.co.uk>
> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > ---
> > drivers/gpu/drm/i915/i915_gem.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> > index f445587c1a4b..25b59dbb29b0 100644
> > --- a/drivers/gpu/drm/i915/i915_gem.c
> > +++ b/drivers/gpu/drm/i915/i915_gem.c
> > @@ -4714,7 +4714,7 @@ int i915_gem_init_hw(struct drm_i915_private *dev_priv)
> > /* Double layer security blanket, see i915_gem_init() */
> > intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
> >
> > - if (HAS_EDRAM(dev_priv) && INTEL_GEN(dev_priv) < 9)
> > + if (HAS_EDRAM(dev_priv))
> > I915_WRITE(HSW_IDICR, I915_READ(HSW_IDICR) | IDIHASHMSK(0xf));
>
> Hmm. For me the spec seems to be saying
> "Note: It is required for GFX Driver to set [19:16] to 1 when eDRAM
> configuration is enabled.
> For Skylake, S/W is not needed to program this register as eDRAM is a
> memory side cache."
Oh I had missed the SKL specoific version... was looking to an older and a newer...
>
> But for CNL I only see the first sentence. Does that mean they moved
> the eLLC back to the ring side of the system agent, or just someone
> forgot to update this for CNL? The fact that eLLC moved to the memory
> side of the system agent on SKL isn't really mentioned anywhere else
> in the spec either AFAICS. Seems like a rather big elephant to overlook.
> Might be nice to get some clarification into the spec for this stuff.
>
> Oh and I wonder what we should be doing with bits [21:20]?
good question...
also if it is whole 0xf or only 1 to the whole field.
>
> >
> > if (IS_HASWELL(dev_priv))
> > --
> > 2.13.5
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
> --
> Ville Syrjälä
> Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* ✗ Fi.CI.IGT: warning for drm/i915: Return IDI Hash Mask setup for gen9+
2017-09-14 19:18 [PATCH] drm/i915: Return IDI Hash Mask setup for gen9+ Rodrigo Vivi
` (2 preceding siblings ...)
2017-09-14 19:44 ` [PATCH] " Ville Syrjälä
@ 2017-09-15 4:05 ` Patchwork
3 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2017-09-15 4:05 UTC (permalink / raw)
To: Rodrigo Vivi; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Return IDI Hash Mask setup for gen9+
URL : https://patchwork.freedesktop.org/series/30383/
State : warning
== Summary ==
Test perf:
Subgroup blocking:
pass -> FAIL (shard-hsw) fdo#102252
Test kms_frontbuffer_tracking:
Subgroup fbc-1p-primscrn-pri-indfb-draw-mmap-wc:
pass -> SKIP (shard-hsw)
Subgroup fbc-rgb565-draw-pwrite:
pass -> SKIP (shard-hsw)
Test kms_setmode:
Subgroup basic:
fail -> PASS (shard-hsw) fdo#99912
Test kms_plane:
Subgroup plane-panning-bottom-right-suspend-pipe-C-planes:
skip -> PASS (shard-hsw)
Subgroup plane-panning-bottom-right-suspend-pipe-A-planes:
pass -> SKIP (shard-hsw)
Test kms_rmfb:
Subgroup close-fd:
skip -> PASS (shard-hsw)
Test kms_universal_plane:
Subgroup universal-plane-pipe-B-functional:
skip -> PASS (shard-hsw)
Test kms_cursor_crc:
Subgroup cursor-256x256-dpms:
skip -> PASS (shard-hsw)
Test kms_busy:
Subgroup extended-modeset-hang-newfb-render-B:
pass -> SKIP (shard-hsw)
Test kms_plane_multiple:
Subgroup atomic-pipe-C-tiling-x:
pass -> SKIP (shard-hsw)
fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252
fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912
shard-hsw total:2313 pass:1241 dwarn:0 dfail:0 fail:12 skip:1060 time:9425s
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_5710/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2017-09-15 4:05 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2017-09-14 19:18 [PATCH] drm/i915: Return IDI Hash Mask setup for gen9+ Rodrigo Vivi
2017-09-14 19:25 ` Chris Wilson
2017-09-14 19:52 ` Rodrigo Vivi
2017-09-14 19:38 ` ✓ Fi.CI.BAT: success for " Patchwork
2017-09-14 19:44 ` [PATCH] " Ville Syrjälä
2017-09-14 19:54 ` Rodrigo Vivi
2017-09-15 4:05 ` ✗ Fi.CI.IGT: warning for " Patchwork
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