From: Fredrik Noring <noring@nocrew.org>
To: "Maciej W. Rozycki" <macro@imgtec.com>
Cc: linux-mips@linux-mips.org
Subject: Re: [PATCH v2] MIPS: Add basic R5900 support
Date: Wed, 20 Sep 2017 16:07:17 +0200 [thread overview]
Message-ID: <20170920140715.GA9255@localhost.localdomain> (raw)
In-Reply-To: <alpine.DEB.2.00.1709171001160.16752@tp.orcam.me.uk>
Hi Maciej,
> Can you add a diagnostic consistency check to the context restoration
> code, i.e. all the macros called from RESTORE_ALL (in <asm/stackframe.h>),
> such as a `break 12' (BRK_BUG) instruction if a register value is not
> correctly sign-extended?
Hmm... I think some details need to be sorted out for this. The LW
instruction used to restore registers sign-extends to register length by
definition (p. A-70 in the TX79 manual), so I assume that isn't what we
are going to check unless we suspect a grave hardware error with LW? (Do
we need to check the register values immediately prior to LW?)
Another possibility would be to check that saved registers in SAVE_ALL
will be restored properly. That is, immediately after SW check that LW
(to a temporary register such as k1) will restore to the same value by
64-bit comparison and trap if unequal (TNE). I thought that made sense.
Something like for example
sw $17, PT_R17(sp)
lw k1, PT_R17(sp)
tne k1, $17, 12
as a replacement for
LONG_S $17, PT_R17(sp)
in SAVE_STATIC?
A question is whether registers are clobbered within the kernel itself
(via interrupts or some such) or for user programs.
Fredrik
next prev parent reply other threads:[~2017-09-20 14:07 UTC|newest]
Thread overview: 117+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-08-27 13:23 [PATCH] MIPS: Add basic R5900 support Fredrik Noring
2017-08-28 13:53 ` Ralf Baechle
2017-08-28 17:11 ` Maciej W. Rozycki
2017-08-29 17:33 ` Fredrik Noring
2017-08-29 17:24 ` Maciej W. Rozycki
2017-08-29 17:24 ` Maciej W. Rozycki
2017-08-30 13:23 ` Fredrik Noring
2017-08-31 15:11 ` Maciej W. Rozycki
2017-08-31 15:11 ` Maciej W. Rozycki
2017-09-02 10:28 ` Fredrik Noring
2017-09-09 10:13 ` Maciej W. Rozycki
2017-09-09 10:13 ` Maciej W. Rozycki
2017-09-11 5:21 ` Maciej W. Rozycki
2017-09-11 5:21 ` Maciej W. Rozycki
2017-09-12 17:59 ` Fredrik Noring
2017-09-15 11:12 ` Maciej W. Rozycki
2017-09-15 11:12 ` Maciej W. Rozycki
2017-09-15 13:19 ` Fredrik Noring
2017-09-15 18:28 ` Maciej W. Rozycki
2017-09-15 18:28 ` Maciej W. Rozycki
2017-09-02 14:10 ` [PATCH v2] " Fredrik Noring
2017-09-11 5:18 ` Maciej W. Rozycki
2017-09-11 5:18 ` Maciej W. Rozycki
2017-09-11 15:17 ` Fredrik Noring
2017-09-14 13:50 ` Maciej W. Rozycki
2017-09-14 13:50 ` Maciej W. Rozycki
2017-09-16 13:34 ` Fredrik Noring
2017-09-18 17:05 ` Maciej W. Rozycki
2017-09-18 17:05 ` Maciej W. Rozycki
2017-09-18 19:24 ` Fredrik Noring
2017-09-19 12:44 ` Maciej W. Rozycki
2017-09-19 12:44 ` Maciej W. Rozycki
2017-09-20 14:54 ` Fredrik Noring
2017-09-26 11:50 ` Maciej W. Rozycki
2017-09-26 11:50 ` Maciej W. Rozycki
2017-09-27 17:21 ` Fredrik Noring
2017-09-28 12:13 ` Maciej W. Rozycki
2017-09-28 12:13 ` Maciej W. Rozycki
2017-09-30 6:56 ` Fredrik Noring
2017-10-02 9:05 ` Maciej W. Rozycki
2017-10-02 9:05 ` Maciej W. Rozycki
2017-10-02 16:33 ` Fredrik Noring
2017-10-29 17:20 ` Fredrik Noring
2017-11-10 23:34 ` Maciej W. Rozycki
2017-11-10 23:34 ` Maciej W. Rozycki
2017-11-11 16:04 ` Fredrik Noring
2018-01-29 20:27 ` Fredrik Noring
2018-01-31 23:01 ` Maciej W. Rozycki
2018-02-11 7:29 ` [RFC] MIPS: R5900: Workaround for the short loop bug Fredrik Noring
2018-02-12 9:25 ` Maciej W. Rozycki
2018-02-12 15:22 ` Fredrik Noring
2018-02-11 7:46 ` [RFC] MIPS: R5900: Use SYNC.L for data cache and SYNC.P for instruction cache Fredrik Noring
2018-02-11 7:56 ` [RFC] MIPS: R5900: Workaround exception NOP execution bug (FLX05) Fredrik Noring
2018-02-12 9:28 ` Maciej W. Rozycki
2018-02-15 19:15 ` [RFC v2] " Fredrik Noring
2018-02-15 20:49 ` Maciej W. Rozycki
2018-02-17 11:16 ` Fredrik Noring
2018-02-17 11:57 ` Maciej W. Rozycki
2018-02-17 13:38 ` Fredrik Noring
2018-02-17 15:03 ` Maciej W. Rozycki
2018-02-17 20:04 ` Fredrik Noring
2018-02-20 14:09 ` Maciej W. Rozycki
2018-02-22 17:04 ` Fredrik Noring
2018-02-18 8:47 ` Fredrik Noring
2018-02-20 14:41 ` Maciej W. Rozycki
2018-02-22 17:27 ` Fredrik Noring
2018-02-11 8:01 ` [RFC] MIPS: R5900: Workaround for CACHE instruction near branch delay slot Fredrik Noring
2018-02-11 11:16 ` Aw: " "Jürgen Urban"
2018-02-11 8:09 ` [RFC] MIPS: R5900: The ERET instruction has issues with delay slot and CACHE Fredrik Noring
2018-02-11 11:07 ` Aw: " "Jürgen Urban"
2018-02-11 8:29 ` [RFC] MIPS: R5900: Use mandatory SYNC.L in exception handlers Fredrik Noring
2018-02-11 10:33 ` Aw: " "Jürgen Urban"
2018-02-12 9:22 ` Maciej W. Rozycki
2018-02-12 9:22 ` Maciej W. Rozycki
2018-02-18 10:30 ` Fredrik Noring
2018-02-17 14:43 ` [RFC] MIPS: R5900: Workaround for saving and restoring FPU registers Fredrik Noring
2018-02-17 15:18 ` Maciej W. Rozycki
2018-02-17 17:47 ` Fredrik Noring
2018-02-17 19:33 ` Maciej W. Rozycki
2018-02-18 9:26 ` [RFC] MIPS: R5900: Workaround where MSB must be 0 for the instruction cache Fredrik Noring
2018-02-18 11:08 ` [RFC] MIPS: R5900: Add mandatory SYNC.P to all M[FT]C0 instructions Fredrik Noring
2018-03-03 12:26 ` [RFC] MIPS: PS2: Interrupt request (IRQ) support Fredrik Noring
2018-03-03 13:09 ` Maciej W. Rozycki
2018-03-03 14:14 ` Fredrik Noring
2018-04-09 15:51 ` Fredrik Noring
2018-03-18 10:45 ` Fredrik Noring
2018-03-19 19:15 ` Thomas Gleixner
2018-06-18 18:52 ` [RFC v2] " Fredrik Noring
2017-10-30 17:55 ` [PATCH v2] MIPS: Add basic R5900 support Fredrik Noring
2017-11-24 10:26 ` Maciej W. Rozycki
2017-11-24 10:26 ` Maciej W. Rozycki
2017-11-24 10:39 ` Maciej W. Rozycki
2017-11-24 10:39 ` Maciej W. Rozycki
2017-09-20 14:07 ` Fredrik Noring [this message]
2017-09-21 21:07 ` Maciej W. Rozycki
2017-09-21 21:07 ` Maciej W. Rozycki
2017-09-22 16:37 ` Fredrik Noring
2017-09-22 16:37 ` Fredrik Noring
2017-09-29 23:55 ` Maciej W. Rozycki
2017-09-29 23:55 ` Maciej W. Rozycki
2017-09-30 18:26 ` Fredrik Noring
2017-10-02 9:11 ` Maciej W. Rozycki
2017-10-02 9:11 ` Maciej W. Rozycki
2017-10-03 19:49 ` Fredrik Noring
2017-10-05 19:04 ` Fredrik Noring
2017-10-06 20:28 ` Fredrik Noring
2017-10-15 16:39 ` Fredrik Noring
2017-10-17 12:23 ` Maciej W. Rozycki
2017-10-17 12:23 ` Maciej W. Rozycki
2017-10-21 18:00 ` Fredrik Noring
2017-10-23 16:10 ` Maciej W. Rozycki
2017-10-23 16:10 ` Maciej W. Rozycki
2017-09-21 18:11 ` Paul Burton
2017-09-21 18:11 ` Paul Burton
2017-09-21 19:48 ` Maciej W. Rozycki
2017-09-21 19:48 ` Maciej W. Rozycki
2017-10-29 18:42 ` Fredrik Noring
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20170920140715.GA9255@localhost.localdomain \
--to=noring@nocrew.org \
--cc=linux-mips@linux-mips.org \
--cc=macro@imgtec.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.