From: Stephen Boyd <sboyd@codeaurora.org>
To: Joel Stanley <joel@jms.id.au>
Cc: Lee Jones <lee.jones@linaro.org>,
Michael Turquette <mturquette@baylibre.com>,
linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Andrew Jeffery <andrew@aj.id.au>,
Benjamin Herrenschmidt <benh@kernel.crashing.org>,
Jeremy Kerr <jk@ozlabs.org>, Rick Altherr <raltherr@google.com>,
Ryan Chen <ryan_chen@aspeedtech.com>,
Arnd Bergmann <arnd@arndb.de>
Subject: Re: [PATCH v2 2/5] clk: aspeed: Register core clocks
Date: Mon, 2 Oct 2017 14:39:58 -0700 [thread overview]
Message-ID: <20171002213958.GR457@codeaurora.org> (raw)
In-Reply-To: <20170921042641.7326-3-joel@jms.id.au>
On 09/21, Joel Stanley wrote:
> @@ -112,9 +115,137 @@ static const struct aspeed_gate_data aspeed_gates[] __initconst = {
> /* 31: reserved */
> };
>
> +static const struct clk_div_table ast2400_div_table[] = {
> + { 0x0, 2 },
> + { 0x1, 4 },
> + { 0x2, 6 },
> + { 0x3, 8 },
> + { 0x4, 10 },
> + { 0x5, 12 },
> + { 0x6, 14 },
> + { 0x7, 16 },
> + { 0 }
> +};
> +
> +static const struct clk_div_table ast2500_div_table[] = {
> + { 0x0, 4 },
> + { 0x1, 8 },
> + { 0x2, 12 },
> + { 0x3, 16 },
> + { 0x4, 20 },
> + { 0x5, 24 },
> + { 0x6, 28 },
> + { 0x7, 32 },
> + { 0 }
> +};
> +
> +static struct clk_hw *aspeed_calc_pll(const char *name, u32 val)
> +{
> + unsigned int mult, div;
> +
> + if (val & BIT(20)) {
#define for these BIT() things please. Or a comment, but #define
is probably better. Just improves readability.
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
WARNING: multiple messages have this Message-ID (diff)
From: sboyd@codeaurora.org (Stephen Boyd)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 2/5] clk: aspeed: Register core clocks
Date: Mon, 2 Oct 2017 14:39:58 -0700 [thread overview]
Message-ID: <20171002213958.GR457@codeaurora.org> (raw)
In-Reply-To: <20170921042641.7326-3-joel@jms.id.au>
On 09/21, Joel Stanley wrote:
> @@ -112,9 +115,137 @@ static const struct aspeed_gate_data aspeed_gates[] __initconst = {
> /* 31: reserved */
> };
>
> +static const struct clk_div_table ast2400_div_table[] = {
> + { 0x0, 2 },
> + { 0x1, 4 },
> + { 0x2, 6 },
> + { 0x3, 8 },
> + { 0x4, 10 },
> + { 0x5, 12 },
> + { 0x6, 14 },
> + { 0x7, 16 },
> + { 0 }
> +};
> +
> +static const struct clk_div_table ast2500_div_table[] = {
> + { 0x0, 4 },
> + { 0x1, 8 },
> + { 0x2, 12 },
> + { 0x3, 16 },
> + { 0x4, 20 },
> + { 0x5, 24 },
> + { 0x6, 28 },
> + { 0x7, 32 },
> + { 0 }
> +};
> +
> +static struct clk_hw *aspeed_calc_pll(const char *name, u32 val)
> +{
> + unsigned int mult, div;
> +
> + if (val & BIT(20)) {
#define for these BIT() things please. Or a comment, but #define
is probably better. Just improves readability.
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
next prev parent reply other threads:[~2017-10-02 21:39 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-09-21 4:26 [PATCH v2 0/5] clk: Add Aspeed clock driver Joel Stanley
2017-09-21 4:26 ` Joel Stanley
2017-09-21 4:26 ` [PATCH v2 1/5] clk: Add clock driver for ASPEED BMC SoCs Joel Stanley
2017-09-21 4:26 ` Joel Stanley
2017-09-25 3:40 ` Andrew Jeffery
2017-09-25 3:40 ` Andrew Jeffery
2017-09-27 6:11 ` Joel Stanley
2017-09-27 6:11 ` Joel Stanley
2017-09-21 4:26 ` [PATCH v2 2/5] clk: aspeed: Register core clocks Joel Stanley
2017-09-21 4:26 ` Joel Stanley
2017-09-25 12:02 ` Andrew Jeffery
2017-09-25 12:02 ` Andrew Jeffery
2017-09-27 6:13 ` Joel Stanley
2017-09-27 6:13 ` Joel Stanley
2017-10-02 21:39 ` Stephen Boyd [this message]
2017-10-02 21:39 ` Stephen Boyd
2017-09-21 4:26 ` [PATCH v2 3/5] clk: aspeed: Add platform driver and register PLLs Joel Stanley
2017-09-21 4:26 ` Joel Stanley
2017-09-25 12:40 ` Andrew Jeffery
2017-09-25 12:40 ` Andrew Jeffery
2017-09-27 6:13 ` Joel Stanley
2017-09-27 6:13 ` Joel Stanley
2017-09-27 7:34 ` Andrew Jeffery
2017-09-27 7:34 ` Andrew Jeffery
2017-09-28 4:29 ` Joel Stanley
2017-09-28 4:29 ` Joel Stanley
2017-10-02 21:24 ` Stephen Boyd
2017-10-02 21:24 ` Stephen Boyd
2017-10-03 5:48 ` Joel Stanley
2017-10-03 5:48 ` Joel Stanley
2017-10-04 21:18 ` Stephen Boyd
2017-10-04 21:18 ` Stephen Boyd
2017-10-05 6:22 ` Joel Stanley
2017-10-05 6:22 ` Joel Stanley
2017-09-21 4:26 ` [PATCH v2 4/5] clk: aspeed: Register gated clocks Joel Stanley
2017-09-21 4:26 ` Joel Stanley
2017-10-02 21:37 ` Stephen Boyd
2017-10-02 21:37 ` Stephen Boyd
2017-10-03 5:47 ` Joel Stanley
2017-10-03 5:47 ` Joel Stanley
2017-09-21 4:26 ` [PATCH v2 5/5] clk: aspeed: Add reset controller Joel Stanley
2017-09-21 4:26 ` Joel Stanley
2017-09-25 12:54 ` Andrew Jeffery
2017-09-25 12:54 ` Andrew Jeffery
2017-09-27 6:13 ` Joel Stanley
2017-09-27 6:13 ` Joel Stanley
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