From: Yi Sun <yi.y.sun@linux.intel.com>
To: Jan Beulich <JBeulich@suse.com>
Cc: andrew.cooper3@citrix.com, xen-devel@lists.xenproject.org,
wei.liu2@citrix.com, chao.p.peng@linux.intel.com,
roger.pau@citrix.com
Subject: Re: [PATCH v4 07/15] x86: implement set value flow for MBA
Date: Thu, 5 Oct 2017 18:32:07 +0800 [thread overview]
Message-ID: <20171005103207.GK11006@yi.y.sun> (raw)
In-Reply-To: <59D60F9502000078001826A4@prv-mh.provo.novell.com>
On 17-10-05 02:55:17, Jan Beulich wrote:
> >>> On 05.10.17 at 06:48, <yi.y.sun@linux.intel.com> wrote:
> > On 17-10-03 23:59:46, Jan Beulich wrote:
> >> >>> Yi Sun <yi.y.sun@linux.intel.com> 09/29/17 4:58 AM >>>
> >> >On 17-09-28 05:36:11, Jan Beulich wrote:
> >> >> >>> On 23.09.17 at 11:48, <yi.y.sun@linux.intel.com> wrote:
[...]
> >> >> > {
> >> >> > const struct cos_write_info *info = data;
> >> >> > - struct feat_node *feat = info->feature;
> >> >> > - const struct feat_props *props = info->props;
> >> >> > - unsigned int i, cos = info->cos, cos_num = props->cos_num;
> >> >> > + unsigned int i, index = 0, cos = info->cos;
> >> >> > + const uint32_t *val_array = info->val;
> >> >> >
> >> >> > - for ( i = 0; i < cos_num; i++ )
> >> >> > + for ( i = 0; i < ARRAY_SIZE(feat_props); i++ )
> >> >> > {
> >> >> > - if ( feat->cos_reg_val[cos * cos_num + i] != info->val[i] )
> >> >> > + struct feat_node *feat = info->features[i];
> >> >> > + const struct feat_props *props = info->props[i];
> >> >> > + unsigned int cos_num, j;
> >> >> > +
> >> >> > + if ( !feat || !props )
> >> >> > + continue;
> >> >> > +
> >> >> > + cos_num = props->cos_num;
> >> >> > + if ( info->array_len < index + cos_num )
> >> >> > + return;
> >> >> > +
> >> >> > + for ( j = 0; j < cos_num; j++ )
> >> >> > {
> >> >> > - feat->cos_reg_val[cos * cos_num + i] = info->val[i];
> >> >> > - props->write_msr(cos, info->val[i], props->type[i]);
> >> >> > + if ( feat->cos_reg_val[cos * cos_num + j] != val_array[index + j] )
> >> >> > + feat->cos_reg_val[cos * cos_num + j] =
> >> >> > + props->write_msr(cos, val_array[index + j], props->type[j]);
> >> >>
> >> >> This renders partly useless the check: If hardware can alter the
> >> >> value, repeatedly requesting the same value to be written will
> >> >> no longer guarantee the MSR write to be skipped. If hardware
> >> >> behavior can't be predicted you may want to consider recording
> >> >> both the value in found by reading back the register written and
> >> >> the value that was written - a match with either would eliminate
> >> >> the need to do the write.
> >> >>
> >> >The hardware behavior is explicitly defined by SDM and mentioned in
> >> >'xl-psr.markdown' and 'intel_psr_mba.pandoc'. User should know that HW
> >> >can alter MBA value if the value is not valid.
> >>
> >> So if hardware behavior is fully defined, why don't you pre-adjust what is
> >> to be written to the value hardware would alter it to?
> >>
> > In previous version of MBA patch set, I pre-adjust the value in 'mba_check_thrtl'.
> > But Roger did not like that. So, the pre-adjust codes are removed.
>
> Could you point me at or repeat the reason(s) of his dislike?
>
Roger has replied.
> >> >This check is not only for MBA but also for CAT features that the HW
> >> >cannot alter CAT value.
> >>
> >> I don't understand this part.
> >>
> > I mean the check here are for all features so we cannot remove it.
>
> I _still_ don't understand: If the check can't be removed (even
> without MBA in mind), then the implication would be that the
> code prior to this series is buggy. In which case I'd expect you to
> submit a standalone bug fix, rather than mixing the fix into here.
>
Ok, I will send out a stand alone patch to fix this.
> >> > Although this check is not a critical check,
> >> >it can prevent some non-necessary MSR write.
> >>
> >> That's my point - while previously all unnecessary writes were avoided,
> >> you now avoid only some.
> >>
> > Without the pre-adjust codes in 'mba_check_thrtl', if user inputs value, e.g.
> > 11/22/33/..., this check cannot prevent the write action. So, only some can
> > be avoided in current codes.
>
> Right. If it's worthwhile avoiding the writes, all of them should be
> avoided when the resulting value isn't going to change. Otherwise
> the write avoidance logic can/should be dropped altogether.
>
Per discussion in other mails, I think I will restore codes in 'mba_check_thrtl'.
> Jan
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next prev parent reply other threads:[~2017-10-05 10:33 UTC|newest]
Thread overview: 64+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-09-23 9:48 [PATCH v4 00/15] Enable Memory Bandwidth Allocation in Xen Yi Sun
2017-09-23 9:48 ` [PATCH v4 01/15] docs: create Memory Bandwidth Allocation (MBA) feature document Yi Sun
2017-09-25 15:13 ` Roger Pau Monné
2017-09-23 9:48 ` [PATCH v4 02/15] Rename PSR sysctl/domctl interfaces and xsm policy to make them be general Yi Sun
2017-09-25 16:15 ` Roger Pau Monné
2017-09-26 5:15 ` Yi Sun
2017-09-26 14:19 ` Wei Liu
2017-09-28 2:12 ` Yi Sun
2017-09-28 8:34 ` Wei Liu
2017-09-28 10:21 ` Jan Beulich
2017-09-29 1:34 ` Yi Sun
2017-10-04 5:47 ` Jan Beulich
2017-09-23 9:48 ` [PATCH v4 03/15] x86: rename 'cbm_type' to 'psr_type' to make it general Yi Sun
2017-09-28 10:25 ` Jan Beulich
2017-09-29 1:35 ` Yi Sun
2017-09-23 9:48 ` [PATCH v4 04/15] x86: implement data structure and CPU init flow for MBA Yi Sun
2017-09-26 8:38 ` Roger Pau Monné
2017-09-28 10:27 ` Jan Beulich
2017-09-28 11:00 ` Jan Beulich
2017-09-29 1:53 ` Yi Sun
2017-10-04 5:52 ` Jan Beulich
2017-10-05 4:42 ` Yi Sun
2017-10-05 8:49 ` Jan Beulich
2017-10-05 10:08 ` Yi Sun
2017-09-23 9:48 ` [PATCH v4 05/15] x86: implement get hw info " Yi Sun
2017-09-26 8:46 ` Roger Pau Monné
2017-09-26 11:49 ` Jan Beulich
2017-09-23 9:48 ` [PATCH v4 06/15] x86: implement get value interface " Yi Sun
2017-09-28 11:12 ` Jan Beulich
2017-09-23 9:48 ` [PATCH v4 07/15] x86: implement set value flow " Yi Sun
2017-09-26 9:39 ` Roger Pau Monné
2017-09-28 2:39 ` Yi Sun
2017-09-28 11:15 ` Jan Beulich
2017-09-28 11:36 ` Jan Beulich
2017-09-29 2:56 ` Yi Sun
2017-10-04 5:59 ` Jan Beulich
2017-10-05 4:48 ` Yi Sun
2017-10-05 8:39 ` Roger Pau Monné
2017-10-05 9:39 ` Jan Beulich
2017-10-05 10:10 ` Yi Sun
2017-10-05 8:55 ` Jan Beulich
2017-10-05 10:32 ` Yi Sun [this message]
2017-09-23 9:48 ` [PATCH v4 08/15] tools: create general interfaces to support psr allocation features Yi Sun
2017-09-26 10:11 ` Roger Pau Monné
2017-09-23 9:48 ` [PATCH v4 09/15] tools: implement the new libxc get hw info interface Yi Sun
2017-09-26 10:22 ` Roger Pau Monné
2017-09-23 9:48 ` [PATCH v4 10/15] tools: implement the new libxl " Yi Sun
2017-09-26 10:54 ` Roger Pau Monné
2017-09-23 9:48 ` [PATCH v4 11/15] tools: implement the new xl " Yi Sun
2017-09-26 11:19 ` Roger Pau Monné
2017-09-23 9:48 ` [PATCH v4 12/15] tools: rename 'xc_psr_cat_type' to 'xc_psr_type' Yi Sun
2017-09-26 11:21 ` Roger Pau Monné
2017-09-23 9:48 ` [PATCH v4 13/15] tools: implement new generic get value interface and MBA get value command Yi Sun
2017-09-26 11:34 ` Roger Pau Monné
2017-09-23 9:48 ` [PATCH v4 14/15] tools: implement new generic set value interface and MBA set " Yi Sun
2017-09-26 11:39 ` Roger Pau Monné
2017-09-28 2:46 ` Yi Sun
2017-09-23 9:48 ` [PATCH v4 15/15] docs: add MBA description in docs Yi Sun
2017-09-26 11:45 ` Roger Pau Monné
2017-09-26 11:48 ` [PATCH v4 00/15] Enable Memory Bandwidth Allocation in Xen Roger Pau Monné
2017-09-28 2:20 ` Yi Sun
2017-09-28 15:57 ` Wei Liu
2017-09-29 2:58 ` Yi Sun
2017-09-29 8:02 ` Wei Liu
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