Re: [PATCH 0/2] Add support for Hi6220 coresight

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From: Leo Yan <leo.yan@linaro.org>
To: Stephen Boyd <sboyd@codeaurora.org>
Cc: Wei Xu <xuwei5@hisilicon.com>, Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Michael Turquette <mturquette@baylibre.com>,
	Li Pengcheng <lipengcheng8@huawei.com>,
	Zhangfei Gao <zhangfei.gao@linaro.org>,
	linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org
Subject: Re: [PATCH 0/2] Add support for Hi6220 coresight
Date: Sat, 7 Oct 2017 20:18:02 +0800	[thread overview]
Message-ID: <20171007121802.GC23080@leoy-linaro> (raw)
In-Reply-To: <20170901013301.GN21656@codeaurora.org>

Hi Stephen, Wei,

On Thu, Aug 31, 2017 at 06:33:01PM -0700, Stephen Boyd wrote:
> On 09/01, Leo Yan wrote:
> > This patch series adds support for coresight on Hi6220; the first patch
> > is to fix coresight PLL so can avoid system hang after we enable
> > coresight, the second patch is to add DT binding according to coresight
> > topology.
> > 
> > The patch has been tested on Hikey; By using OpenCSD snapshot mode, it
> > can successfully decode ETF and ETB trace data.
> > 
> 
> I can take the first one and second one goes through arm-soc?

Could you pick these two patches for Hi6220 coresight enabling for
this merge window? Or need me resend these two patches?

Thanks,
Leo Yan

WARNING: multiple messages have this Message-ID (diff)

From: leo.yan@linaro.org (Leo Yan)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 0/2] Add support for Hi6220 coresight
Date: Sat, 7 Oct 2017 20:18:02 +0800	[thread overview]
Message-ID: <20171007121802.GC23080@leoy-linaro> (raw)
In-Reply-To: <20170901013301.GN21656@codeaurora.org>

Hi Stephen, Wei,

On Thu, Aug 31, 2017 at 06:33:01PM -0700, Stephen Boyd wrote:
> On 09/01, Leo Yan wrote:
> > This patch series adds support for coresight on Hi6220; the first patch
> > is to fix coresight PLL so can avoid system hang after we enable
> > coresight, the second patch is to add DT binding according to coresight
> > topology.
> > 
> > The patch has been tested on Hikey; By using OpenCSD snapshot mode, it
> > can successfully decode ETF and ETB trace data.
> > 
> 
> I can take the first one and second one goes through arm-soc?

Could you pick these two patches for Hi6220 coresight enabling for
this merge window? Or need me resend these two patches?

Thanks,
Leo Yan

next prev parent reply	other threads:[~2017-10-07 12:18 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-09-01  0:47 [PATCH 0/2] Add support for Hi6220 coresight Leo Yan
2017-09-01  0:47 ` Leo Yan
2017-09-01  0:47 ` Leo Yan
2017-09-01  0:47 ` [PATCH 1/2] clk: hi6220: mark clock cs_atb_syspll as critical Leo Yan
2017-09-01  0:47   ` Leo Yan
2017-09-01  0:47 ` [PATCH 2/2] arm64: dts: hi6220: add coresight binding Leo Yan
2017-09-01  0:47   ` Leo Yan
2017-09-01  1:33 ` [PATCH 0/2] Add support for Hi6220 coresight Stephen Boyd
2017-09-01  1:33   ` Stephen Boyd
2017-10-07 12:18   ` Leo Yan [this message]
2017-10-07 12:18     ` Leo Yan
2017-10-13  8:57     ` Wei Xu
2017-10-13  8:57       ` Wei Xu
2017-10-13  8:57       ` Wei Xu
2017-11-01 15:48       ` Michael Turquette
2017-11-01 15:48         ` Michael Turquette
2017-11-01 15:48         ` Michael Turquette
2017-11-02 10:41         ` Leo Yan
2017-11-02 10:41           ` Leo Yan

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