All of lore.kernel.org
 help / color / mirror / Atom feed
From: Lorenzo Pieralisi <lorenzo.pieralisi at arm.com>
To: devel@acpica.org
Subject: Re: [Devel] [PATCH v9 4/4] PCI: hisi: blacklist hip06/hip07 controllers behind SMMUv3
Date: Tue, 10 Oct 2017 11:06:30 +0100	[thread overview]
Message-ID: <20171010100630.GA764@red-moon> (raw)
In-Reply-To: 5FC3163CFD30C246ABAA99954A238FA838421875@FRAEML521-MBX.china.huawei.com

[-- Attachment #1: Type: text/plain, Size: 2325 bytes --]

On Tue, Oct 10, 2017 at 09:42:30AM +0000, Shameerali Kolothum Thodi wrote:

[...]

> > > diff --git a/drivers/pci/dwc/pcie-hisi.c b/drivers/pci/dwc/pcie-hisi.c
> > > index a201791..6800747 100644
> > > --- a/drivers/pci/dwc/pcie-hisi.c
> > > +++ b/drivers/pci/dwc/pcie-hisi.c
> > > @@ -270,6 +270,12 @@ static int hisi_pcie_probe(struct platform_device
> > *pdev)
> > >  	struct resource *reg;
> > >  	int ret;
> > >
> > > +	if ((IS_BUILTIN(CONFIG_ARM_SMMU_V3)) &&
> > > +			of_property_read_bool(dev->of_node, "iommu-
> > map")) {
> > 
> > Does the presence of "iommu-map" tell you this is an SMMUv3?  Could it
> > have a different type of IOMMU?  I can't tell from reading
> > Documentation/devicetree/bindings/pci/pci-iommu.txt.
> 
> Only if the SMMUv3 driver is loaded and iommu-map binding property present,
> the pcie devices will use SMMU translated iova for MSI doorbell addresses.

And the iommu-map property _actually_ points at an OF node with an
SMMUv3 compatible string - the sheer fact that the SMMUv3 driver
is compiled in is not sufficient IIUC.

Lorenzo

> > Why do you care whether CONFIG_ARM_SMMU_V3 is set?  Does MSI work
> > correctly if SMMUv3 is present but not used?
> 
> Yes. MSI will work if no SMMUv3 is used.
> 
> > Is it really necessary to ignore the PCIe controller completely?
> > Could you use the devices below it as long as you disable MSI for them?  I
> > know there are probably devices that require MSI, so maybe it's easier to
> > just ignore everything than to respond to reports of "my device doesn't work
> > because it requires MSI."
> 
> We are blacklisting MSI for PCIe only if the kernel is using DT and is configured
> to use SMMUv3. Otherwise it is fine. And as I said above DT is not officially
> supported on these platforms.
> 
> Thanks,
> Shameer
> 
> 1. [PATCH v6 3/3] iommu/arm-smmu-v3:Enable ACPI based HiSilicon erratum 161010801
> https://www.spinics.net/lists/arm-kernel/msg602873.html
> 2. [PATCH v8 3/5] iommu/of: Add msi address regions reservation helper
> https://www.spinics.net/lists/arm-kernel/msg609431.html
> 
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel(a)lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
To: Shameerali Kolothum Thodi <shameerali.kolothum.thodi@huawei.com>
Cc: Bjorn Helgaas <helgaas@kernel.org>,
	"Guohanjun (Hanjun Guo)" <guohanjun@huawei.com>,
	Gabriele Paoloni <gabriele.paoloni@huawei.com>,
	"marc.zyngier@arm.com" <marc.zyngier@arm.com>,
	"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
	"joro@8bytes.org" <joro@8bytes.org>,
	John Garry <john.garry@huawei.com>,
	"will.deacon@arm.com" <will.deacon@arm.com>,
	Linuxarm <linuxarm@huawei.com>,
	"linux-acpi@vger.kernel.org" <linux-acpi@vger.kernel.org>,
	"iommu@lists.linux-foundation.org"
	<iommu@lists.linux-foundation.org>,
	"Wangzhou (B)" <wangzhou1@hisilicon.com>,
	"sudeep.holla@arm.com" <sudeep.holla@arm.com>,
	"bhelgaas@google.com" <bhelgaas@google.com>,
	"robin.murphy@arm.com" <robin.murphy@arm.com>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infrad>
Subject: Re: [PATCH v9 4/4] PCI: hisi: blacklist hip06/hip07 controllers behind SMMUv3
Date: Tue, 10 Oct 2017 11:06:30 +0100	[thread overview]
Message-ID: <20171010100630.GA764@red-moon> (raw)
In-Reply-To: <5FC3163CFD30C246ABAA99954A238FA838421875@FRAEML521-MBX.china.huawei.com>

On Tue, Oct 10, 2017 at 09:42:30AM +0000, Shameerali Kolothum Thodi wrote:

[...]

> > > diff --git a/drivers/pci/dwc/pcie-hisi.c b/drivers/pci/dwc/pcie-hisi.c
> > > index a201791..6800747 100644
> > > --- a/drivers/pci/dwc/pcie-hisi.c
> > > +++ b/drivers/pci/dwc/pcie-hisi.c
> > > @@ -270,6 +270,12 @@ static int hisi_pcie_probe(struct platform_device
> > *pdev)
> > >  	struct resource *reg;
> > >  	int ret;
> > >
> > > +	if ((IS_BUILTIN(CONFIG_ARM_SMMU_V3)) &&
> > > +			of_property_read_bool(dev->of_node, "iommu-
> > map")) {
> > 
> > Does the presence of "iommu-map" tell you this is an SMMUv3?  Could it
> > have a different type of IOMMU?  I can't tell from reading
> > Documentation/devicetree/bindings/pci/pci-iommu.txt.
> 
> Only if the SMMUv3 driver is loaded and iommu-map binding property present,
> the pcie devices will use SMMU translated iova for MSI doorbell addresses.

And the iommu-map property _actually_ points at an OF node with an
SMMUv3 compatible string - the sheer fact that the SMMUv3 driver
is compiled in is not sufficient IIUC.

Lorenzo

> > Why do you care whether CONFIG_ARM_SMMU_V3 is set?  Does MSI work
> > correctly if SMMUv3 is present but not used?
> 
> Yes. MSI will work if no SMMUv3 is used.
> 
> > Is it really necessary to ignore the PCIe controller completely?
> > Could you use the devices below it as long as you disable MSI for them?  I
> > know there are probably devices that require MSI, so maybe it's easier to
> > just ignore everything than to respond to reports of "my device doesn't work
> > because it requires MSI."
> 
> We are blacklisting MSI for PCIe only if the kernel is using DT and is configured
> to use SMMUv3. Otherwise it is fine. And as I said above DT is not officially
> supported on these platforms.
> 
> Thanks,
> Shameer
> 
> 1. [PATCH v6 3/3] iommu/arm-smmu-v3:Enable ACPI based HiSilicon erratum 161010801
> https://www.spinics.net/lists/arm-kernel/msg602873.html
> 2. [PATCH v8 3/5] iommu/of: Add msi address regions reservation helper
> https://www.spinics.net/lists/arm-kernel/msg609431.html
> 
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
To: Shameerali Kolothum Thodi <shameerali.kolothum.thodi@huawei.com>
Cc: Bjorn Helgaas <helgaas@kernel.org>,
	"Guohanjun (Hanjun Guo)" <guohanjun@huawei.com>,
	Gabriele Paoloni <gabriele.paoloni@huawei.com>,
	"marc.zyngier@arm.com" <marc.zyngier@arm.com>,
	"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
	"joro@8bytes.org" <joro@8bytes.org>,
	John Garry <john.garry@huawei.com>,
	"will.deacon@arm.com" <will.deacon@arm.com>,
	Linuxarm <linuxarm@huawei.com>,
	"linux-acpi@vger.kernel.org" <linux-acpi@vger.kernel.org>,
	"iommu@lists.linux-foundation.org"
	<iommu@lists.linux-foundation.org>,
	"Wangzhou (B)" <wangzhou1@hisilicon.com>,
	"sudeep.holla@arm.com" <sudeep.holla@arm.com>,
	"bhelgaas@google.com" <bhelgaas@google.com>,
	"robin.murphy@arm.com" <robin.murphy@arm.com>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"devel@acpica.org" <devel@acpica.org>
Subject: Re: [PATCH v9 4/4] PCI: hisi: blacklist hip06/hip07 controllers behind SMMUv3
Date: Tue, 10 Oct 2017 11:06:30 +0100	[thread overview]
Message-ID: <20171010100630.GA764@red-moon> (raw)
In-Reply-To: <5FC3163CFD30C246ABAA99954A238FA838421875@FRAEML521-MBX.china.huawei.com>

On Tue, Oct 10, 2017 at 09:42:30AM +0000, Shameerali Kolothum Thodi wrote:

[...]

> > > diff --git a/drivers/pci/dwc/pcie-hisi.c b/drivers/pci/dwc/pcie-hisi.c
> > > index a201791..6800747 100644
> > > --- a/drivers/pci/dwc/pcie-hisi.c
> > > +++ b/drivers/pci/dwc/pcie-hisi.c
> > > @@ -270,6 +270,12 @@ static int hisi_pcie_probe(struct platform_device
> > *pdev)
> > >  	struct resource *reg;
> > >  	int ret;
> > >
> > > +	if ((IS_BUILTIN(CONFIG_ARM_SMMU_V3)) &&
> > > +			of_property_read_bool(dev->of_node, "iommu-
> > map")) {
> > 
> > Does the presence of "iommu-map" tell you this is an SMMUv3?  Could it
> > have a different type of IOMMU?  I can't tell from reading
> > Documentation/devicetree/bindings/pci/pci-iommu.txt.
> 
> Only if the SMMUv3 driver is loaded and iommu-map binding property present,
> the pcie devices will use SMMU translated iova for MSI doorbell addresses.

And the iommu-map property _actually_ points at an OF node with an
SMMUv3 compatible string - the sheer fact that the SMMUv3 driver
is compiled in is not sufficient IIUC.

Lorenzo

> > Why do you care whether CONFIG_ARM_SMMU_V3 is set?  Does MSI work
> > correctly if SMMUv3 is present but not used?
> 
> Yes. MSI will work if no SMMUv3 is used.
> 
> > Is it really necessary to ignore the PCIe controller completely?
> > Could you use the devices below it as long as you disable MSI for them?  I
> > know there are probably devices that require MSI, so maybe it's easier to
> > just ignore everything than to respond to reports of "my device doesn't work
> > because it requires MSI."
> 
> We are blacklisting MSI for PCIe only if the kernel is using DT and is configured
> to use SMMUv3. Otherwise it is fine. And as I said above DT is not officially
> supported on these platforms.
> 
> Thanks,
> Shameer
> 
> 1. [PATCH v6 3/3] iommu/arm-smmu-v3:Enable ACPI based HiSilicon erratum 161010801
> https://www.spinics.net/lists/arm-kernel/msg602873.html
> 2. [PATCH v8 3/5] iommu/of: Add msi address regions reservation helper
> https://www.spinics.net/lists/arm-kernel/msg609431.html
> 
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: lorenzo.pieralisi@arm.com (Lorenzo Pieralisi)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v9 4/4] PCI: hisi: blacklist hip06/hip07 controllers behind SMMUv3
Date: Tue, 10 Oct 2017 11:06:30 +0100	[thread overview]
Message-ID: <20171010100630.GA764@red-moon> (raw)
In-Reply-To: <5FC3163CFD30C246ABAA99954A238FA838421875@FRAEML521-MBX.china.huawei.com>

On Tue, Oct 10, 2017 at 09:42:30AM +0000, Shameerali Kolothum Thodi wrote:

[...]

> > > diff --git a/drivers/pci/dwc/pcie-hisi.c b/drivers/pci/dwc/pcie-hisi.c
> > > index a201791..6800747 100644
> > > --- a/drivers/pci/dwc/pcie-hisi.c
> > > +++ b/drivers/pci/dwc/pcie-hisi.c
> > > @@ -270,6 +270,12 @@ static int hisi_pcie_probe(struct platform_device
> > *pdev)
> > >  	struct resource *reg;
> > >  	int ret;
> > >
> > > +	if ((IS_BUILTIN(CONFIG_ARM_SMMU_V3)) &&
> > > +			of_property_read_bool(dev->of_node, "iommu-
> > map")) {
> > 
> > Does the presence of "iommu-map" tell you this is an SMMUv3?  Could it
> > have a different type of IOMMU?  I can't tell from reading
> > Documentation/devicetree/bindings/pci/pci-iommu.txt.
> 
> Only if the SMMUv3 driver is loaded and iommu-map binding property present,
> the pcie devices will use SMMU translated iova for MSI doorbell addresses.

And the iommu-map property _actually_ points at an OF node with an
SMMUv3 compatible string - the sheer fact that the SMMUv3 driver
is compiled in is not sufficient IIUC.

Lorenzo

> > Why do you care whether CONFIG_ARM_SMMU_V3 is set?  Does MSI work
> > correctly if SMMUv3 is present but not used?
> 
> Yes. MSI will work if no SMMUv3 is used.
> 
> > Is it really necessary to ignore the PCIe controller completely?
> > Could you use the devices below it as long as you disable MSI for them?  I
> > know there are probably devices that require MSI, so maybe it's easier to
> > just ignore everything than to respond to reports of "my device doesn't work
> > because it requires MSI."
> 
> We are blacklisting MSI for PCIe only if the kernel is using DT and is configured
> to use SMMUv3. Otherwise it is fine. And as I said above DT is not officially
> supported on these platforms.
> 
> Thanks,
> Shameer
> 
> 1. [PATCH v6 3/3] iommu/arm-smmu-v3:Enable ACPI based HiSilicon erratum 161010801
> https://www.spinics.net/lists/arm-kernel/msg602873.html
> 2. [PATCH v8 3/5] iommu/of: Add msi address regions reservation helper
> https://www.spinics.net/lists/arm-kernel/msg609431.html
> 
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

         reply	other threads:[~2017-10-10 10:06 UTC|newest]

Thread overview: 96+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-10-06 14:04 [Devel] [PATCH v9 0/4] iommu/smmu-v3: Workaround for hisilicon 161010801 erratum(reserve HW MSI) Shameer Kolothum
2017-10-06 14:04 ` Shameer Kolothum
2017-10-06 14:04 ` Shameer Kolothum
2017-10-06 14:04 ` Shameer Kolothum
2017-10-06 14:04 ` [Devel] [PATCH v9 4/4] PCI: hisi: blacklist hip06/hip07 controllers behind SMMUv3 Shameer Kolothum
2017-10-06 14:04   ` Shameer Kolothum
2017-10-06 14:04   ` Shameer Kolothum
2017-10-06 14:04   ` Shameer Kolothum
2017-10-06 14:27   ` Gabriele Paoloni
2017-10-06 14:27     ` Gabriele Paoloni
2017-10-06 14:27     ` Gabriele Paoloni
2017-10-09  8:32   ` Zhou Wang
2017-10-09  8:32     ` Zhou Wang
2017-10-09  8:32     ` Zhou Wang
2017-10-09 23:54   ` Bjorn Helgaas
2017-10-09 23:54     ` Bjorn Helgaas
2017-10-09 23:54     ` Bjorn Helgaas
     [not found]     ` <20171009235452.GP25517-1RhO1Y9PlrlHTL0Zs8A6p5iNqAH0jzoTYJqu5kTmcBRl57MIdRCFDg@public.gmane.org>
2017-10-10  0:15       ` Bjorn Helgaas
2017-10-10  0:15         ` Bjorn Helgaas
2017-10-10  0:15         ` Bjorn Helgaas
2017-10-10  9:42     ` [Devel] " Shameerali Kolothum Thodi
2017-10-10  9:42       ` Shameerali Kolothum Thodi
2017-10-10  9:42       ` Shameerali Kolothum Thodi
2017-10-10  9:42       ` Shameerali Kolothum Thodi
2017-10-10 10:06       ` Lorenzo Pieralisi [this message]
2017-10-10 10:06         ` Lorenzo Pieralisi
2017-10-10 10:06         ` Lorenzo Pieralisi
2017-10-10 10:06         ` Lorenzo Pieralisi
2017-10-10 10:19         ` Gabriele Paoloni
2017-10-10 10:19           ` Gabriele Paoloni
2017-10-10 10:19           ` Gabriele Paoloni
2017-10-10 10:51   ` Bjorn Helgaas
2017-10-10 10:51     ` Bjorn Helgaas
  -- strict thread matches above, loose matches on Subject: below --
2017-10-06 14:04 [Devel] [PATCH v9 1/4] ACPI/IORT: Add msi address regions reservation helper Shameer Kolothum
2017-10-06 14:04 ` Shameer Kolothum
2017-10-06 14:04 ` Shameer Kolothum
2017-10-06 14:04 ` Shameer Kolothum
2017-10-06 14:04 [Devel] [PATCH v9 2/4] iommu/dma: Add a helper function to reserve HW MSI address regions for IOMMU drivers Shameer Kolothum
2017-10-06 14:04 ` Shameer Kolothum
2017-10-06 14:04 ` Shameer Kolothum
2017-10-06 14:04 ` Shameer Kolothum
2017-10-06 14:04 [Devel] [PATCH v9 3/4] iommu/arm-smmu-v3:Enable ACPI based HiSilicon erratum 161010801 Shameer Kolothum
2017-10-06 14:04 ` Shameer Kolothum
2017-10-06 14:04 ` Shameer Kolothum
2017-10-06 14:04 ` Shameer Kolothum
2017-10-11 11:34 [Devel] [PATCH v9 0/4] iommu/smmu-v3: Workaround for hisilicon 161010801 erratum(reserve HW MSI) Shameerali Kolothum Thodi
2017-10-11 11:34 ` Shameerali Kolothum Thodi
2017-10-11 11:34 ` Shameerali Kolothum Thodi
2017-10-11 11:34 ` Shameerali Kolothum Thodi
2017-10-13 19:22 [Devel] [PATCH v9 4/4] PCI: hisi: blacklist hip06/hip07 controllers behind SMMUv3 Will Deacon
2017-10-13 19:22 ` Will Deacon
2017-10-13 19:22 ` Will Deacon
2017-10-13 19:22 ` Will Deacon
2017-10-13 19:23 [Devel] [PATCH v9 2/4] iommu/dma: Add a helper function to reserve HW MSI address regions for IOMMU drivers Will Deacon
2017-10-13 19:23 ` Will Deacon
2017-10-13 19:23 ` Will Deacon
2017-10-13 19:23 ` Will Deacon
2017-10-15  7:46 [Devel] [PATCH v9 4/4] PCI: hisi: blacklist hip06/hip07 controllers behind SMMUv3 Shameerali Kolothum Thodi
2017-10-15  7:46 ` Shameerali Kolothum Thodi
2017-10-15  7:46 ` Shameerali Kolothum Thodi
2017-10-15  7:46 ` Shameerali Kolothum Thodi
2017-10-16 16:09 [Devel] [PATCH v9 2/4] iommu/dma: Add a helper function to reserve HW MSI address regions for IOMMU drivers Shameerali Kolothum Thodi
2017-10-16 16:09 ` Shameerali Kolothum Thodi
2017-10-16 16:09 ` Shameerali Kolothum Thodi
2017-10-16 16:09 ` Shameerali Kolothum Thodi
2017-10-18 10:51 [Devel] [PATCH v9 4/4] PCI: hisi: blacklist hip06/hip07 controllers behind SMMUv3 Will Deacon
2017-10-18 10:51 ` Will Deacon
2017-10-18 10:51 ` Will Deacon
2017-10-18 10:51 ` Will Deacon
2017-10-18 12:25 [Devel] " Shameerali Kolothum Thodi
2017-10-18 12:25 ` Shameerali Kolothum Thodi
2017-10-18 12:25 ` Shameerali Kolothum Thodi
2017-10-18 12:25 ` Shameerali Kolothum Thodi
2017-10-18 12:34 [Devel] [PATCH v9 2/4] iommu/dma: Add a helper function to reserve HW MSI address regions for IOMMU drivers Robin Murphy
2017-10-18 12:34 ` Robin Murphy
2017-10-18 12:34 ` Robin Murphy
2017-10-18 12:34 ` Robin Murphy
2017-10-18 13:45 [Devel] [PATCH v9 4/4] PCI: hisi: blacklist hip06/hip07 controllers behind SMMUv3 Will Deacon
2017-10-18 13:45 ` Will Deacon
2017-10-18 13:45 ` Will Deacon
2017-10-18 13:45 ` Will Deacon
2017-10-18 14:23 [Devel] [PATCH v9 2/4] iommu/dma: Add a helper function to reserve HW MSI address regions for IOMMU drivers Shameerali Kolothum Thodi
2017-10-18 14:23 ` Shameerali Kolothum Thodi
2017-10-18 14:23 ` Shameerali Kolothum Thodi
2017-10-18 14:23 ` Shameerali Kolothum Thodi
2017-10-26 10:11 [Devel] " Shameerali Kolothum Thodi
2017-10-26 10:11 ` Shameerali Kolothum Thodi
2017-10-26 10:11 ` Shameerali Kolothum Thodi
2017-10-26 10:11 ` Shameerali Kolothum Thodi
2017-11-03 11:35 [Devel] " Lorenzo Pieralisi
2017-11-03 11:35 ` Lorenzo Pieralisi
2017-11-03 11:35 ` Lorenzo Pieralisi
2017-11-07  9:37 [Devel] " Shameerali Kolothum Thodi
2017-11-07  9:37 ` Shameerali Kolothum Thodi
2017-11-07  9:37 ` Shameerali Kolothum Thodi
2017-11-07  9:37 ` Shameerali Kolothum Thodi

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20171010100630.GA764@red-moon \
    --to=devel@acpica.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.