diff for duplicates of <20171013175452.1198-2-robh@kernel.org> diff --git a/a/1.txt b/N1/1.txt index c656f47..471a3d4 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -3,7 +3,7 @@ the following command: perl -p -i -e 's/\@0+([0-9a-f])/\@$1/g' `find arch/arm64/boot/dts -type -f -name '*.dts*' -Signed-off-by: Rob Herring <robh@kernel.org> +Signed-off-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> --- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 16 +++--- arch/arm64/boot/dts/apm/apm-shadowcat.dtsi | 6 +- @@ -45,8 +45,8 @@ index 8c8db1b057df..0daad839f92c 100644 #size-cells = <0>; }; -- usb_otg: usb at 01c19000 { -+ usb_otg: usb at 1c19000 { +- usb_otg: usb@01c19000 { ++ usb_otg: usb@1c19000 { compatible = "allwinner,sun8i-a33-musb"; reg = <0x01c19000 0x0400>; clocks = <&ccu CLK_BUS_OTG>; @@ -54,8 +54,8 @@ index 8c8db1b057df..0daad839f92c 100644 status = "disabled"; }; -- usbphy: phy at 01c19400 { -+ usbphy: phy at 1c19400 { +- usbphy: phy@01c19400 { ++ usbphy: phy@1c19400 { compatible = "allwinner,sun50i-a64-usb-phy"; reg = <0x01c19400 0x14>, <0x01c1a800 0x4>, @@ -63,8 +63,8 @@ index 8c8db1b057df..0daad839f92c 100644 #phy-cells = <1>; }; -- ehci0: usb at 01c1a000 { -+ ehci0: usb at 1c1a000 { +- ehci0: usb@01c1a000 { ++ ehci0: usb@1c1a000 { compatible = "allwinner,sun50i-a64-ehci", "generic-ehci"; reg = <0x01c1a000 0x100>; interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; @@ -72,8 +72,8 @@ index 8c8db1b057df..0daad839f92c 100644 status = "disabled"; }; -- ohci0: usb at 01c1a400 { -+ ohci0: usb at 1c1a400 { +- ohci0: usb@01c1a400 { ++ ohci0: usb@1c1a400 { compatible = "allwinner,sun50i-a64-ohci", "generic-ohci"; reg = <0x01c1a400 0x100>; interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; @@ -81,8 +81,8 @@ index 8c8db1b057df..0daad839f92c 100644 status = "disabled"; }; -- ehci1: usb at 01c1b000 { -+ ehci1: usb at 1c1b000 { +- ehci1: usb@01c1b000 { ++ ehci1: usb@1c1b000 { compatible = "allwinner,sun50i-a64-ehci", "generic-ehci"; reg = <0x01c1b000 0x100>; interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; @@ -90,8 +90,8 @@ index 8c8db1b057df..0daad839f92c 100644 status = "disabled"; }; -- ohci1: usb at 01c1b400 { -+ ohci1: usb at 1c1b400 { +- ohci1: usb@01c1b400 { ++ ohci1: usb@1c1b400 { compatible = "allwinner,sun50i-a64-ohci", "generic-ohci"; reg = <0x01c1b400 0x100>; interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; @@ -99,8 +99,8 @@ index 8c8db1b057df..0daad839f92c 100644 status = "disabled"; }; -- ccu: clock at 01c20000 { -+ ccu: clock at 1c20000 { +- ccu: clock@01c20000 { ++ ccu: clock@1c20000 { compatible = "allwinner,sun50i-a64-ccu"; reg = <0x01c20000 0x400>; clocks = <&osc24M>, <&osc32k>; @@ -108,8 +108,8 @@ index 8c8db1b057df..0daad839f92c 100644 #reset-cells = <1>; }; -- r_pio: pinctrl at 01f02c00 { -+ r_pio: pinctrl at 1f02c00 { +- r_pio: pinctrl@01f02c00 { ++ r_pio: pinctrl@1f02c00 { compatible = "allwinner,sun50i-a64-r-pinctrl"; reg = <0x01f02c00 0x400>; interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; @@ -121,8 +121,8 @@ index c9ffffb96e43..d8ecd1661461 100644 #address-cells = <2>; #size-cells = <0>; -- cpu at 000 { -+ cpu at 0 { +- cpu@000 { ++ cpu@0 { device_type = "cpu"; compatible = "apm,strega", "arm,armv8"; reg = <0x0 0x000>; @@ -130,8 +130,8 @@ index c9ffffb96e43..d8ecd1661461 100644 #clock-cells = <1>; clocks = <&pmd0clk 0>; }; -- cpu at 001 { -+ cpu at 1 { +- cpu@001 { ++ cpu@1 { device_type = "cpu"; compatible = "apm,strega", "arm,armv8"; reg = <0x0 0x001>; @@ -139,8 +139,8 @@ index c9ffffb96e43..d8ecd1661461 100644 <0x0 0x780a0000 0x0 0x20000>, /* GIC CPU */ <0x0 0x780c0000 0x0 0x10000>, /* GIC VCPU Control */ <0x0 0x780e0000 0x0 0x20000>; /* GIC VCPU */ -- v2m0: v2m at 00000 { -+ v2m0: v2m at 0 { +- v2m0: v2m@00000 { ++ v2m0: v2m@0 { compatible = "arm,gic-v2m-frame"; msi-controller; reg = <0x0 0x0 0x0 0x1000>; @@ -152,8 +152,8 @@ index c09a36fed917..00e82b8e9a19 100644 #address-cells = <2>; #size-cells = <0>; -- cpu at 000 { -+ cpu at 0 { +- cpu@000 { ++ cpu@0 { device_type = "cpu"; compatible = "apm,potenza", "arm,armv8"; reg = <0x0 0x000>; @@ -161,8 +161,8 @@ index c09a36fed917..00e82b8e9a19 100644 cpu-release-addr = <0x1 0x0000fff8>; next-level-cache = <&xgene_L2_0>; }; -- cpu at 001 { -+ cpu at 1 { +- cpu@001 { ++ cpu@1 { device_type = "cpu"; compatible = "apm,potenza", "arm,armv8"; reg = <0x0 0x001>; @@ -174,8 +174,8 @@ index 8ecdd4331980..21a7a575f02c 100644 timeout-sec = <30>; }; -- smb at 08000000 { -+ smb at 8000000 { +- smb@08000000 { ++ smb@8000000 { compatible = "arm,vexpress,v2m-p1", "simple-bus"; arm,v2m-memory-map = "rs1"; #address-cells = <2>; /* SMB chipselect number and offset */ @@ -183,14 +183,14 @@ index 8ecdd4331980..21a7a575f02c 100644 #size-cells = <1>; ranges = <0 3 0 0x200000>; -- v2m_sysreg: sysreg at 010000 { -+ v2m_sysreg: sysreg at 10000 { +- v2m_sysreg: sysreg@010000 { ++ v2m_sysreg: sysreg@10000 { compatible = "arm,vexpress-sysreg"; reg = <0x010000 0x1000>; }; -- v2m_serial0: uart at 090000 { -+ v2m_serial0: uart at 90000 { +- v2m_serial0: uart@090000 { ++ v2m_serial0: uart@90000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x090000 0x1000>; interrupts = <5>; @@ -198,8 +198,8 @@ index 8ecdd4331980..21a7a575f02c 100644 clock-names = "uartclk", "apb_pclk"; }; -- v2m_serial1: uart at 0a0000 { -+ v2m_serial1: uart at a0000 { +- v2m_serial1: uart@0a0000 { ++ v2m_serial1: uart@a0000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x0a0000 0x1000>; interrupts = <6>; @@ -207,8 +207,8 @@ index 8ecdd4331980..21a7a575f02c 100644 clock-names = "uartclk", "apb_pclk"; }; -- v2m_serial2: uart at 0b0000 { -+ v2m_serial2: uart at b0000 { +- v2m_serial2: uart@0b0000 { ++ v2m_serial2: uart@b0000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x0b0000 0x1000>; interrupts = <7>; @@ -216,8 +216,8 @@ index 8ecdd4331980..21a7a575f02c 100644 clock-names = "uartclk", "apb_pclk"; }; -- v2m_serial3: uart at 0c0000 { -+ v2m_serial3: uart at c0000 { +- v2m_serial3: uart@0c0000 { ++ v2m_serial3: uart@c0000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x0c0000 0x1000>; interrupts = <8>; @@ -225,8 +225,8 @@ index 8ecdd4331980..21a7a575f02c 100644 clock-names = "uartclk", "apb_pclk"; }; -- virtio-block at 0130000 { -+ virtio-block at 130000 { +- virtio-block@0130000 { ++ virtio-block@130000 { compatible = "virtio,mmio"; reg = <0x130000 0x200>; interrupts = <42>; @@ -238,8 +238,8 @@ index a83ed2c6bbf7..a1b73f46b625 100644 <0 63 4>; }; -- smb at 08000000 { -+ smb at 8000000 { +- smb@08000000 { ++ smb@8000000 { compatible = "simple-bus"; #address-cells = <2>; @@ -251,16 +251,16 @@ index 528875c75598..6cadb779729d 100644 #size-cells = <1>; ranges = <0 3 0 0x200000>; -- v2m_sysreg: sysreg at 010000 { -+ v2m_sysreg: sysreg at 10000 { +- v2m_sysreg: sysreg@010000 { ++ v2m_sysreg: sysreg@10000 { compatible = "arm,vexpress-sysreg"; reg = <0x010000 0x1000>; gpio-controller; #gpio-cells = <2>; }; -- v2m_sysctl: sysctl at 020000 { -+ v2m_sysctl: sysctl at 20000 { +- v2m_sysctl: sysctl@020000 { ++ v2m_sysctl: sysctl@20000 { compatible = "arm,sp810", "arm,primecell"; reg = <0x020000 0x1000>; clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&v2m_clk24mhz>; @@ -268,8 +268,8 @@ index 528875c75598..6cadb779729d 100644 assigned-clock-parents = <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>; }; -- aaci at 040000 { -+ aaci at 40000 { +- aaci@040000 { ++ aaci@40000 { compatible = "arm,pl041", "arm,primecell"; reg = <0x040000 0x1000>; interrupts = <11>; @@ -277,8 +277,8 @@ index 528875c75598..6cadb779729d 100644 clock-names = "apb_pclk"; }; -- mmci at 050000 { -+ mmci at 50000 { +- mmci@050000 { ++ mmci@50000 { compatible = "arm,pl180", "arm,primecell"; reg = <0x050000 0x1000>; interrupts = <9 10>; @@ -286,8 +286,8 @@ index 528875c75598..6cadb779729d 100644 clock-names = "mclk", "apb_pclk"; }; -- kmi at 060000 { -+ kmi at 60000 { +- kmi@060000 { ++ kmi@60000 { compatible = "arm,pl050", "arm,primecell"; reg = <0x060000 0x1000>; interrupts = <12>; @@ -295,8 +295,8 @@ index 528875c75598..6cadb779729d 100644 clock-names = "KMIREFCLK", "apb_pclk"; }; -- kmi at 070000 { -+ kmi at 70000 { +- kmi@070000 { ++ kmi@70000 { compatible = "arm,pl050", "arm,primecell"; reg = <0x070000 0x1000>; interrupts = <13>; @@ -304,8 +304,8 @@ index 528875c75598..6cadb779729d 100644 clock-names = "KMIREFCLK", "apb_pclk"; }; -- v2m_serial0: uart at 090000 { -+ v2m_serial0: uart at 90000 { +- v2m_serial0: uart@090000 { ++ v2m_serial0: uart@90000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x090000 0x1000>; interrupts = <5>; @@ -313,8 +313,8 @@ index 528875c75598..6cadb779729d 100644 clock-names = "uartclk", "apb_pclk"; }; -- v2m_serial1: uart at 0a0000 { -+ v2m_serial1: uart at a0000 { +- v2m_serial1: uart@0a0000 { ++ v2m_serial1: uart@a0000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x0a0000 0x1000>; interrupts = <6>; @@ -322,8 +322,8 @@ index 528875c75598..6cadb779729d 100644 clock-names = "uartclk", "apb_pclk"; }; -- v2m_serial2: uart at 0b0000 { -+ v2m_serial2: uart at b0000 { +- v2m_serial2: uart@0b0000 { ++ v2m_serial2: uart@b0000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x0b0000 0x1000>; interrupts = <7>; @@ -331,8 +331,8 @@ index 528875c75598..6cadb779729d 100644 clock-names = "uartclk", "apb_pclk"; }; -- v2m_serial3: uart at 0c0000 { -+ v2m_serial3: uart at c0000 { +- v2m_serial3: uart@0c0000 { ++ v2m_serial3: uart@c0000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x0c0000 0x1000>; interrupts = <8>; @@ -340,8 +340,8 @@ index 528875c75598..6cadb779729d 100644 clock-names = "uartclk", "apb_pclk"; }; -- wdt at 0f0000 { -+ wdt at f0000 { +- wdt@0f0000 { ++ wdt@f0000 { compatible = "arm,sp805", "arm,primecell"; reg = <0x0f0000 0x1000>; interrupts = <0>; @@ -349,8 +349,8 @@ index 528875c75598..6cadb779729d 100644 }; }; -- virtio-block at 0130000 { -+ virtio-block at 130000 { +- virtio-block@0130000 { ++ virtio-block@130000 { compatible = "virtio,mmio"; reg = <0x130000 0x200>; interrupts = <42>; @@ -362,8 +362,8 @@ index e3a171162bb4..124dceeada1f 100644 }; }; -- smb at 08000000 { -+ smb at 8000000 { +- smb@08000000 { ++ smb@8000000 { compatible = "simple-bus"; #address-cells = <2>; @@ -375,8 +375,8 @@ index ab4ae1a32fab..f00c21e0767e 100644 reg = <0x04000000 0x06400000>; /* 100MB */ }; -- partition at 0a400000{ -+ partition at a400000{ +- partition@0a400000{ ++ partition@a400000{ label = "ncustfs"; reg = <0x0a400000 0x35c00000>; /* 860MB */ }; @@ -388,8 +388,8 @@ index 35c8457e3d1f..4a2a6af8e752 100644 next-level-cache = <&CLUSTER0_L2>; }; -- CLUSTER0_L2: l2-cache at 000 { -+ CLUSTER0_L2: l2-cache at 0 { +- CLUSTER0_L2: l2-cache@000 { ++ CLUSTER0_L2: l2-cache@0 { compatible = "cache"; }; }; @@ -397,8 +397,8 @@ index 35c8457e3d1f..4a2a6af8e752 100644 #size-cells = <1>; ranges = <0 0x652e0000 0x80000>; -- v2m0: v2m at 00000 { -+ v2m0: v2m at 0 { +- v2m0: v2m@00000 { ++ v2m0: v2m@0 { compatible = "arm,gic-v2m-frame"; interrupt-parent = <&gic>; msi-controller; @@ -410,8 +410,8 @@ index cbc43376e25e..3a4d4524b5ed 100644 clock-mult = <1>; }; -- genpll0: genpll0 at 0001d104 { -+ genpll0: genpll0 at 1d104 { +- genpll0: genpll0@0001d104 { ++ genpll0: genpll0@1d104 { #clock-cells = <1>; compatible = "brcm,sr-genpll0"; reg = <0x0001d104 0x32>, @@ -419,8 +419,8 @@ index cbc43376e25e..3a4d4524b5ed 100644 "clk_paxc_axi"; }; -- genpll3: genpll3 at 0001d1e0 { -+ genpll3: genpll3 at 1d1e0 { +- genpll3: genpll3@0001d1e0 { ++ genpll3: genpll3@1d1e0 { #clock-cells = <1>; compatible = "brcm,sr-genpll3"; reg = <0x0001d1e0 0x32>, @@ -428,8 +428,8 @@ index cbc43376e25e..3a4d4524b5ed 100644 "clk_sdio"; }; -- genpll4: genpll4 at 0001d214 { -+ genpll4: genpll4 at 1d214 { +- genpll4: genpll4@0001d214 { ++ genpll4: genpll4@1d214 { #clock-cells = <1>; compatible = "brcm,sr-genpll4"; reg = <0x0001d214 0x32>, @@ -437,8 +437,8 @@ index cbc43376e25e..3a4d4524b5ed 100644 "clk_bridge_fscpu"; }; -- genpll5: genpll5 at 0001d248 { -+ genpll5: genpll5 at 1d248 { +- genpll5: genpll5@0001d248 { ++ genpll5: genpll5@1d248 { #clock-cells = <1>; compatible = "brcm,sr-genpll5"; reg = <0x0001d248 0x32>, @@ -446,8 +446,8 @@ index cbc43376e25e..3a4d4524b5ed 100644 "crypto_ae_clk", "raid_ae_clk"; }; -- lcpll0: lcpll0 at 0001d0c4 { -+ lcpll0: lcpll0 at 1d0c4 { +- lcpll0: lcpll0@0001d0c4 { ++ lcpll0: lcpll0@1d0c4 { #clock-cells = <1>; compatible = "brcm,sr-lcpll0"; reg = <0x0001d0c4 0x3c>, @@ -455,8 +455,8 @@ index cbc43376e25e..3a4d4524b5ed 100644 "clk_sata_500"; }; -- lcpll1: lcpll1 at 0001d138 { -+ lcpll1: lcpll1 at 1d138 { +- lcpll1: lcpll1@0001d138 { ++ lcpll1: lcpll1@1d138 { #clock-cells = <1>; compatible = "brcm,sr-lcpll1"; reg = <0x0001d138 0x3c>, @@ -468,8 +468,8 @@ index 8bf1dc6b46ca..9666969c8c88 100644 #size-cells = <1>; ranges = <0x0 0x0 0x67000000 0x00800000>; -- crypto_mbox: crypto_mbox at 00000000 { -+ crypto_mbox: crypto_mbox at 0 { +- crypto_mbox: crypto_mbox@00000000 { ++ crypto_mbox: crypto_mbox@0 { compatible = "brcm,iproc-flexrm-mbox"; reg = <0x00000000 0x200000>; msi-parent = <&gic_its 0x4100>; @@ -477,8 +477,8 @@ index 8bf1dc6b46ca..9666969c8c88 100644 dma-coherent; }; -- raid_mbox: raid_mbox at 00400000 { -+ raid_mbox: raid_mbox at 400000 { +- raid_mbox: raid_mbox@00400000 { ++ raid_mbox: raid_mbox@400000 { compatible = "brcm,iproc-flexrm-mbox"; reg = <0x00400000 0x200000>; dma-coherent; @@ -490,8 +490,8 @@ index 15214d05fec1..8a3a770e8f2c 100644 #include <dt-bindings/pinctrl/brcm,pinctrl-stingray.h> -- pinconf: pinconf at 00140000 { -+ pinconf: pinconf at 140000 { +- pinconf: pinconf@00140000 { ++ pinconf: pinconf@140000 { compatible = "pinconf-single"; reg = <0x00140000 0x250>; pinctrl-single,register-width = <32>; @@ -499,8 +499,8 @@ index 15214d05fec1..8a3a770e8f2c 100644 /* pinconf functions */ }; -- pinmux: pinmux at 0014029c { -+ pinmux: pinmux at 14029c { +- pinmux: pinmux@0014029c { ++ pinmux: pinmux@14029c { compatible = "pinctrl-single"; reg = <0x0014029c 0x250>; #address-cells = <1>; @@ -512,8 +512,8 @@ index a774709388df..4b5465da81d8 100644 #size-cells = <1>; ranges = <0x0 0x0 0x67d00000 0x00800000>; -- sata0: ahci at 00210000 { -+ sata0: ahci at 210000 { +- sata0: ahci@00210000 { ++ sata0: ahci@210000 { compatible = "brcm,iproc-ahci", "generic-ahci"; reg = <0x00210000 0x1000>; reg-names = "ahci"; @@ -521,8 +521,8 @@ index a774709388df..4b5465da81d8 100644 }; }; -- sata_phy0: sata_phy at 00212100 { -+ sata_phy0: sata_phy at 212100 { +- sata_phy0: sata_phy@00212100 { ++ sata_phy0: sata_phy@212100 { compatible = "brcm,iproc-sr-sata-phy"; reg = <0x00212100 0x1000>; reg-names = "phy"; @@ -530,8 +530,8 @@ index a774709388df..4b5465da81d8 100644 }; }; -- sata1: ahci at 00310000 { -+ sata1: ahci at 310000 { +- sata1: ahci@00310000 { ++ sata1: ahci@310000 { compatible = "brcm,iproc-ahci", "generic-ahci"; reg = <0x00310000 0x1000>; reg-names = "ahci"; @@ -539,8 +539,8 @@ index a774709388df..4b5465da81d8 100644 }; }; -- sata_phy1: sata_phy at 00312100 { -+ sata_phy1: sata_phy at 312100 { +- sata_phy1: sata_phy@00312100 { ++ sata_phy1: sata_phy@312100 { compatible = "brcm,iproc-sr-sata-phy"; reg = <0x00312100 0x1000>; reg-names = "phy"; @@ -548,8 +548,8 @@ index a774709388df..4b5465da81d8 100644 }; }; -- sata2: ahci at 00120000 { -+ sata2: ahci at 120000 { +- sata2: ahci@00120000 { ++ sata2: ahci@120000 { compatible = "brcm,iproc-ahci", "generic-ahci"; reg = <0x00120000 0x1000>; reg-names = "ahci"; @@ -557,8 +557,8 @@ index a774709388df..4b5465da81d8 100644 }; }; -- sata_phy2: sata_phy at 00122100 { -+ sata_phy2: sata_phy at 122100 { +- sata_phy2: sata_phy@00122100 { ++ sata_phy2: sata_phy@122100 { compatible = "brcm,iproc-sr-sata-phy"; reg = <0x00122100 0x1000>; reg-names = "phy"; @@ -566,8 +566,8 @@ index a774709388df..4b5465da81d8 100644 }; }; -- sata3: ahci at 00130000 { -+ sata3: ahci at 130000 { +- sata3: ahci@00130000 { ++ sata3: ahci@130000 { compatible = "brcm,iproc-ahci", "generic-ahci"; reg = <0x00130000 0x1000>; reg-names = "ahci"; @@ -575,8 +575,8 @@ index a774709388df..4b5465da81d8 100644 }; }; -- sata_phy3: sata_phy at 00132100 { -+ sata_phy3: sata_phy at 132100 { +- sata_phy3: sata_phy@00132100 { ++ sata_phy3: sata_phy@132100 { compatible = "brcm,iproc-sr-sata-phy"; reg = <0x00132100 0x1000>; reg-names = "phy"; @@ -584,8 +584,8 @@ index a774709388df..4b5465da81d8 100644 }; }; -- sata4: ahci at 00330000 { -+ sata4: ahci at 330000 { +- sata4: ahci@00330000 { ++ sata4: ahci@330000 { compatible = "brcm,iproc-ahci", "generic-ahci"; reg = <0x00330000 0x1000>; reg-names = "ahci"; @@ -593,8 +593,8 @@ index a774709388df..4b5465da81d8 100644 }; }; -- sata_phy4: sata_phy at 00332100 { -+ sata_phy4: sata_phy at 332100 { +- sata_phy4: sata_phy@00332100 { ++ sata_phy4: sata_phy@332100 { compatible = "brcm,iproc-sr-sata-phy"; reg = <0x00332100 0x1000>; reg-names = "phy"; @@ -602,8 +602,8 @@ index a774709388df..4b5465da81d8 100644 }; }; -- sata5: ahci at 00400000 { -+ sata5: ahci at 400000 { +- sata5: ahci@00400000 { ++ sata5: ahci@400000 { compatible = "brcm,iproc-ahci", "generic-ahci"; reg = <0x00400000 0x1000>; reg-names = "ahci"; @@ -611,8 +611,8 @@ index a774709388df..4b5465da81d8 100644 }; }; -- sata_phy5: sata_phy at 00402100 { -+ sata_phy5: sata_phy at 402100 { +- sata_phy5: sata_phy@00402100 { ++ sata_phy5: sata_phy@402100 { compatible = "brcm,iproc-sr-sata-phy"; reg = <0x00402100 0x1000>; reg-names = "phy"; @@ -620,8 +620,8 @@ index a774709388df..4b5465da81d8 100644 }; }; -- sata6: ahci at 00410000 { -+ sata6: ahci at 410000 { +- sata6: ahci@00410000 { ++ sata6: ahci@410000 { compatible = "brcm,iproc-ahci", "generic-ahci"; reg = <0x00410000 0x1000>; reg-names = "ahci"; @@ -629,8 +629,8 @@ index a774709388df..4b5465da81d8 100644 }; }; -- sata_phy6: sata_phy at 00412100 { -+ sata_phy6: sata_phy at 412100 { +- sata_phy6: sata_phy@00412100 { ++ sata_phy6: sata_phy@412100 { compatible = "brcm,iproc-sr-sata-phy"; reg = <0x00412100 0x1000>; reg-names = "phy"; @@ -638,8 +638,8 @@ index a774709388df..4b5465da81d8 100644 }; }; -- sata7: ahci at 00420000 { -+ sata7: ahci at 420000 { +- sata7: ahci@00420000 { ++ sata7: ahci@420000 { compatible = "brcm,iproc-ahci", "generic-ahci"; reg = <0x00420000 0x1000>; reg-names = "ahci"; @@ -647,8 +647,8 @@ index a774709388df..4b5465da81d8 100644 }; }; -- sata_phy7: sata_phy at 00422100 { -+ sata_phy7: sata_phy at 422100 { +- sata_phy7: sata_phy@00422100 { ++ sata_phy7: sata_phy@422100 { compatible = "brcm,iproc-sr-sata-phy"; reg = <0x00422100 0x1000>; reg-names = "phy"; @@ -660,8 +660,8 @@ index e6f75c633623..99aaff0b6d72 100644 #address-cells = <2>; #size-cells = <0>; -- cpu at 000 { -+ cpu at 0 { +- cpu@000 { ++ cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a72", "arm,armv8"; reg = <0x0 0x0>; @@ -669,8 +669,8 @@ index e6f75c633623..99aaff0b6d72 100644 next-level-cache = <&CLUSTER0_L2>; }; -- cpu at 001 { -+ cpu at 1 { +- cpu@001 { ++ cpu@1 { device_type = "cpu"; compatible = "arm,cortex-a72", "arm,armv8"; reg = <0x0 0x1>; @@ -678,8 +678,8 @@ index e6f75c633623..99aaff0b6d72 100644 next-level-cache = <&CLUSTER3_L2>; }; -- CLUSTER0_L2: l2-cache at 000 { -+ CLUSTER0_L2: l2-cache at 0 { +- CLUSTER0_L2: l2-cache@000 { ++ CLUSTER0_L2: l2-cache@0 { compatible = "cache"; }; @@ -687,15 +687,15 @@ index e6f75c633623..99aaff0b6d72 100644 #size-cells = <1>; ranges = <0x0 0x0 0x61000000 0x05000000>; -- ccn: ccn at 00000000 { -+ ccn: ccn at 0 { +- ccn: ccn@00000000 { ++ ccn: ccn@0 { compatible = "arm,ccn-502"; reg = <0x00000000 0x900000>; interrupts = <GIC_SPI 799 IRQ_TYPE_LEVEL_HIGH>; }; -- gic: interrupt-controller at 02c00000 { -+ gic: interrupt-controller at 2c00000 { +- gic: interrupt-controller@02c00000 { ++ gic: interrupt-controller@2c00000 { compatible = "arm,gic-v3"; #interrupt-cells = <3>; #address-cells = <1>; @@ -703,8 +703,8 @@ index e6f75c633623..99aaff0b6d72 100644 }; }; -- smmu: mmu at 03000000 { -+ smmu: mmu at 3000000 { +- smmu: mmu@03000000 { ++ smmu: mmu@3000000 { compatible = "arm,mmu-500"; reg = <0x03000000 0x80000>; #global-interrupts = <1>; @@ -712,8 +712,8 @@ index e6f75c633623..99aaff0b6d72 100644 #include "stingray-clock.dtsi" -- gpio_crmu: gpio at 00024800 { -+ gpio_crmu: gpio at 24800 { +- gpio_crmu: gpio@00024800 { ++ gpio_crmu: gpio@24800 { compatible = "brcm,iproc-gpio"; reg = <0x00024800 0x4c>; ngpios = <6>; @@ -721,8 +721,8 @@ index e6f75c633623..99aaff0b6d72 100644 #include "stingray-pinctrl.dtsi" -- mdio_mux_iproc: mdio-mux at 0002023c { -+ mdio_mux_iproc: mdio-mux at 2023c { +- mdio_mux_iproc: mdio-mux@0002023c { ++ mdio_mux_iproc: mdio-mux@2023c { compatible = "brcm,mdio-mux-iproc"; reg = <0x0002023c 0x14>; #address-cells = <1>; @@ -730,8 +730,8 @@ index e6f75c633623..99aaff0b6d72 100644 }; }; -- pwm: pwm at 00010000 { -+ pwm: pwm at 10000 { +- pwm: pwm@00010000 { ++ pwm: pwm@10000 { compatible = "brcm,iproc-pwm"; reg = <0x00010000 0x1000>; clocks = <&crmu_ref25m>; @@ -739,8 +739,8 @@ index e6f75c633623..99aaff0b6d72 100644 status = "disabled"; }; -- timer0: timer at 00030000 { -+ timer0: timer at 30000 { +- timer0: timer@00030000 { ++ timer0: timer@30000 { compatible = "arm,sp804", "arm,primecell"; reg = <0x00030000 0x1000>; interrupts = <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>; @@ -748,8 +748,8 @@ index e6f75c633623..99aaff0b6d72 100644 status = "disabled"; }; -- timer1: timer at 00040000 { -+ timer1: timer at 40000 { +- timer1: timer@00040000 { ++ timer1: timer@40000 { compatible = "arm,sp804", "arm,primecell"; reg = <0x00040000 0x1000>; interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>; @@ -757,8 +757,8 @@ index e6f75c633623..99aaff0b6d72 100644 clock-names = "timer1", "timer2", "apb_pclk"; }; -- timer2: timer at 00050000 { -+ timer2: timer at 50000 { +- timer2: timer@00050000 { ++ timer2: timer@50000 { compatible = "arm,sp804", "arm,primecell"; reg = <0x00050000 0x1000>; interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>; @@ -766,8 +766,8 @@ index e6f75c633623..99aaff0b6d72 100644 status = "disabled"; }; -- timer3: timer at 00060000 { -+ timer3: timer at 60000 { +- timer3: timer@00060000 { ++ timer3: timer@60000 { compatible = "arm,sp804", "arm,primecell"; reg = <0x00060000 0x1000>; interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>; @@ -775,8 +775,8 @@ index e6f75c633623..99aaff0b6d72 100644 status = "disabled"; }; -- timer4: timer at 00070000 { -+ timer4: timer at 70000 { +- timer4: timer@00070000 { ++ timer4: timer@70000 { compatible = "arm,sp804", "arm,primecell"; reg = <0x00070000 0x1000>; interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>; @@ -784,8 +784,8 @@ index e6f75c633623..99aaff0b6d72 100644 status = "disabled"; }; -- timer5: timer at 00080000 { -+ timer5: timer at 80000 { +- timer5: timer@00080000 { ++ timer5: timer@80000 { compatible = "arm,sp804", "arm,primecell"; reg = <0x00080000 0x1000>; interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; @@ -793,8 +793,8 @@ index e6f75c633623..99aaff0b6d72 100644 status = "disabled"; }; -- timer6: timer at 00090000 { -+ timer6: timer at 90000 { +- timer6: timer@00090000 { ++ timer6: timer@90000 { compatible = "arm,sp804", "arm,primecell"; reg = <0x00090000 0x1000>; interrupts = <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>; @@ -802,8 +802,8 @@ index e6f75c633623..99aaff0b6d72 100644 status = "disabled"; }; -- timer7: timer at 000a0000 { -+ timer7: timer at a0000 { +- timer7: timer@000a0000 { ++ timer7: timer@a0000 { compatible = "arm,sp804", "arm,primecell"; reg = <0x000a0000 0x1000>; interrupts = <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>; @@ -811,8 +811,8 @@ index e6f75c633623..99aaff0b6d72 100644 status = "disabled"; }; -- i2c0: i2c at 000b0000 { -+ i2c0: i2c at b0000 { +- i2c0: i2c@000b0000 { ++ i2c0: i2c@b0000 { compatible = "brcm,iproc-i2c"; reg = <0x000b0000 0x100>; #address-cells = <1>; @@ -820,8 +820,8 @@ index e6f75c633623..99aaff0b6d72 100644 status = "disabled"; }; -- wdt0: watchdog at 000c0000 { -+ wdt0: watchdog at c0000 { +- wdt0: watchdog@000c0000 { ++ wdt0: watchdog@c0000 { compatible = "arm,sp805", "arm,primecell"; reg = <0x000c0000 0x1000>; interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; @@ -829,8 +829,8 @@ index e6f75c633623..99aaff0b6d72 100644 clock-names = "wdogclk", "apb_pclk"; }; -- gpio_hsls: gpio at 000d0000 { -+ gpio_hsls: gpio at d0000 { +- gpio_hsls: gpio@000d0000 { ++ gpio_hsls: gpio@d0000 { compatible = "brcm,iproc-gpio"; reg = <0x000d0000 0x864>; ngpios = <151>; @@ -838,8 +838,8 @@ index e6f75c633623..99aaff0b6d72 100644 <&pinmux 151 91 4>; }; -- i2c1: i2c at 000e0000 { -+ i2c1: i2c at e0000 { +- i2c1: i2c@000e0000 { ++ i2c1: i2c@e0000 { compatible = "brcm,iproc-i2c"; reg = <0x000e0000 0x100>; #address-cells = <1>; @@ -847,8 +847,8 @@ index e6f75c633623..99aaff0b6d72 100644 status = "disabled"; }; -- uart0: uart at 00100000 { -+ uart0: uart at 100000 { +- uart0: uart@00100000 { ++ uart0: uart@100000 { device_type = "serial"; compatible = "snps,dw-apb-uart"; reg = <0x00100000 0x1000>; @@ -856,8 +856,8 @@ index e6f75c633623..99aaff0b6d72 100644 status = "disabled"; }; -- uart1: uart at 00110000 { -+ uart1: uart at 110000 { +- uart1: uart@00110000 { ++ uart1: uart@110000 { device_type = "serial"; compatible = "snps,dw-apb-uart"; reg = <0x00110000 0x1000>; @@ -865,8 +865,8 @@ index e6f75c633623..99aaff0b6d72 100644 status = "disabled"; }; -- uart2: uart at 00120000 { -+ uart2: uart at 120000 { +- uart2: uart@00120000 { ++ uart2: uart@120000 { device_type = "serial"; compatible = "snps,dw-apb-uart"; reg = <0x00120000 0x1000>; @@ -874,8 +874,8 @@ index e6f75c633623..99aaff0b6d72 100644 status = "disabled"; }; -- uart3: uart at 00130000 { -+ uart3: uart at 130000 { +- uart3: uart@00130000 { ++ uart3: uart@130000 { device_type = "serial"; compatible = "snps,dw-apb-uart"; reg = <0x00130000 0x1000>; @@ -883,8 +883,8 @@ index e6f75c633623..99aaff0b6d72 100644 status = "disabled"; }; -- ssp0: ssp at 00180000 { -+ ssp0: ssp at 180000 { +- ssp0: ssp@00180000 { ++ ssp0: ssp@180000 { compatible = "arm,pl022", "arm,primecell"; reg = <0x00180000 0x1000>; interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; @@ -892,8 +892,8 @@ index e6f75c633623..99aaff0b6d72 100644 status = "disabled"; }; -- ssp1: ssp at 00190000 { -+ ssp1: ssp at 190000 { +- ssp1: ssp@00190000 { ++ ssp1: ssp@190000 { compatible = "arm,pl022", "arm,primecell"; reg = <0x00190000 0x1000>; interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; @@ -901,14 +901,14 @@ index e6f75c633623..99aaff0b6d72 100644 status = "disabled"; }; -- hwrng: hwrng at 00220000 { -+ hwrng: hwrng at 220000 { +- hwrng: hwrng@00220000 { ++ hwrng: hwrng@220000 { compatible = "brcm,iproc-rng200"; reg = <0x00220000 0x28>; }; -- dma0: dma at 00310000 { -+ dma0: dma at 310000 { +- dma0: dma@00310000 { ++ dma0: dma@310000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x00310000 0x1000>; interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>, @@ -916,8 +916,8 @@ index e6f75c633623..99aaff0b6d72 100644 iommus = <&smmu 0x6000 0x0000>; }; -- enet: ethernet at 00340000{ -+ enet: ethernet at 340000{ +- enet: ethernet@00340000{ ++ enet: ethernet@340000{ compatible = "brcm,amac"; reg = <0x00340000 0x1000>; reg-names = "amac_base"; @@ -925,8 +925,8 @@ index e6f75c633623..99aaff0b6d72 100644 status= "disabled"; }; -- nand: nand at 00360000 { -+ nand: nand at 360000 { +- nand: nand@00360000 { ++ nand: nand@360000 { compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1"; reg = <0x00360000 0x600>, <0x0050a408 0x600>, @@ -934,8 +934,8 @@ index e6f75c633623..99aaff0b6d72 100644 status = "disabled"; }; -- sdio0: sdhci at 003f1000 { -+ sdio0: sdhci at 3f1000 { +- sdio0: sdhci@003f1000 { ++ sdio0: sdhci@3f1000 { compatible = "brcm,sdhci-iproc"; reg = <0x003f1000 0x100>; interrupts = <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>; @@ -943,8 +943,8 @@ index e6f75c633623..99aaff0b6d72 100644 status = "disabled"; }; -- sdio1: sdhci at 003f2000 { -+ sdio1: sdhci at 3f2000 { +- sdio1: sdhci@003f2000 { ++ sdio1: sdhci@3f2000 { compatible = "brcm,sdhci-iproc"; reg = <0x003f2000 0x100>; interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>; @@ -956,8 +956,8 @@ index 800ba65991f7..5ec2bfa5f714 100644 serial1 = &uaa1; }; -- memory at 00000000 { -+ memory at 0 { +- memory@00000000 { ++ memory@0 { device_type = "memory"; reg = <0x0 0x00000000 0x0 0x80000000>; }; @@ -969,113 +969,113 @@ index 04dc8a8d1539..1a9103b269cb 100644 #address-cells = <2>; #size-cells = <0>; -- cpu at 000 { -+ cpu at 0 { +- cpu@000 { ++ cpu@0 { device_type = "cpu"; compatible = "cavium,thunder", "arm,armv8"; reg = <0x0 0x000>; enable-method = "psci"; }; -- cpu at 001 { -+ cpu at 1 { +- cpu@001 { ++ cpu@1 { device_type = "cpu"; compatible = "cavium,thunder", "arm,armv8"; reg = <0x0 0x001>; enable-method = "psci"; }; -- cpu at 002 { -+ cpu at 2 { +- cpu@002 { ++ cpu@2 { device_type = "cpu"; compatible = "cavium,thunder", "arm,armv8"; reg = <0x0 0x002>; enable-method = "psci"; }; -- cpu at 003 { -+ cpu at 3 { +- cpu@003 { ++ cpu@3 { device_type = "cpu"; compatible = "cavium,thunder", "arm,armv8"; reg = <0x0 0x003>; enable-method = "psci"; }; -- cpu at 004 { -+ cpu at 4 { +- cpu@004 { ++ cpu@4 { device_type = "cpu"; compatible = "cavium,thunder", "arm,armv8"; reg = <0x0 0x004>; enable-method = "psci"; }; -- cpu at 005 { -+ cpu at 5 { +- cpu@005 { ++ cpu@5 { device_type = "cpu"; compatible = "cavium,thunder", "arm,armv8"; reg = <0x0 0x005>; enable-method = "psci"; }; -- cpu at 006 { -+ cpu at 6 { +- cpu@006 { ++ cpu@6 { device_type = "cpu"; compatible = "cavium,thunder", "arm,armv8"; reg = <0x0 0x006>; enable-method = "psci"; }; -- cpu at 007 { -+ cpu at 7 { +- cpu@007 { ++ cpu@7 { device_type = "cpu"; compatible = "cavium,thunder", "arm,armv8"; reg = <0x0 0x007>; enable-method = "psci"; }; -- cpu at 008 { -+ cpu at 8 { +- cpu@008 { ++ cpu@8 { device_type = "cpu"; compatible = "cavium,thunder", "arm,armv8"; reg = <0x0 0x008>; enable-method = "psci"; }; -- cpu at 009 { -+ cpu at 9 { +- cpu@009 { ++ cpu@9 { device_type = "cpu"; compatible = "cavium,thunder", "arm,armv8"; reg = <0x0 0x009>; enable-method = "psci"; }; -- cpu at 00a { -+ cpu at a { +- cpu@00a { ++ cpu@a { device_type = "cpu"; compatible = "cavium,thunder", "arm,armv8"; reg = <0x0 0x00a>; enable-method = "psci"; }; -- cpu at 00b { -+ cpu at b { +- cpu@00b { ++ cpu@b { device_type = "cpu"; compatible = "cavium,thunder", "arm,armv8"; reg = <0x0 0x00b>; enable-method = "psci"; }; -- cpu at 00c { -+ cpu at c { +- cpu@00c { ++ cpu@c { device_type = "cpu"; compatible = "cavium,thunder", "arm,armv8"; reg = <0x0 0x00c>; enable-method = "psci"; }; -- cpu at 00d { -+ cpu at d { +- cpu@00d { ++ cpu@d { device_type = "cpu"; compatible = "cavium,thunder", "arm,armv8"; reg = <0x0 0x00d>; enable-method = "psci"; }; -- cpu at 00e { -+ cpu at e { +- cpu@00e { ++ cpu@e { device_type = "cpu"; compatible = "cavium,thunder", "arm,armv8"; reg = <0x0 0x00e>; enable-method = "psci"; }; -- cpu at 00f { -+ cpu at f { +- cpu@00f { ++ cpu@f { device_type = "cpu"; compatible = "cavium,thunder", "arm,armv8"; reg = <0x0 0x00f>; @@ -1087,8 +1087,8 @@ index abba750b87f8..3bbd017f088f 100644 model = "Hisilicon Hip05 D02 Development Board"; compatible = "hisilicon,hip05-d02"; -- memory at 00000000 { -+ memory at 0 { +- memory@00000000 { ++ memory@0 { device_type = "memory"; reg = <0x0 0x00000000 0x0 0x80000000>; }; @@ -1100,8 +1100,8 @@ index 7c4114a67753..9af633021a42 100644 model = "Hisilicon Hip06 D03 Development Board"; compatible = "hisilicon,hip06-d03"; -- memory at 00000000 { -+ memory at 0 { +- memory@00000000 { ++ memory@0 { device_type = "memory"; reg = <0x0 0x00000000 0x0 0x40000000>; }; @@ -1113,8 +1113,8 @@ index 9c3bdf87e543..8f79e8dae102 100644 stdout-path = "serial0:115200n8"; }; -- memory at 00000000 { -+ memory at 0 { +- memory@00000000 { ++ memory@0 { device_type = "memory"; reg = <0x0 0x0 0x0 0x80000000>; }; @@ -1126,8 +1126,8 @@ index 0d7b2ae46610..46ec003eabb0 100644 stdout-path = "serial0:115200n8"; }; -- memory at 00000000 { -+ memory at 0 { +- memory@00000000 { ++ memory@0 { device_type = "memory"; reg = <0x0 0x0 0x0 0x80000000>; }; @@ -1139,8 +1139,8 @@ index acf5c7d16d79..4fbb13d41451 100644 stdout-path = "serial0:115200n8"; }; -- memory at 00000000 { -+ memory at 0 { +- memory@00000000 { ++ memory@0 { device_type = "memory"; reg = <0x0 0x0 0x0 0x80000000>; }; @@ -1152,8 +1152,8 @@ index 707af833832b..85b58a19a9fb 100644 stdout-path = "serial0:115200n8"; }; -- memory at 00000000 { -+ memory at 0 { +- memory@00000000 { ++ memory@0 { device_type = "memory"; reg = <0x0 0x0 0x0 0x80000000>; }; @@ -1165,15 +1165,15 @@ index 95a1ff60f6c1..b98ea137371d 100644 #address-cells = <1>; #size-cells = <0>; -- cpu at 000 { -+ cpu at 0 { +- cpu@000 { ++ cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a72", "arm,armv8"; reg = <0x000>; enable-method = "psci"; }; -- cpu at 001 { -+ cpu at 1 { +- cpu@001 { ++ cpu@1 { device_type = "cpu"; compatible = "arm,cortex-a72", "arm,armv8"; reg = <0x001>; @@ -1185,15 +1185,15 @@ index ba43a4357b89..116164ff260f 100644 #address-cells = <1>; #size-cells = <0>; -- cpu at 000 { -+ cpu at 0 { +- cpu@000 { ++ cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a72", "arm,armv8"; reg = <0x000>; enable-method = "psci"; }; -- cpu at 001 { -+ cpu at 1 { +- cpu@001 { ++ cpu@1 { device_type = "cpu"; compatible = "arm,cortex-a72", "arm,armv8"; reg = <0x001>; @@ -1205,15 +1205,15 @@ index bf1b22b70384..7f0661e12f5e 100644 #size-cells = <0>; compatible = "marvell,armada-ap810-octa"; -- cpu at 000 { -+ cpu at 0 { +- cpu@000 { ++ cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a72", "arm,armv8"; reg = <0x000>; enable-method = "psci"; }; -- cpu at 001 { -+ cpu at 1 { +- cpu@001 { ++ cpu@1 { device_type = "cpu"; compatible = "arm,cortex-a72", "arm,armv8"; reg = <0x001>; @@ -1225,8 +1225,8 @@ index d6b800fd26d0..d2f88b92d8e2 100644 ranges = <0 0xe80000 0x10000>; interrupt-parent = <&aic>; -- gpio0: gpio at 0400 { -+ gpio0: gpio at 400 { +- gpio0: gpio@0400 { ++ gpio0: gpio@400 { compatible = "snps,dw-apb-gpio"; reg = <0x0400 0x400>; #address-cells = <1>; @@ -1234,8 +1234,8 @@ index d6b800fd26d0..d2f88b92d8e2 100644 }; }; -- gpio1: gpio at 0800 { -+ gpio1: gpio at 800 { +- gpio1: gpio@0800 { ++ gpio1: gpio@800 { compatible = "snps,dw-apb-gpio"; reg = <0x0800 0x400>; #address-cells = <1>; @@ -1243,8 +1243,8 @@ index d6b800fd26d0..d2f88b92d8e2 100644 }; }; -- gpio2: gpio at 0c00 { -+ gpio2: gpio at c00 { +- gpio2: gpio@0c00 { ++ gpio2: gpio@c00 { compatible = "snps,dw-apb-gpio"; reg = <0x0c00 0x400>; #address-cells = <1>; @@ -1256,8 +1256,8 @@ index 1d63e6b879de..d294b3de3125 100644 }; }; -- sdhci at 07824000 { -+ sdhci at 7824000 { +- sdhci@07824000 { ++ sdhci@7824000 { vmmc-supply = <&pm8916_l8>; vqmmc-supply = <&pm8916_l5>; @@ -1265,8 +1265,8 @@ index 1d63e6b879de..d294b3de3125 100644 status = "okay"; }; -- sdhci at 07864000 { -+ sdhci at 7864000 { +- sdhci@07864000 { ++ sdhci@7864000 { vmmc-supply = <&pm8916_l11>; vqmmc-supply = <&pm8916_l12>; @@ -1274,8 +1274,8 @@ index 1d63e6b879de..d294b3de3125 100644 }; }; -- lpass at 07708000 { -+ lpass at 7708000 { +- lpass@07708000 { ++ lpass@7708000 { status = "okay"; }; @@ -1287,36 +1287,36 @@ index 789f3e87321e..b8dbb203b664 100644 pinctrl-1 = <&blsp2_uart2_4pins_sleep>; }; -- i2c at 07577000 { -+ i2c at 7577000 { +- i2c@07577000 { ++ i2c@7577000 { /* On Low speed expansion */ label = "LS-I2C0"; status = "okay"; }; -- i2c at 075b6000 { -+ i2c at 75b6000 { +- i2c@075b6000 { ++ i2c@75b6000 { /* On Low speed expansion */ label = "LS-I2C1"; status = "okay"; }; -- spi at 07575000 { -+ spi at 7575000 { +- spi@07575000 { ++ spi@7575000 { /* On Low speed expansion */ label = "LS-SPI0"; status = "okay"; }; -- i2c at 075b5000 { -+ i2c at 75b5000 { +- i2c@075b5000 { ++ i2c@75b5000 { /* On High speed expansion */ label = "HS-I2C2"; status = "okay"; }; -- spi at 075ba000{ -+ spi at 75ba000{ +- spi@075ba000{ ++ spi@75ba000{ /* On High speed expansion */ label = "HS-SPI1"; status = "okay"; @@ -1328,8 +1328,8 @@ index dc3817593e14..2c4159480be2 100644 status = "disabled"; }; -- lpass: lpass at 07708000 { -+ lpass: lpass at 7708000 { +- lpass: lpass@07708000 { ++ lpass: lpass@7708000 { status = "disabled"; compatible = "qcom,lpass-cpu-apq8016"; clocks = <&gcc GCC_ULTAUDIO_AHBFABRIC_IXFABRIC_CLK>, @@ -1337,8 +1337,8 @@ index dc3817593e14..2c4159480be2 100644 #sound-dai-cells = <1>; }; -- sdhc_1: sdhci at 07824000 { -+ sdhc_1: sdhci at 7824000 { +- sdhc_1: sdhci@07824000 { ++ sdhc_1: sdhci@7824000 { compatible = "qcom,sdhci-msm-v4"; reg = <0x07824900 0x11c>, <0x07824000 0x800>; reg-names = "hc_mem", "core_mem"; @@ -1346,8 +1346,8 @@ index dc3817593e14..2c4159480be2 100644 status = "disabled"; }; -- sdhc_2: sdhci at 07864000 { -+ sdhc_2: sdhci at 7864000 { +- sdhc_2: sdhci@07864000 { ++ sdhc_2: sdhci@7864000 { compatible = "qcom,sdhci-msm-v4"; reg = <0x07864900 0x11c>, <0x07864000 0x800>; reg-names = "hc_mem", "core_mem"; @@ -1359,8 +1359,8 @@ index 887b61c872dd..b138414c248a 100644 #clock-cells = <1>; }; -- blsp1_spi0: spi at 07575000 { -+ blsp1_spi0: spi at 7575000 { +- blsp1_spi0: spi@07575000 { ++ blsp1_spi0: spi@7575000 { compatible = "qcom,spi-qup-v2.2.1"; reg = <0x07575000 0x600>; interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>; @@ -1368,8 +1368,8 @@ index 887b61c872dd..b138414c248a 100644 status = "disabled"; }; -- blsp2_i2c0: i2c at 075b5000 { -+ blsp2_i2c0: i2c at 75b5000 { +- blsp2_i2c0: i2c@075b5000 { ++ blsp2_i2c0: i2c@75b5000 { compatible = "qcom,i2c-qup-v2.2.1"; reg = <0x075b5000 0x1000>; interrupts = <GIC_SPI 101 0>; @@ -1377,8 +1377,8 @@ index 887b61c872dd..b138414c248a 100644 status = "disabled"; }; -- blsp2_i2c1: i2c at 075b6000 { -+ blsp2_i2c1: i2c at 75b6000 { +- blsp2_i2c1: i2c@075b6000 { ++ blsp2_i2c1: i2c@75b6000 { compatible = "qcom,i2c-qup-v2.2.1"; reg = <0x075b6000 0x1000>; interrupts = <GIC_SPI 102 0>; @@ -1386,8 +1386,8 @@ index 887b61c872dd..b138414c248a 100644 status = "disabled"; }; -- blsp1_i2c2: i2c at 07577000 { -+ blsp1_i2c2: i2c at 7577000 { +- blsp1_i2c2: i2c@07577000 { ++ blsp1_i2c2: i2c@7577000 { compatible = "qcom,i2c-qup-v2.2.1"; reg = <0x07577000 0x1000>; interrupts = <GIC_SPI 97 0>; @@ -1395,8 +1395,8 @@ index 887b61c872dd..b138414c248a 100644 status = "disabled"; }; -- blsp2_spi5: spi at 075ba000{ -+ blsp2_spi5: spi at 75ba000{ +- blsp2_spi5: spi@075ba000{ ++ blsp2_spi5: spi@75ba000{ compatible = "qcom,spi-qup-v2.2.1"; reg = <0x075ba000 0x600>; interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; @@ -1404,10 +1404,15 @@ index 887b61c872dd..b138414c248a 100644 #interrupt-cells = <2>; }; -- timer at 09840000 { -+ timer at 9840000 { +- timer@09840000 { ++ timer@9840000 { #address-cells = <1>; #size-cells = <1>; ranges; -- 2.11.0 + +-- +To unsubscribe from this list: send the line "unsubscribe devicetree" in +the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org +More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/a/content_digest b/N1/content_digest index 80668da..f681c37 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,8 +1,11 @@ "ref\020171013175452.1198-1-robh@kernel.org\0" - "From\0robh@kernel.org (Rob Herring)\0" + "ref\020171013175452.1198-1-robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org\0" + "From\0Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>\0" "Subject\0[PATCH 2/2] arm64: dts: fix unit-address leading 0s\0" "Date\0Fri, 13 Oct 2017 12:54:52 -0500\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0arm-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org\0" + "Cc\0linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org" + " devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\0" "\00:1\0" "b\0" "Fix dtc warnings for 'simple_bus_reg' due to leading 0s. Converted using\n" @@ -10,7 +13,7 @@ "\n" "perl -p -i -e 's/\\@0+([0-9a-f])/\\@$1/g' `find arch/arm64/boot/dts -type -f -name '*.dts*'\n" "\n" - "Signed-off-by: Rob Herring <robh@kernel.org>\n" + "Signed-off-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>\n" "---\n" " arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 16 +++---\n" " arch/arm64/boot/dts/apm/apm-shadowcat.dtsi | 6 +-\n" @@ -52,8 +55,8 @@ " \t\t\t#size-cells = <0>;\n" " \t\t};\n" " \n" - "-\t\tusb_otg: usb at 01c19000 {\n" - "+\t\tusb_otg: usb at 1c19000 {\n" + "-\t\tusb_otg: usb@01c19000 {\n" + "+\t\tusb_otg: usb@1c19000 {\n" " \t\t\tcompatible = \"allwinner,sun8i-a33-musb\";\n" " \t\t\treg = <0x01c19000 0x0400>;\n" " \t\t\tclocks = <&ccu CLK_BUS_OTG>;\n" @@ -61,8 +64,8 @@ " \t\t\tstatus = \"disabled\";\n" " \t\t};\n" " \n" - "-\t\tusbphy: phy at 01c19400 {\n" - "+\t\tusbphy: phy at 1c19400 {\n" + "-\t\tusbphy: phy@01c19400 {\n" + "+\t\tusbphy: phy@1c19400 {\n" " \t\t\tcompatible = \"allwinner,sun50i-a64-usb-phy\";\n" " \t\t\treg = <0x01c19400 0x14>,\n" " \t\t\t <0x01c1a800 0x4>,\n" @@ -70,8 +73,8 @@ " \t\t\t#phy-cells = <1>;\n" " \t\t};\n" " \n" - "-\t\tehci0: usb at 01c1a000 {\n" - "+\t\tehci0: usb at 1c1a000 {\n" + "-\t\tehci0: usb@01c1a000 {\n" + "+\t\tehci0: usb@1c1a000 {\n" " \t\t\tcompatible = \"allwinner,sun50i-a64-ehci\", \"generic-ehci\";\n" " \t\t\treg = <0x01c1a000 0x100>;\n" " \t\t\tinterrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -79,8 +82,8 @@ " \t\t\tstatus = \"disabled\";\n" " \t\t};\n" " \n" - "-\t\tohci0: usb at 01c1a400 {\n" - "+\t\tohci0: usb at 1c1a400 {\n" + "-\t\tohci0: usb@01c1a400 {\n" + "+\t\tohci0: usb@1c1a400 {\n" " \t\t\tcompatible = \"allwinner,sun50i-a64-ohci\", \"generic-ohci\";\n" " \t\t\treg = <0x01c1a400 0x100>;\n" " \t\t\tinterrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -88,8 +91,8 @@ " \t\t\tstatus = \"disabled\";\n" " \t\t};\n" " \n" - "-\t\tehci1: usb at 01c1b000 {\n" - "+\t\tehci1: usb at 1c1b000 {\n" + "-\t\tehci1: usb@01c1b000 {\n" + "+\t\tehci1: usb@1c1b000 {\n" " \t\t\tcompatible = \"allwinner,sun50i-a64-ehci\", \"generic-ehci\";\n" " \t\t\treg = <0x01c1b000 0x100>;\n" " \t\t\tinterrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -97,8 +100,8 @@ " \t\t\tstatus = \"disabled\";\n" " \t\t};\n" " \n" - "-\t\tohci1: usb at 01c1b400 {\n" - "+\t\tohci1: usb at 1c1b400 {\n" + "-\t\tohci1: usb@01c1b400 {\n" + "+\t\tohci1: usb@1c1b400 {\n" " \t\t\tcompatible = \"allwinner,sun50i-a64-ohci\", \"generic-ohci\";\n" " \t\t\treg = <0x01c1b400 0x100>;\n" " \t\t\tinterrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -106,8 +109,8 @@ " \t\t\tstatus = \"disabled\";\n" " \t\t};\n" " \n" - "-\t\tccu: clock at 01c20000 {\n" - "+\t\tccu: clock at 1c20000 {\n" + "-\t\tccu: clock@01c20000 {\n" + "+\t\tccu: clock@1c20000 {\n" " \t\t\tcompatible = \"allwinner,sun50i-a64-ccu\";\n" " \t\t\treg = <0x01c20000 0x400>;\n" " \t\t\tclocks = <&osc24M>, <&osc32k>;\n" @@ -115,8 +118,8 @@ " \t\t\t#reset-cells = <1>;\n" " \t\t};\n" " \n" - "-\t\tr_pio: pinctrl at 01f02c00 {\n" - "+\t\tr_pio: pinctrl at 1f02c00 {\n" + "-\t\tr_pio: pinctrl@01f02c00 {\n" + "+\t\tr_pio: pinctrl@1f02c00 {\n" " \t\t\tcompatible = \"allwinner,sun50i-a64-r-pinctrl\";\n" " \t\t\treg = <0x01f02c00 0x400>;\n" " \t\t\tinterrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -128,8 +131,8 @@ " \t\t#address-cells = <2>;\n" " \t\t#size-cells = <0>;\n" " \n" - "-\t\tcpu at 000 {\n" - "+\t\tcpu at 0 {\n" + "-\t\tcpu@000 {\n" + "+\t\tcpu@0 {\n" " \t\t\tdevice_type = \"cpu\";\n" " \t\t\tcompatible = \"apm,strega\", \"arm,armv8\";\n" " \t\t\treg = <0x0 0x000>;\n" @@ -137,8 +140,8 @@ " \t\t\t#clock-cells = <1>;\n" " \t\t\tclocks = <&pmd0clk 0>;\n" " \t\t};\n" - "-\t\tcpu at 001 {\n" - "+\t\tcpu at 1 {\n" + "-\t\tcpu@001 {\n" + "+\t\tcpu@1 {\n" " \t\t\tdevice_type = \"cpu\";\n" " \t\t\tcompatible = \"apm,strega\", \"arm,armv8\";\n" " \t\t\treg = <0x0 0x001>;\n" @@ -146,8 +149,8 @@ " \t\t <0x0 0x780a0000 0x0 0x20000>,\t/* GIC CPU */\n" " \t\t <0x0 0x780c0000 0x0 0x10000>,\t/* GIC VCPU Control */\n" " \t\t <0x0 0x780e0000 0x0 0x20000>;\t/* GIC VCPU */\n" - "-\t\tv2m0: v2m at 00000 {\n" - "+\t\tv2m0: v2m at 0 {\n" + "-\t\tv2m0: v2m@00000 {\n" + "+\t\tv2m0: v2m@0 {\n" " \t\t\tcompatible = \"arm,gic-v2m-frame\";\n" " \t\t\tmsi-controller;\n" " \t\t\treg = <0x0 0x0 0x0 0x1000>;\n" @@ -159,8 +162,8 @@ " \t\t#address-cells = <2>;\n" " \t\t#size-cells = <0>;\n" " \n" - "-\t\tcpu at 000 {\n" - "+\t\tcpu at 0 {\n" + "-\t\tcpu@000 {\n" + "+\t\tcpu@0 {\n" " \t\t\tdevice_type = \"cpu\";\n" " \t\t\tcompatible = \"apm,potenza\", \"arm,armv8\";\n" " \t\t\treg = <0x0 0x000>;\n" @@ -168,8 +171,8 @@ " \t\t\tcpu-release-addr = <0x1 0x0000fff8>;\n" " \t\t\tnext-level-cache = <&xgene_L2_0>;\n" " \t\t};\n" - "-\t\tcpu at 001 {\n" - "+\t\tcpu at 1 {\n" + "-\t\tcpu@001 {\n" + "+\t\tcpu@1 {\n" " \t\t\tdevice_type = \"cpu\";\n" " \t\t\tcompatible = \"apm,potenza\", \"arm,armv8\";\n" " \t\t\treg = <0x0 0x001>;\n" @@ -181,8 +184,8 @@ " \t\ttimeout-sec = <30>;\n" " \t};\n" " \n" - "-\tsmb at 08000000 {\n" - "+\tsmb at 8000000 {\n" + "-\tsmb@08000000 {\n" + "+\tsmb@8000000 {\n" " \t\tcompatible = \"arm,vexpress,v2m-p1\", \"simple-bus\";\n" " \t\tarm,v2m-memory-map = \"rs1\";\n" " \t\t#address-cells = <2>; /* SMB chipselect number and offset */\n" @@ -190,14 +193,14 @@ " \t\t\t#size-cells = <1>;\n" " \t\t\tranges = <0 3 0 0x200000>;\n" " \n" - "-\t\t\tv2m_sysreg: sysreg at 010000 {\n" - "+\t\t\tv2m_sysreg: sysreg at 10000 {\n" + "-\t\t\tv2m_sysreg: sysreg@010000 {\n" + "+\t\t\tv2m_sysreg: sysreg@10000 {\n" " \t\t\t\tcompatible = \"arm,vexpress-sysreg\";\n" " \t\t\t\treg = <0x010000 0x1000>;\n" " \t\t\t};\n" " \n" - "-\t\t\tv2m_serial0: uart at 090000 {\n" - "+\t\t\tv2m_serial0: uart at 90000 {\n" + "-\t\t\tv2m_serial0: uart@090000 {\n" + "+\t\t\tv2m_serial0: uart@90000 {\n" " \t\t\t\tcompatible = \"arm,pl011\", \"arm,primecell\";\n" " \t\t\t\treg = <0x090000 0x1000>;\n" " \t\t\t\tinterrupts = <5>;\n" @@ -205,8 +208,8 @@ " \t\t\t\tclock-names = \"uartclk\", \"apb_pclk\";\n" " \t\t\t};\n" " \n" - "-\t\t\tv2m_serial1: uart at 0a0000 {\n" - "+\t\t\tv2m_serial1: uart at a0000 {\n" + "-\t\t\tv2m_serial1: uart@0a0000 {\n" + "+\t\t\tv2m_serial1: uart@a0000 {\n" " \t\t\t\tcompatible = \"arm,pl011\", \"arm,primecell\";\n" " \t\t\t\treg = <0x0a0000 0x1000>;\n" " \t\t\t\tinterrupts = <6>;\n" @@ -214,8 +217,8 @@ " \t\t\t\tclock-names = \"uartclk\", \"apb_pclk\";\n" " \t\t\t};\n" " \n" - "-\t\t\tv2m_serial2: uart at 0b0000 {\n" - "+\t\t\tv2m_serial2: uart at b0000 {\n" + "-\t\t\tv2m_serial2: uart@0b0000 {\n" + "+\t\t\tv2m_serial2: uart@b0000 {\n" " \t\t\t\tcompatible = \"arm,pl011\", \"arm,primecell\";\n" " \t\t\t\treg = <0x0b0000 0x1000>;\n" " \t\t\t\tinterrupts = <7>;\n" @@ -223,8 +226,8 @@ " \t\t\t\tclock-names = \"uartclk\", \"apb_pclk\";\n" " \t\t\t};\n" " \n" - "-\t\t\tv2m_serial3: uart at 0c0000 {\n" - "+\t\t\tv2m_serial3: uart at c0000 {\n" + "-\t\t\tv2m_serial3: uart@0c0000 {\n" + "+\t\t\tv2m_serial3: uart@c0000 {\n" " \t\t\t\tcompatible = \"arm,pl011\", \"arm,primecell\";\n" " \t\t\t\treg = <0x0c0000 0x1000>;\n" " \t\t\t\tinterrupts = <8>;\n" @@ -232,8 +235,8 @@ " \t\t\t\tclock-names = \"uartclk\", \"apb_pclk\";\n" " \t\t\t};\n" " \n" - "-\t\t\tvirtio-block at 0130000 {\n" - "+\t\t\tvirtio-block at 130000 {\n" + "-\t\t\tvirtio-block@0130000 {\n" + "+\t\t\tvirtio-block@130000 {\n" " \t\t\t\tcompatible = \"virtio,mmio\";\n" " \t\t\t\treg = <0x130000 0x200>;\n" " \t\t\t\tinterrupts = <42>;\n" @@ -245,8 +248,8 @@ " \t\t\t <0 63 4>;\n" " \t};\n" " \n" - "-\tsmb at 08000000 {\n" - "+\tsmb at 8000000 {\n" + "-\tsmb@08000000 {\n" + "+\tsmb@8000000 {\n" " \t\tcompatible = \"simple-bus\";\n" " \n" " \t\t#address-cells = <2>;\n" @@ -258,16 +261,16 @@ " \t\t\t#size-cells = <1>;\n" " \t\t\tranges = <0 3 0 0x200000>;\n" " \n" - "-\t\t\tv2m_sysreg: sysreg at 010000 {\n" - "+\t\t\tv2m_sysreg: sysreg at 10000 {\n" + "-\t\t\tv2m_sysreg: sysreg@010000 {\n" + "+\t\t\tv2m_sysreg: sysreg@10000 {\n" " \t\t\t\tcompatible = \"arm,vexpress-sysreg\";\n" " \t\t\t\treg = <0x010000 0x1000>;\n" " \t\t\t\tgpio-controller;\n" " \t\t\t\t#gpio-cells = <2>;\n" " \t\t\t};\n" " \n" - "-\t\t\tv2m_sysctl: sysctl at 020000 {\n" - "+\t\t\tv2m_sysctl: sysctl at 20000 {\n" + "-\t\t\tv2m_sysctl: sysctl@020000 {\n" + "+\t\t\tv2m_sysctl: sysctl@20000 {\n" " \t\t\t\tcompatible = \"arm,sp810\", \"arm,primecell\";\n" " \t\t\t\treg = <0x020000 0x1000>;\n" " \t\t\t\tclocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&v2m_clk24mhz>;\n" @@ -275,8 +278,8 @@ " \t\t\t\tassigned-clock-parents = <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>;\n" " \t\t\t};\n" " \n" - "-\t\t\taaci at 040000 {\n" - "+\t\t\taaci at 40000 {\n" + "-\t\t\taaci@040000 {\n" + "+\t\t\taaci@40000 {\n" " \t\t\t\tcompatible = \"arm,pl041\", \"arm,primecell\";\n" " \t\t\t\treg = <0x040000 0x1000>;\n" " \t\t\t\tinterrupts = <11>;\n" @@ -284,8 +287,8 @@ " \t\t\t\tclock-names = \"apb_pclk\";\n" " \t\t\t};\n" " \n" - "-\t\t\tmmci at 050000 {\n" - "+\t\t\tmmci at 50000 {\n" + "-\t\t\tmmci@050000 {\n" + "+\t\t\tmmci@50000 {\n" " \t\t\t\tcompatible = \"arm,pl180\", \"arm,primecell\";\n" " \t\t\t\treg = <0x050000 0x1000>;\n" " \t\t\t\tinterrupts = <9 10>;\n" @@ -293,8 +296,8 @@ " \t\t\t\tclock-names = \"mclk\", \"apb_pclk\";\n" " \t\t\t};\n" " \n" - "-\t\t\tkmi at 060000 {\n" - "+\t\t\tkmi at 60000 {\n" + "-\t\t\tkmi@060000 {\n" + "+\t\t\tkmi@60000 {\n" " \t\t\t\tcompatible = \"arm,pl050\", \"arm,primecell\";\n" " \t\t\t\treg = <0x060000 0x1000>;\n" " \t\t\t\tinterrupts = <12>;\n" @@ -302,8 +305,8 @@ " \t\t\t\tclock-names = \"KMIREFCLK\", \"apb_pclk\";\n" " \t\t\t};\n" " \n" - "-\t\t\tkmi at 070000 {\n" - "+\t\t\tkmi at 70000 {\n" + "-\t\t\tkmi@070000 {\n" + "+\t\t\tkmi@70000 {\n" " \t\t\t\tcompatible = \"arm,pl050\", \"arm,primecell\";\n" " \t\t\t\treg = <0x070000 0x1000>;\n" " \t\t\t\tinterrupts = <13>;\n" @@ -311,8 +314,8 @@ " \t\t\t\tclock-names = \"KMIREFCLK\", \"apb_pclk\";\n" " \t\t\t};\n" " \n" - "-\t\t\tv2m_serial0: uart at 090000 {\n" - "+\t\t\tv2m_serial0: uart at 90000 {\n" + "-\t\t\tv2m_serial0: uart@090000 {\n" + "+\t\t\tv2m_serial0: uart@90000 {\n" " \t\t\t\tcompatible = \"arm,pl011\", \"arm,primecell\";\n" " \t\t\t\treg = <0x090000 0x1000>;\n" " \t\t\t\tinterrupts = <5>;\n" @@ -320,8 +323,8 @@ " \t\t\t\tclock-names = \"uartclk\", \"apb_pclk\";\n" " \t\t\t};\n" " \n" - "-\t\t\tv2m_serial1: uart at 0a0000 {\n" - "+\t\t\tv2m_serial1: uart at a0000 {\n" + "-\t\t\tv2m_serial1: uart@0a0000 {\n" + "+\t\t\tv2m_serial1: uart@a0000 {\n" " \t\t\t\tcompatible = \"arm,pl011\", \"arm,primecell\";\n" " \t\t\t\treg = <0x0a0000 0x1000>;\n" " \t\t\t\tinterrupts = <6>;\n" @@ -329,8 +332,8 @@ " \t\t\t\tclock-names = \"uartclk\", \"apb_pclk\";\n" " \t\t\t};\n" " \n" - "-\t\t\tv2m_serial2: uart at 0b0000 {\n" - "+\t\t\tv2m_serial2: uart at b0000 {\n" + "-\t\t\tv2m_serial2: uart@0b0000 {\n" + "+\t\t\tv2m_serial2: uart@b0000 {\n" " \t\t\t\tcompatible = \"arm,pl011\", \"arm,primecell\";\n" " \t\t\t\treg = <0x0b0000 0x1000>;\n" " \t\t\t\tinterrupts = <7>;\n" @@ -338,8 +341,8 @@ " \t\t\t\tclock-names = \"uartclk\", \"apb_pclk\";\n" " \t\t\t};\n" " \n" - "-\t\t\tv2m_serial3: uart at 0c0000 {\n" - "+\t\t\tv2m_serial3: uart at c0000 {\n" + "-\t\t\tv2m_serial3: uart@0c0000 {\n" + "+\t\t\tv2m_serial3: uart@c0000 {\n" " \t\t\t\tcompatible = \"arm,pl011\", \"arm,primecell\";\n" " \t\t\t\treg = <0x0c0000 0x1000>;\n" " \t\t\t\tinterrupts = <8>;\n" @@ -347,8 +350,8 @@ " \t\t\t\tclock-names = \"uartclk\", \"apb_pclk\";\n" " \t\t\t};\n" " \n" - "-\t\t\twdt at 0f0000 {\n" - "+\t\t\twdt at f0000 {\n" + "-\t\t\twdt@0f0000 {\n" + "+\t\t\twdt@f0000 {\n" " \t\t\t\tcompatible = \"arm,sp805\", \"arm,primecell\";\n" " \t\t\t\treg = <0x0f0000 0x1000>;\n" " \t\t\t\tinterrupts = <0>;\n" @@ -356,8 +359,8 @@ " \t\t\t\t};\n" " \t\t\t};\n" " \n" - "-\t\t\tvirtio-block at 0130000 {\n" - "+\t\t\tvirtio-block at 130000 {\n" + "-\t\t\tvirtio-block@0130000 {\n" + "+\t\t\tvirtio-block@130000 {\n" " \t\t\t\tcompatible = \"virtio,mmio\";\n" " \t\t\t\treg = <0x130000 0x200>;\n" " \t\t\t\tinterrupts = <42>;\n" @@ -369,8 +372,8 @@ " \t\t};\n" " \t};\n" " \n" - "-\tsmb at 08000000 {\n" - "+\tsmb at 8000000 {\n" + "-\tsmb@08000000 {\n" + "+\tsmb@8000000 {\n" " \t\tcompatible = \"simple-bus\";\n" " \n" " \t\t#address-cells = <2>;\n" @@ -382,8 +385,8 @@ " \t\t\treg = <0x04000000 0x06400000>; /* 100MB */\n" " \t\t};\n" " \n" - "-\t\tpartition at 0a400000{\n" - "+\t\tpartition at a400000{\n" + "-\t\tpartition@0a400000{\n" + "+\t\tpartition@a400000{\n" " \t\t\tlabel = \"ncustfs\";\n" " \t\t\treg = <0x0a400000 0x35c00000>; /* 860MB */\n" " \t\t};\n" @@ -395,8 +398,8 @@ " \t\t\tnext-level-cache = <&CLUSTER0_L2>;\n" " \t\t};\n" " \n" - "-\t\tCLUSTER0_L2: l2-cache at 000 {\n" - "+\t\tCLUSTER0_L2: l2-cache at 0 {\n" + "-\t\tCLUSTER0_L2: l2-cache@000 {\n" + "+\t\tCLUSTER0_L2: l2-cache@0 {\n" " \t\t\tcompatible = \"cache\";\n" " \t\t};\n" " \t};\n" @@ -404,8 +407,8 @@ " \t\t\t#size-cells = <1>;\n" " \t\t\tranges = <0 0x652e0000 0x80000>;\n" " \n" - "-\t\t\tv2m0: v2m at 00000 {\n" - "+\t\t\tv2m0: v2m at 0 {\n" + "-\t\t\tv2m0: v2m@00000 {\n" + "+\t\t\tv2m0: v2m@0 {\n" " \t\t\t\tcompatible = \"arm,gic-v2m-frame\";\n" " \t\t\t\tinterrupt-parent = <&gic>;\n" " \t\t\t\tmsi-controller;\n" @@ -417,8 +420,8 @@ " \t\t\tclock-mult = <1>;\n" " \t\t};\n" " \n" - "-\t\tgenpll0: genpll0 at 0001d104 {\n" - "+\t\tgenpll0: genpll0 at 1d104 {\n" + "-\t\tgenpll0: genpll0@0001d104 {\n" + "+\t\tgenpll0: genpll0@1d104 {\n" " \t\t\t#clock-cells = <1>;\n" " \t\t\tcompatible = \"brcm,sr-genpll0\";\n" " \t\t\treg = <0x0001d104 0x32>,\n" @@ -426,8 +429,8 @@ " \t\t\t\t\t \"clk_paxc_axi\";\n" " \t\t};\n" " \n" - "-\t\tgenpll3: genpll3 at 0001d1e0 {\n" - "+\t\tgenpll3: genpll3 at 1d1e0 {\n" + "-\t\tgenpll3: genpll3@0001d1e0 {\n" + "+\t\tgenpll3: genpll3@1d1e0 {\n" " \t\t\t#clock-cells = <1>;\n" " \t\t\tcompatible = \"brcm,sr-genpll3\";\n" " \t\t\treg = <0x0001d1e0 0x32>,\n" @@ -435,8 +438,8 @@ " \t\t\t\t\t \"clk_sdio\";\n" " \t\t};\n" " \n" - "-\t\tgenpll4: genpll4 at 0001d214 {\n" - "+\t\tgenpll4: genpll4 at 1d214 {\n" + "-\t\tgenpll4: genpll4@0001d214 {\n" + "+\t\tgenpll4: genpll4@1d214 {\n" " \t\t\t#clock-cells = <1>;\n" " \t\t\tcompatible = \"brcm,sr-genpll4\";\n" " \t\t\treg = <0x0001d214 0x32>,\n" @@ -444,8 +447,8 @@ " \t\t\t\t\t \"clk_bridge_fscpu\";\n" " \t\t};\n" " \n" - "-\t\tgenpll5: genpll5 at 0001d248 {\n" - "+\t\tgenpll5: genpll5 at 1d248 {\n" + "-\t\tgenpll5: genpll5@0001d248 {\n" + "+\t\tgenpll5: genpll5@1d248 {\n" " \t\t\t#clock-cells = <1>;\n" " \t\t\tcompatible = \"brcm,sr-genpll5\";\n" " \t\t\treg = <0x0001d248 0x32>,\n" @@ -453,8 +456,8 @@ " \t\t\t\t\t \"crypto_ae_clk\", \"raid_ae_clk\";\n" " \t\t};\n" " \n" - "-\t\tlcpll0: lcpll0 at 0001d0c4 {\n" - "+\t\tlcpll0: lcpll0 at 1d0c4 {\n" + "-\t\tlcpll0: lcpll0@0001d0c4 {\n" + "+\t\tlcpll0: lcpll0@1d0c4 {\n" " \t\t\t#clock-cells = <1>;\n" " \t\t\tcompatible = \"brcm,sr-lcpll0\";\n" " \t\t\treg = <0x0001d0c4 0x3c>,\n" @@ -462,8 +465,8 @@ " \t\t\t\t\t \"clk_sata_500\";\n" " \t\t};\n" " \n" - "-\t\tlcpll1: lcpll1 at 0001d138 {\n" - "+\t\tlcpll1: lcpll1 at 1d138 {\n" + "-\t\tlcpll1: lcpll1@0001d138 {\n" + "+\t\tlcpll1: lcpll1@1d138 {\n" " \t\t\t#clock-cells = <1>;\n" " \t\t\tcompatible = \"brcm,sr-lcpll1\";\n" " \t\t\treg = <0x0001d138 0x3c>,\n" @@ -475,8 +478,8 @@ " \t\t#size-cells = <1>;\n" " \t\tranges = <0x0 0x0 0x67000000 0x00800000>;\n" " \n" - "-\t\tcrypto_mbox: crypto_mbox at 00000000 {\n" - "+\t\tcrypto_mbox: crypto_mbox at 0 {\n" + "-\t\tcrypto_mbox: crypto_mbox@00000000 {\n" + "+\t\tcrypto_mbox: crypto_mbox@0 {\n" " \t\t\tcompatible = \"brcm,iproc-flexrm-mbox\";\n" " \t\t\treg = <0x00000000 0x200000>;\n" " \t\t\tmsi-parent = <&gic_its 0x4100>;\n" @@ -484,8 +487,8 @@ " \t\t\tdma-coherent;\n" " \t\t};\n" " \n" - "-\t\traid_mbox: raid_mbox at 00400000 {\n" - "+\t\traid_mbox: raid_mbox at 400000 {\n" + "-\t\traid_mbox: raid_mbox@00400000 {\n" + "+\t\traid_mbox: raid_mbox@400000 {\n" " \t\t\tcompatible = \"brcm,iproc-flexrm-mbox\";\n" " \t\t\treg = <0x00400000 0x200000>;\n" " \t\t\tdma-coherent;\n" @@ -497,8 +500,8 @@ " \n" " #include <dt-bindings/pinctrl/brcm,pinctrl-stingray.h>\n" " \n" - "-\t\tpinconf: pinconf at 00140000 {\n" - "+\t\tpinconf: pinconf at 140000 {\n" + "-\t\tpinconf: pinconf@00140000 {\n" + "+\t\tpinconf: pinconf@140000 {\n" " \t\t\tcompatible = \"pinconf-single\";\n" " \t\t\treg = <0x00140000 0x250>;\n" " \t\t\tpinctrl-single,register-width = <32>;\n" @@ -506,8 +509,8 @@ " \t\t\t/* pinconf functions */\n" " \t\t};\n" " \n" - "-\t\tpinmux: pinmux at 0014029c {\n" - "+\t\tpinmux: pinmux at 14029c {\n" + "-\t\tpinmux: pinmux@0014029c {\n" + "+\t\tpinmux: pinmux@14029c {\n" " \t\t\tcompatible = \"pinctrl-single\";\n" " \t\t\treg = <0x0014029c 0x250>;\n" " \t\t\t#address-cells = <1>;\n" @@ -519,8 +522,8 @@ " \t\t#size-cells = <1>;\n" " \t\tranges = <0x0 0x0 0x67d00000 0x00800000>;\n" " \n" - "-\t\tsata0: ahci at 00210000 {\n" - "+\t\tsata0: ahci at 210000 {\n" + "-\t\tsata0: ahci@00210000 {\n" + "+\t\tsata0: ahci@210000 {\n" " \t\t\tcompatible = \"brcm,iproc-ahci\", \"generic-ahci\";\n" " \t\t\treg = <0x00210000 0x1000>;\n" " \t\t\treg-names = \"ahci\";\n" @@ -528,8 +531,8 @@ " \t\t\t};\n" " \t\t};\n" " \n" - "-\t\tsata_phy0: sata_phy at 00212100 {\n" - "+\t\tsata_phy0: sata_phy at 212100 {\n" + "-\t\tsata_phy0: sata_phy@00212100 {\n" + "+\t\tsata_phy0: sata_phy@212100 {\n" " \t\t\tcompatible = \"brcm,iproc-sr-sata-phy\";\n" " \t\t\treg = <0x00212100 0x1000>;\n" " \t\t\treg-names = \"phy\";\n" @@ -537,8 +540,8 @@ " \t\t\t};\n" " \t\t};\n" " \n" - "-\t\tsata1: ahci at 00310000 {\n" - "+\t\tsata1: ahci at 310000 {\n" + "-\t\tsata1: ahci@00310000 {\n" + "+\t\tsata1: ahci@310000 {\n" " \t\t\tcompatible = \"brcm,iproc-ahci\", \"generic-ahci\";\n" " \t\t\treg = <0x00310000 0x1000>;\n" " \t\t\treg-names = \"ahci\";\n" @@ -546,8 +549,8 @@ " \t\t\t};\n" " \t\t};\n" " \n" - "-\t\tsata_phy1: sata_phy at 00312100 {\n" - "+\t\tsata_phy1: sata_phy at 312100 {\n" + "-\t\tsata_phy1: sata_phy@00312100 {\n" + "+\t\tsata_phy1: sata_phy@312100 {\n" " \t\t\tcompatible = \"brcm,iproc-sr-sata-phy\";\n" " \t\t\treg = <0x00312100 0x1000>;\n" " \t\t\treg-names = \"phy\";\n" @@ -555,8 +558,8 @@ " \t\t\t};\n" " \t\t};\n" " \n" - "-\t\tsata2: ahci at 00120000 {\n" - "+\t\tsata2: ahci at 120000 {\n" + "-\t\tsata2: ahci@00120000 {\n" + "+\t\tsata2: ahci@120000 {\n" " \t\t\tcompatible = \"brcm,iproc-ahci\", \"generic-ahci\";\n" " \t\t\treg = <0x00120000 0x1000>;\n" " \t\t\treg-names = \"ahci\";\n" @@ -564,8 +567,8 @@ " \t\t\t};\n" " \t\t};\n" " \n" - "-\t\tsata_phy2: sata_phy at 00122100 {\n" - "+\t\tsata_phy2: sata_phy at 122100 {\n" + "-\t\tsata_phy2: sata_phy@00122100 {\n" + "+\t\tsata_phy2: sata_phy@122100 {\n" " \t\t\tcompatible = \"brcm,iproc-sr-sata-phy\";\n" " \t\t\treg = <0x00122100 0x1000>;\n" " \t\t\treg-names = \"phy\";\n" @@ -573,8 +576,8 @@ " \t\t\t};\n" " \t\t};\n" " \n" - "-\t\tsata3: ahci at 00130000 {\n" - "+\t\tsata3: ahci at 130000 {\n" + "-\t\tsata3: ahci@00130000 {\n" + "+\t\tsata3: ahci@130000 {\n" " \t\t\tcompatible = \"brcm,iproc-ahci\", \"generic-ahci\";\n" " \t\t\treg = <0x00130000 0x1000>;\n" " \t\t\treg-names = \"ahci\";\n" @@ -582,8 +585,8 @@ " \t\t\t};\n" " \t\t};\n" " \n" - "-\t\tsata_phy3: sata_phy at 00132100 {\n" - "+\t\tsata_phy3: sata_phy at 132100 {\n" + "-\t\tsata_phy3: sata_phy@00132100 {\n" + "+\t\tsata_phy3: sata_phy@132100 {\n" " \t\t\tcompatible = \"brcm,iproc-sr-sata-phy\";\n" " \t\t\treg = <0x00132100 0x1000>;\n" " \t\t\treg-names = \"phy\";\n" @@ -591,8 +594,8 @@ " \t\t\t};\n" " \t\t};\n" " \n" - "-\t\tsata4: ahci at 00330000 {\n" - "+\t\tsata4: ahci at 330000 {\n" + "-\t\tsata4: ahci@00330000 {\n" + "+\t\tsata4: ahci@330000 {\n" " \t\t\tcompatible = \"brcm,iproc-ahci\", \"generic-ahci\";\n" " \t\t\treg = <0x00330000 0x1000>;\n" " \t\t\treg-names = \"ahci\";\n" @@ -600,8 +603,8 @@ " \t\t\t};\n" " \t\t};\n" " \n" - "-\t\tsata_phy4: sata_phy at 00332100 {\n" - "+\t\tsata_phy4: sata_phy at 332100 {\n" + "-\t\tsata_phy4: sata_phy@00332100 {\n" + "+\t\tsata_phy4: sata_phy@332100 {\n" " \t\t\tcompatible = \"brcm,iproc-sr-sata-phy\";\n" " \t\t\treg = <0x00332100 0x1000>;\n" " \t\t\treg-names = \"phy\";\n" @@ -609,8 +612,8 @@ " \t\t\t};\n" " \t\t};\n" " \n" - "-\t\tsata5: ahci at 00400000 {\n" - "+\t\tsata5: ahci at 400000 {\n" + "-\t\tsata5: ahci@00400000 {\n" + "+\t\tsata5: ahci@400000 {\n" " \t\t\tcompatible = \"brcm,iproc-ahci\", \"generic-ahci\";\n" " \t\t\treg = <0x00400000 0x1000>;\n" " \t\t\treg-names = \"ahci\";\n" @@ -618,8 +621,8 @@ " \t\t\t};\n" " \t\t};\n" " \n" - "-\t\tsata_phy5: sata_phy at 00402100 {\n" - "+\t\tsata_phy5: sata_phy at 402100 {\n" + "-\t\tsata_phy5: sata_phy@00402100 {\n" + "+\t\tsata_phy5: sata_phy@402100 {\n" " \t\t\tcompatible = \"brcm,iproc-sr-sata-phy\";\n" " \t\t\treg = <0x00402100 0x1000>;\n" " \t\t\treg-names = \"phy\";\n" @@ -627,8 +630,8 @@ " \t\t\t};\n" " \t\t};\n" " \n" - "-\t\tsata6: ahci at 00410000 {\n" - "+\t\tsata6: ahci at 410000 {\n" + "-\t\tsata6: ahci@00410000 {\n" + "+\t\tsata6: ahci@410000 {\n" " \t\t\tcompatible = \"brcm,iproc-ahci\", \"generic-ahci\";\n" " \t\t\treg = <0x00410000 0x1000>;\n" " \t\t\treg-names = \"ahci\";\n" @@ -636,8 +639,8 @@ " \t\t\t};\n" " \t\t};\n" " \n" - "-\t\tsata_phy6: sata_phy at 00412100 {\n" - "+\t\tsata_phy6: sata_phy at 412100 {\n" + "-\t\tsata_phy6: sata_phy@00412100 {\n" + "+\t\tsata_phy6: sata_phy@412100 {\n" " \t\t\tcompatible = \"brcm,iproc-sr-sata-phy\";\n" " \t\t\treg = <0x00412100 0x1000>;\n" " \t\t\treg-names = \"phy\";\n" @@ -645,8 +648,8 @@ " \t\t\t};\n" " \t\t};\n" " \n" - "-\t\tsata7: ahci at 00420000 {\n" - "+\t\tsata7: ahci at 420000 {\n" + "-\t\tsata7: ahci@00420000 {\n" + "+\t\tsata7: ahci@420000 {\n" " \t\t\tcompatible = \"brcm,iproc-ahci\", \"generic-ahci\";\n" " \t\t\treg = <0x00420000 0x1000>;\n" " \t\t\treg-names = \"ahci\";\n" @@ -654,8 +657,8 @@ " \t\t\t};\n" " \t\t};\n" " \n" - "-\t\tsata_phy7: sata_phy at 00422100 {\n" - "+\t\tsata_phy7: sata_phy at 422100 {\n" + "-\t\tsata_phy7: sata_phy@00422100 {\n" + "+\t\tsata_phy7: sata_phy@422100 {\n" " \t\t\tcompatible = \"brcm,iproc-sr-sata-phy\";\n" " \t\t\treg = <0x00422100 0x1000>;\n" " \t\t\treg-names = \"phy\";\n" @@ -667,8 +670,8 @@ " \t\t#address-cells = <2>;\n" " \t\t#size-cells = <0>;\n" " \n" - "-\t\tcpu at 000 {\n" - "+\t\tcpu at 0 {\n" + "-\t\tcpu@000 {\n" + "+\t\tcpu@0 {\n" " \t\t\tdevice_type = \"cpu\";\n" " \t\t\tcompatible = \"arm,cortex-a72\", \"arm,armv8\";\n" " \t\t\treg = <0x0 0x0>;\n" @@ -676,8 +679,8 @@ " \t\t\tnext-level-cache = <&CLUSTER0_L2>;\n" " \t\t};\n" " \n" - "-\t\tcpu at 001 {\n" - "+\t\tcpu at 1 {\n" + "-\t\tcpu@001 {\n" + "+\t\tcpu@1 {\n" " \t\t\tdevice_type = \"cpu\";\n" " \t\t\tcompatible = \"arm,cortex-a72\", \"arm,armv8\";\n" " \t\t\treg = <0x0 0x1>;\n" @@ -685,8 +688,8 @@ " \t\t\tnext-level-cache = <&CLUSTER3_L2>;\n" " \t\t};\n" " \n" - "-\t\tCLUSTER0_L2: l2-cache at 000 {\n" - "+\t\tCLUSTER0_L2: l2-cache at 0 {\n" + "-\t\tCLUSTER0_L2: l2-cache@000 {\n" + "+\t\tCLUSTER0_L2: l2-cache@0 {\n" " \t\t\tcompatible = \"cache\";\n" " \t\t};\n" " \n" @@ -694,15 +697,15 @@ " \t\t#size-cells = <1>;\n" " \t\tranges = <0x0 0x0 0x61000000 0x05000000>;\n" " \n" - "-\t\tccn: ccn at 00000000 {\n" - "+\t\tccn: ccn at 0 {\n" + "-\t\tccn: ccn@00000000 {\n" + "+\t\tccn: ccn@0 {\n" " \t\t\tcompatible = \"arm,ccn-502\";\n" " \t\t\treg = <0x00000000 0x900000>;\n" " \t\t\tinterrupts = <GIC_SPI 799 IRQ_TYPE_LEVEL_HIGH>;\n" " \t\t};\n" " \n" - "-\t\tgic: interrupt-controller at 02c00000 {\n" - "+\t\tgic: interrupt-controller at 2c00000 {\n" + "-\t\tgic: interrupt-controller@02c00000 {\n" + "+\t\tgic: interrupt-controller@2c00000 {\n" " \t\t\tcompatible = \"arm,gic-v3\";\n" " \t\t\t#interrupt-cells = <3>;\n" " \t\t\t#address-cells = <1>;\n" @@ -710,8 +713,8 @@ " \t\t\t};\n" " \t\t};\n" " \n" - "-\t\tsmmu: mmu at 03000000 {\n" - "+\t\tsmmu: mmu at 3000000 {\n" + "-\t\tsmmu: mmu@03000000 {\n" + "+\t\tsmmu: mmu@3000000 {\n" " \t\t\tcompatible = \"arm,mmu-500\";\n" " \t\t\treg = <0x03000000 0x80000>;\n" " \t\t\t#global-interrupts = <1>;\n" @@ -719,8 +722,8 @@ " \n" " \t\t#include \"stingray-clock.dtsi\"\n" " \n" - "-\t\tgpio_crmu: gpio at 00024800 {\n" - "+\t\tgpio_crmu: gpio at 24800 {\n" + "-\t\tgpio_crmu: gpio@00024800 {\n" + "+\t\tgpio_crmu: gpio@24800 {\n" " \t\t\tcompatible = \"brcm,iproc-gpio\";\n" " \t\t\treg = <0x00024800 0x4c>;\n" " \t\t\tngpios = <6>;\n" @@ -728,8 +731,8 @@ " \n" " \t\t#include \"stingray-pinctrl.dtsi\"\n" " \n" - "-\t\tmdio_mux_iproc: mdio-mux at 0002023c {\n" - "+\t\tmdio_mux_iproc: mdio-mux at 2023c {\n" + "-\t\tmdio_mux_iproc: mdio-mux@0002023c {\n" + "+\t\tmdio_mux_iproc: mdio-mux@2023c {\n" " \t\t\tcompatible = \"brcm,mdio-mux-iproc\";\n" " \t\t\treg = <0x0002023c 0x14>;\n" " \t\t\t#address-cells = <1>;\n" @@ -737,8 +740,8 @@ " \t\t\t};\n" " \t\t};\n" " \n" - "-\t\tpwm: pwm at 00010000 {\n" - "+\t\tpwm: pwm at 10000 {\n" + "-\t\tpwm: pwm@00010000 {\n" + "+\t\tpwm: pwm@10000 {\n" " \t\t\tcompatible = \"brcm,iproc-pwm\";\n" " \t\t\treg = <0x00010000 0x1000>;\n" " \t\t\tclocks = <&crmu_ref25m>;\n" @@ -746,8 +749,8 @@ " \t\t\tstatus = \"disabled\";\n" " \t\t};\n" " \n" - "-\t\ttimer0: timer at 00030000 {\n" - "+\t\ttimer0: timer at 30000 {\n" + "-\t\ttimer0: timer@00030000 {\n" + "+\t\ttimer0: timer@30000 {\n" " \t\t\tcompatible = \"arm,sp804\", \"arm,primecell\";\n" " \t\t\treg = <0x00030000 0x1000>;\n" " \t\t\tinterrupts = <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -755,8 +758,8 @@ " \t\t\tstatus = \"disabled\";\n" " \t\t};\n" " \n" - "-\t\ttimer1: timer at 00040000 {\n" - "+\t\ttimer1: timer at 40000 {\n" + "-\t\ttimer1: timer@00040000 {\n" + "+\t\ttimer1: timer@40000 {\n" " \t\t\tcompatible = \"arm,sp804\", \"arm,primecell\";\n" " \t\t\treg = <0x00040000 0x1000>;\n" " \t\t\tinterrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -764,8 +767,8 @@ " \t\t\tclock-names = \"timer1\", \"timer2\", \"apb_pclk\";\n" " \t\t};\n" " \n" - "-\t\ttimer2: timer at 00050000 {\n" - "+\t\ttimer2: timer at 50000 {\n" + "-\t\ttimer2: timer@00050000 {\n" + "+\t\ttimer2: timer@50000 {\n" " \t\t\tcompatible = \"arm,sp804\", \"arm,primecell\";\n" " \t\t\treg = <0x00050000 0x1000>;\n" " \t\t\tinterrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -773,8 +776,8 @@ " \t\t\tstatus = \"disabled\";\n" " \t\t};\n" " \n" - "-\t\ttimer3: timer at 00060000 {\n" - "+\t\ttimer3: timer at 60000 {\n" + "-\t\ttimer3: timer@00060000 {\n" + "+\t\ttimer3: timer@60000 {\n" " \t\t\tcompatible = \"arm,sp804\", \"arm,primecell\";\n" " \t\t\treg = <0x00060000 0x1000>;\n" " \t\t\tinterrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -782,8 +785,8 @@ " \t\t\tstatus = \"disabled\";\n" " \t\t};\n" " \n" - "-\t\ttimer4: timer at 00070000 {\n" - "+\t\ttimer4: timer at 70000 {\n" + "-\t\ttimer4: timer@00070000 {\n" + "+\t\ttimer4: timer@70000 {\n" " \t\t\tcompatible = \"arm,sp804\", \"arm,primecell\";\n" " \t\t\treg = <0x00070000 0x1000>;\n" " \t\t\tinterrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -791,8 +794,8 @@ " \t\t\tstatus = \"disabled\";\n" " \t\t};\n" " \n" - "-\t\ttimer5: timer at 00080000 {\n" - "+\t\ttimer5: timer at 80000 {\n" + "-\t\ttimer5: timer@00080000 {\n" + "+\t\ttimer5: timer@80000 {\n" " \t\t\tcompatible = \"arm,sp804\", \"arm,primecell\";\n" " \t\t\treg = <0x00080000 0x1000>;\n" " \t\t\tinterrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -800,8 +803,8 @@ " \t\t\tstatus = \"disabled\";\n" " \t\t};\n" " \n" - "-\t\ttimer6: timer at 00090000 {\n" - "+\t\ttimer6: timer at 90000 {\n" + "-\t\ttimer6: timer@00090000 {\n" + "+\t\ttimer6: timer@90000 {\n" " \t\t\tcompatible = \"arm,sp804\", \"arm,primecell\";\n" " \t\t\treg = <0x00090000 0x1000>;\n" " \t\t\tinterrupts = <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -809,8 +812,8 @@ " \t\t\tstatus = \"disabled\";\n" " \t\t};\n" " \n" - "-\t\ttimer7: timer at 000a0000 {\n" - "+\t\ttimer7: timer at a0000 {\n" + "-\t\ttimer7: timer@000a0000 {\n" + "+\t\ttimer7: timer@a0000 {\n" " \t\t\tcompatible = \"arm,sp804\", \"arm,primecell\";\n" " \t\t\treg = <0x000a0000 0x1000>;\n" " \t\t\tinterrupts = <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -818,8 +821,8 @@ " \t\t\tstatus = \"disabled\";\n" " \t\t};\n" " \n" - "-\t\ti2c0: i2c at 000b0000 {\n" - "+\t\ti2c0: i2c at b0000 {\n" + "-\t\ti2c0: i2c@000b0000 {\n" + "+\t\ti2c0: i2c@b0000 {\n" " \t\t\tcompatible = \"brcm,iproc-i2c\";\n" " \t\t\treg = <0x000b0000 0x100>;\n" " \t\t\t#address-cells = <1>;\n" @@ -827,8 +830,8 @@ " \t\t\tstatus = \"disabled\";\n" " \t\t};\n" " \n" - "-\t\twdt0: watchdog at 000c0000 {\n" - "+\t\twdt0: watchdog at c0000 {\n" + "-\t\twdt0: watchdog@000c0000 {\n" + "+\t\twdt0: watchdog@c0000 {\n" " \t\t\tcompatible = \"arm,sp805\", \"arm,primecell\";\n" " \t\t\treg = <0x000c0000 0x1000>;\n" " \t\t\tinterrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -836,8 +839,8 @@ " \t\t\tclock-names = \"wdogclk\", \"apb_pclk\";\n" " \t\t};\n" " \n" - "-\t\tgpio_hsls: gpio at 000d0000 {\n" - "+\t\tgpio_hsls: gpio at d0000 {\n" + "-\t\tgpio_hsls: gpio@000d0000 {\n" + "+\t\tgpio_hsls: gpio@d0000 {\n" " \t\t\tcompatible = \"brcm,iproc-gpio\";\n" " \t\t\treg = <0x000d0000 0x864>;\n" " \t\t\tngpios = <151>;\n" @@ -845,8 +848,8 @@ " \t\t\t\t\t<&pinmux 151 91 4>;\n" " \t\t};\n" " \n" - "-\t\ti2c1: i2c at 000e0000 {\n" - "+\t\ti2c1: i2c at e0000 {\n" + "-\t\ti2c1: i2c@000e0000 {\n" + "+\t\ti2c1: i2c@e0000 {\n" " \t\t\tcompatible = \"brcm,iproc-i2c\";\n" " \t\t\treg = <0x000e0000 0x100>;\n" " \t\t\t#address-cells = <1>;\n" @@ -854,8 +857,8 @@ " \t\t\tstatus = \"disabled\";\n" " \t\t};\n" " \n" - "-\t\tuart0: uart at 00100000 {\n" - "+\t\tuart0: uart at 100000 {\n" + "-\t\tuart0: uart@00100000 {\n" + "+\t\tuart0: uart@100000 {\n" " \t\t\tdevice_type = \"serial\";\n" " \t\t\tcompatible = \"snps,dw-apb-uart\";\n" " \t\t\treg = <0x00100000 0x1000>;\n" @@ -863,8 +866,8 @@ " \t\t\tstatus = \"disabled\";\n" " \t\t};\n" " \n" - "-\t\tuart1: uart at 00110000 {\n" - "+\t\tuart1: uart at 110000 {\n" + "-\t\tuart1: uart@00110000 {\n" + "+\t\tuart1: uart@110000 {\n" " \t\t\tdevice_type = \"serial\";\n" " \t\t\tcompatible = \"snps,dw-apb-uart\";\n" " \t\t\treg = <0x00110000 0x1000>;\n" @@ -872,8 +875,8 @@ " \t\t\tstatus = \"disabled\";\n" " \t\t};\n" " \n" - "-\t\tuart2: uart at 00120000 {\n" - "+\t\tuart2: uart at 120000 {\n" + "-\t\tuart2: uart@00120000 {\n" + "+\t\tuart2: uart@120000 {\n" " \t\t\tdevice_type = \"serial\";\n" " \t\t\tcompatible = \"snps,dw-apb-uart\";\n" " \t\t\treg = <0x00120000 0x1000>;\n" @@ -881,8 +884,8 @@ " \t\t\tstatus = \"disabled\";\n" " \t\t};\n" " \n" - "-\t\tuart3: uart at 00130000 {\n" - "+\t\tuart3: uart at 130000 {\n" + "-\t\tuart3: uart@00130000 {\n" + "+\t\tuart3: uart@130000 {\n" " \t\t\tdevice_type = \"serial\";\n" " \t\t\tcompatible = \"snps,dw-apb-uart\";\n" " \t\t\treg = <0x00130000 0x1000>;\n" @@ -890,8 +893,8 @@ " \t\t\tstatus = \"disabled\";\n" " \t\t};\n" " \n" - "-\t\tssp0: ssp at 00180000 {\n" - "+\t\tssp0: ssp at 180000 {\n" + "-\t\tssp0: ssp@00180000 {\n" + "+\t\tssp0: ssp@180000 {\n" " \t\t\tcompatible = \"arm,pl022\", \"arm,primecell\";\n" " \t\t\treg = <0x00180000 0x1000>;\n" " \t\t\tinterrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -899,8 +902,8 @@ " \t\t\tstatus = \"disabled\";\n" " \t\t};\n" " \n" - "-\t\tssp1: ssp at 00190000 {\n" - "+\t\tssp1: ssp at 190000 {\n" + "-\t\tssp1: ssp@00190000 {\n" + "+\t\tssp1: ssp@190000 {\n" " \t\t\tcompatible = \"arm,pl022\", \"arm,primecell\";\n" " \t\t\treg = <0x00190000 0x1000>;\n" " \t\t\tinterrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -908,14 +911,14 @@ " \t\t\tstatus = \"disabled\";\n" " \t\t};\n" " \n" - "-\t\thwrng: hwrng at 00220000 {\n" - "+\t\thwrng: hwrng at 220000 {\n" + "-\t\thwrng: hwrng@00220000 {\n" + "+\t\thwrng: hwrng@220000 {\n" " \t\t\tcompatible = \"brcm,iproc-rng200\";\n" " \t\t\treg = <0x00220000 0x28>;\n" " \t\t};\n" " \n" - "-\t\tdma0: dma at 00310000 {\n" - "+\t\tdma0: dma at 310000 {\n" + "-\t\tdma0: dma@00310000 {\n" + "+\t\tdma0: dma@310000 {\n" " \t\t\tcompatible = \"arm,pl330\", \"arm,primecell\";\n" " \t\t\treg = <0x00310000 0x1000>;\n" " \t\t\tinterrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>,\n" @@ -923,8 +926,8 @@ " \t\t\tiommus = <&smmu 0x6000 0x0000>;\n" " \t\t};\n" " \n" - "-\t\tenet: ethernet at 00340000{\n" - "+\t\tenet: ethernet at 340000{\n" + "-\t\tenet: ethernet@00340000{\n" + "+\t\tenet: ethernet@340000{\n" " \t\t\tcompatible = \"brcm,amac\";\n" " \t\t\treg = <0x00340000 0x1000>;\n" " \t\t\treg-names = \"amac_base\";\n" @@ -932,8 +935,8 @@ " \t\t\tstatus= \"disabled\";\n" " \t\t};\n" " \n" - "-\t\tnand: nand at 00360000 {\n" - "+\t\tnand: nand at 360000 {\n" + "-\t\tnand: nand@00360000 {\n" + "+\t\tnand: nand@360000 {\n" " \t\t\tcompatible = \"brcm,nand-iproc\", \"brcm,brcmnand-v6.1\";\n" " \t\t\treg = <0x00360000 0x600>,\n" " \t\t\t <0x0050a408 0x600>,\n" @@ -941,8 +944,8 @@ " \t\t\tstatus = \"disabled\";\n" " \t\t};\n" " \n" - "-\t\tsdio0: sdhci at 003f1000 {\n" - "+\t\tsdio0: sdhci at 3f1000 {\n" + "-\t\tsdio0: sdhci@003f1000 {\n" + "+\t\tsdio0: sdhci@3f1000 {\n" " \t\t\tcompatible = \"brcm,sdhci-iproc\";\n" " \t\t\treg = <0x003f1000 0x100>;\n" " \t\t\tinterrupts = <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -950,8 +953,8 @@ " \t\t\tstatus = \"disabled\";\n" " \t\t};\n" " \n" - "-\t\tsdio1: sdhci at 003f2000 {\n" - "+\t\tsdio1: sdhci at 3f2000 {\n" + "-\t\tsdio1: sdhci@003f2000 {\n" + "+\t\tsdio1: sdhci@3f2000 {\n" " \t\t\tcompatible = \"brcm,sdhci-iproc\";\n" " \t\t\treg = <0x003f2000 0x100>;\n" " \t\t\tinterrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -963,8 +966,8 @@ " \t\tserial1 = &uaa1;\n" " \t};\n" " \n" - "-\tmemory at 00000000 {\n" - "+\tmemory at 0 {\n" + "-\tmemory@00000000 {\n" + "+\tmemory@0 {\n" " \t\tdevice_type = \"memory\";\n" " \t\treg = <0x0 0x00000000 0x0 0x80000000>;\n" " \t};\n" @@ -976,113 +979,113 @@ " \t\t#address-cells = <2>;\n" " \t\t#size-cells = <0>;\n" " \n" - "-\t\tcpu at 000 {\n" - "+\t\tcpu at 0 {\n" + "-\t\tcpu@000 {\n" + "+\t\tcpu@0 {\n" " \t\t\tdevice_type = \"cpu\";\n" " \t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n" " \t\t\treg = <0x0 0x000>;\n" " \t\t\tenable-method = \"psci\";\n" " \t\t};\n" - "-\t\tcpu at 001 {\n" - "+\t\tcpu at 1 {\n" + "-\t\tcpu@001 {\n" + "+\t\tcpu@1 {\n" " \t\t\tdevice_type = \"cpu\";\n" " \t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n" " \t\t\treg = <0x0 0x001>;\n" " \t\t\tenable-method = \"psci\";\n" " \t\t};\n" - "-\t\tcpu at 002 {\n" - "+\t\tcpu at 2 {\n" + "-\t\tcpu@002 {\n" + "+\t\tcpu@2 {\n" " \t\t\tdevice_type = \"cpu\";\n" " \t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n" " \t\t\treg = <0x0 0x002>;\n" " \t\t\tenable-method = \"psci\";\n" " \t\t};\n" - "-\t\tcpu at 003 {\n" - "+\t\tcpu at 3 {\n" + "-\t\tcpu@003 {\n" + "+\t\tcpu@3 {\n" " \t\t\tdevice_type = \"cpu\";\n" " \t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n" " \t\t\treg = <0x0 0x003>;\n" " \t\t\tenable-method = \"psci\";\n" " \t\t};\n" - "-\t\tcpu at 004 {\n" - "+\t\tcpu at 4 {\n" + "-\t\tcpu@004 {\n" + "+\t\tcpu@4 {\n" " \t\t\tdevice_type = \"cpu\";\n" " \t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n" " \t\t\treg = <0x0 0x004>;\n" " \t\t\tenable-method = \"psci\";\n" " \t\t};\n" - "-\t\tcpu at 005 {\n" - "+\t\tcpu at 5 {\n" + "-\t\tcpu@005 {\n" + "+\t\tcpu@5 {\n" " \t\t\tdevice_type = \"cpu\";\n" " \t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n" " \t\t\treg = <0x0 0x005>;\n" " \t\t\tenable-method = \"psci\";\n" " \t\t};\n" - "-\t\tcpu at 006 {\n" - "+\t\tcpu at 6 {\n" + "-\t\tcpu@006 {\n" + "+\t\tcpu@6 {\n" " \t\t\tdevice_type = \"cpu\";\n" " \t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n" " \t\t\treg = <0x0 0x006>;\n" " \t\t\tenable-method = \"psci\";\n" " \t\t};\n" - "-\t\tcpu at 007 {\n" - "+\t\tcpu at 7 {\n" + "-\t\tcpu@007 {\n" + "+\t\tcpu@7 {\n" " \t\t\tdevice_type = \"cpu\";\n" " \t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n" " \t\t\treg = <0x0 0x007>;\n" " \t\t\tenable-method = \"psci\";\n" " \t\t};\n" - "-\t\tcpu at 008 {\n" - "+\t\tcpu at 8 {\n" + "-\t\tcpu@008 {\n" + "+\t\tcpu@8 {\n" " \t\t\tdevice_type = \"cpu\";\n" " \t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n" " \t\t\treg = <0x0 0x008>;\n" " \t\t\tenable-method = \"psci\";\n" " \t\t};\n" - "-\t\tcpu at 009 {\n" - "+\t\tcpu at 9 {\n" + "-\t\tcpu@009 {\n" + "+\t\tcpu@9 {\n" " \t\t\tdevice_type = \"cpu\";\n" " \t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n" " \t\t\treg = <0x0 0x009>;\n" " \t\t\tenable-method = \"psci\";\n" " \t\t};\n" - "-\t\tcpu at 00a {\n" - "+\t\tcpu at a {\n" + "-\t\tcpu@00a {\n" + "+\t\tcpu@a {\n" " \t\t\tdevice_type = \"cpu\";\n" " \t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n" " \t\t\treg = <0x0 0x00a>;\n" " \t\t\tenable-method = \"psci\";\n" " \t\t};\n" - "-\t\tcpu at 00b {\n" - "+\t\tcpu at b {\n" + "-\t\tcpu@00b {\n" + "+\t\tcpu@b {\n" " \t\t\tdevice_type = \"cpu\";\n" " \t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n" " \t\t\treg = <0x0 0x00b>;\n" " \t\t\tenable-method = \"psci\";\n" " \t\t};\n" - "-\t\tcpu at 00c {\n" - "+\t\tcpu at c {\n" + "-\t\tcpu@00c {\n" + "+\t\tcpu@c {\n" " \t\t\tdevice_type = \"cpu\";\n" " \t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n" " \t\t\treg = <0x0 0x00c>;\n" " \t\t\tenable-method = \"psci\";\n" " \t\t};\n" - "-\t\tcpu at 00d {\n" - "+\t\tcpu at d {\n" + "-\t\tcpu@00d {\n" + "+\t\tcpu@d {\n" " \t\t\tdevice_type = \"cpu\";\n" " \t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n" " \t\t\treg = <0x0 0x00d>;\n" " \t\t\tenable-method = \"psci\";\n" " \t\t};\n" - "-\t\tcpu at 00e {\n" - "+\t\tcpu at e {\n" + "-\t\tcpu@00e {\n" + "+\t\tcpu@e {\n" " \t\t\tdevice_type = \"cpu\";\n" " \t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n" " \t\t\treg = <0x0 0x00e>;\n" " \t\t\tenable-method = \"psci\";\n" " \t\t};\n" - "-\t\tcpu at 00f {\n" - "+\t\tcpu at f {\n" + "-\t\tcpu@00f {\n" + "+\t\tcpu@f {\n" " \t\t\tdevice_type = \"cpu\";\n" " \t\t\tcompatible = \"cavium,thunder\", \"arm,armv8\";\n" " \t\t\treg = <0x0 0x00f>;\n" @@ -1094,8 +1097,8 @@ " \tmodel = \"Hisilicon Hip05 D02 Development Board\";\n" " \tcompatible = \"hisilicon,hip05-d02\";\n" " \n" - "-\tmemory at 00000000 {\n" - "+\tmemory at 0 {\n" + "-\tmemory@00000000 {\n" + "+\tmemory@0 {\n" " \t\tdevice_type = \"memory\";\n" " \t\treg = <0x0 0x00000000 0x0 0x80000000>;\n" " \t};\n" @@ -1107,8 +1110,8 @@ " \tmodel = \"Hisilicon Hip06 D03 Development Board\";\n" " \tcompatible = \"hisilicon,hip06-d03\";\n" " \n" - "-\tmemory at 00000000 {\n" - "+\tmemory at 0 {\n" + "-\tmemory@00000000 {\n" + "+\tmemory@0 {\n" " \t\tdevice_type = \"memory\";\n" " \t\treg = <0x0 0x00000000 0x0 0x40000000>;\n" " \t};\n" @@ -1120,8 +1123,8 @@ " \t\tstdout-path = \"serial0:115200n8\";\n" " \t};\n" " \n" - "-\tmemory at 00000000 {\n" - "+\tmemory at 0 {\n" + "-\tmemory@00000000 {\n" + "+\tmemory@0 {\n" " \t\tdevice_type = \"memory\";\n" " \t\treg = <0x0 0x0 0x0 0x80000000>;\n" " \t};\n" @@ -1133,8 +1136,8 @@ " \t\tstdout-path = \"serial0:115200n8\";\n" " \t};\n" " \n" - "-\tmemory at 00000000 {\n" - "+\tmemory at 0 {\n" + "-\tmemory@00000000 {\n" + "+\tmemory@0 {\n" " \t\tdevice_type = \"memory\";\n" " \t\treg = <0x0 0x0 0x0 0x80000000>;\n" " \t};\n" @@ -1146,8 +1149,8 @@ " \t\tstdout-path = \"serial0:115200n8\";\n" " \t};\n" " \n" - "-\tmemory at 00000000 {\n" - "+\tmemory at 0 {\n" + "-\tmemory@00000000 {\n" + "+\tmemory@0 {\n" " \t\tdevice_type = \"memory\";\n" " \t\treg = <0x0 0x0 0x0 0x80000000>;\n" " \t};\n" @@ -1159,8 +1162,8 @@ " \t\tstdout-path = \"serial0:115200n8\";\n" " \t};\n" " \n" - "-\tmemory at 00000000 {\n" - "+\tmemory at 0 {\n" + "-\tmemory@00000000 {\n" + "+\tmemory@0 {\n" " \t\tdevice_type = \"memory\";\n" " \t\treg = <0x0 0x0 0x0 0x80000000>;\n" " \t};\n" @@ -1172,15 +1175,15 @@ " \t\t#address-cells = <1>;\n" " \t\t#size-cells = <0>;\n" " \n" - "-\t\tcpu at 000 {\n" - "+\t\tcpu at 0 {\n" + "-\t\tcpu@000 {\n" + "+\t\tcpu@0 {\n" " \t\t\tdevice_type = \"cpu\";\n" " \t\t\tcompatible = \"arm,cortex-a72\", \"arm,armv8\";\n" " \t\t\treg = <0x000>;\n" " \t\t\tenable-method = \"psci\";\n" " \t\t};\n" - "-\t\tcpu at 001 {\n" - "+\t\tcpu at 1 {\n" + "-\t\tcpu@001 {\n" + "+\t\tcpu@1 {\n" " \t\t\tdevice_type = \"cpu\";\n" " \t\t\tcompatible = \"arm,cortex-a72\", \"arm,armv8\";\n" " \t\t\treg = <0x001>;\n" @@ -1192,15 +1195,15 @@ " \t\t#address-cells = <1>;\n" " \t\t#size-cells = <0>;\n" " \n" - "-\t\tcpu at 000 {\n" - "+\t\tcpu at 0 {\n" + "-\t\tcpu@000 {\n" + "+\t\tcpu@0 {\n" " \t\t\tdevice_type = \"cpu\";\n" " \t\t\tcompatible = \"arm,cortex-a72\", \"arm,armv8\";\n" " \t\t\treg = <0x000>;\n" " \t\t\tenable-method = \"psci\";\n" " \t\t};\n" - "-\t\tcpu at 001 {\n" - "+\t\tcpu at 1 {\n" + "-\t\tcpu@001 {\n" + "+\t\tcpu@1 {\n" " \t\t\tdevice_type = \"cpu\";\n" " \t\t\tcompatible = \"arm,cortex-a72\", \"arm,armv8\";\n" " \t\t\treg = <0x001>;\n" @@ -1212,15 +1215,15 @@ " \t\t#size-cells = <0>;\n" " \t\tcompatible = \"marvell,armada-ap810-octa\";\n" " \n" - "-\t\tcpu at 000 {\n" - "+\t\tcpu at 0 {\n" + "-\t\tcpu@000 {\n" + "+\t\tcpu@0 {\n" " \t\t\tdevice_type = \"cpu\";\n" " \t\t\tcompatible = \"arm,cortex-a72\", \"arm,armv8\";\n" " \t\t\treg = <0x000>;\n" " \t\t\tenable-method = \"psci\";\n" " \t\t};\n" - "-\t\tcpu at 001 {\n" - "+\t\tcpu at 1 {\n" + "-\t\tcpu@001 {\n" + "+\t\tcpu@1 {\n" " \t\t\tdevice_type = \"cpu\";\n" " \t\t\tcompatible = \"arm,cortex-a72\", \"arm,armv8\";\n" " \t\t\treg = <0x001>;\n" @@ -1232,8 +1235,8 @@ " \t\t\tranges = <0 0xe80000 0x10000>;\n" " \t\t\tinterrupt-parent = <&aic>;\n" " \n" - "-\t\t\tgpio0: gpio at 0400 {\n" - "+\t\t\tgpio0: gpio at 400 {\n" + "-\t\t\tgpio0: gpio@0400 {\n" + "+\t\t\tgpio0: gpio@400 {\n" " \t\t\t\tcompatible = \"snps,dw-apb-gpio\";\n" " \t\t\t\treg = <0x0400 0x400>;\n" " \t\t\t\t#address-cells = <1>;\n" @@ -1241,8 +1244,8 @@ " \t\t\t\t};\n" " \t\t\t};\n" " \n" - "-\t\t\tgpio1: gpio at 0800 {\n" - "+\t\t\tgpio1: gpio at 800 {\n" + "-\t\t\tgpio1: gpio@0800 {\n" + "+\t\t\tgpio1: gpio@800 {\n" " \t\t\t\tcompatible = \"snps,dw-apb-gpio\";\n" " \t\t\t\treg = <0x0800 0x400>;\n" " \t\t\t\t#address-cells = <1>;\n" @@ -1250,8 +1253,8 @@ " \t\t\t\t};\n" " \t\t\t};\n" " \n" - "-\t\t\tgpio2: gpio at 0c00 {\n" - "+\t\t\tgpio2: gpio at c00 {\n" + "-\t\t\tgpio2: gpio@0c00 {\n" + "+\t\t\tgpio2: gpio@c00 {\n" " \t\t\t\tcompatible = \"snps,dw-apb-gpio\";\n" " \t\t\t\treg = <0x0c00 0x400>;\n" " \t\t\t\t#address-cells = <1>;\n" @@ -1263,8 +1266,8 @@ " \t\t\t};\n" " \t\t};\n" " \n" - "-\t\tsdhci at 07824000 {\n" - "+\t\tsdhci at 7824000 {\n" + "-\t\tsdhci@07824000 {\n" + "+\t\tsdhci@7824000 {\n" " \t\t\tvmmc-supply = <&pm8916_l8>;\n" " \t\t\tvqmmc-supply = <&pm8916_l5>;\n" " \n" @@ -1272,8 +1275,8 @@ " \t\t\tstatus = \"okay\";\n" " \t\t};\n" " \n" - "-\t\tsdhci at 07864000 {\n" - "+\t\tsdhci at 7864000 {\n" + "-\t\tsdhci@07864000 {\n" + "+\t\tsdhci@7864000 {\n" " \t\t\tvmmc-supply = <&pm8916_l11>;\n" " \t\t\tvqmmc-supply = <&pm8916_l12>;\n" " \n" @@ -1281,8 +1284,8 @@ " \t\t\t};\n" " \t\t};\n" " \n" - "-\t\tlpass at 07708000 {\n" - "+\t\tlpass at 7708000 {\n" + "-\t\tlpass@07708000 {\n" + "+\t\tlpass@7708000 {\n" " \t\t\tstatus = \"okay\";\n" " \t\t};\n" " \n" @@ -1294,36 +1297,36 @@ " \t\t\tpinctrl-1 = <&blsp2_uart2_4pins_sleep>;\n" " \t\t};\n" " \n" - "-\t\ti2c at 07577000 {\n" - "+\t\ti2c at 7577000 {\n" + "-\t\ti2c@07577000 {\n" + "+\t\ti2c@7577000 {\n" " \t\t/* On Low speed expansion */\n" " \t\t\tlabel = \"LS-I2C0\";\n" " \t\t\tstatus = \"okay\";\n" " \t\t};\n" " \n" - "-\t\ti2c at 075b6000 {\n" - "+\t\ti2c at 75b6000 {\n" + "-\t\ti2c@075b6000 {\n" + "+\t\ti2c@75b6000 {\n" " \t\t/* On Low speed expansion */\n" " \t\t\tlabel = \"LS-I2C1\";\n" " \t\t\tstatus = \"okay\";\n" " \t\t};\n" " \n" - "-\t\tspi at 07575000 {\n" - "+\t\tspi at 7575000 {\n" + "-\t\tspi@07575000 {\n" + "+\t\tspi@7575000 {\n" " \t\t/* On Low speed expansion */\n" " \t\t\tlabel = \"LS-SPI0\";\n" " \t\t\tstatus = \"okay\";\n" " \t\t};\n" " \n" - "-\t\ti2c at 075b5000 {\n" - "+\t\ti2c at 75b5000 {\n" + "-\t\ti2c@075b5000 {\n" + "+\t\ti2c@75b5000 {\n" " \t\t/* On High speed expansion */\n" " \t\t\tlabel = \"HS-I2C2\";\n" " \t\t\tstatus = \"okay\";\n" " \t\t};\n" " \n" - "-\t\tspi at 075ba000{\n" - "+\t\tspi at 75ba000{\n" + "-\t\tspi@075ba000{\n" + "+\t\tspi@75ba000{\n" " \t\t/* On High speed expansion */\n" " \t\t\tlabel = \"HS-SPI1\";\n" " \t\t\tstatus = \"okay\";\n" @@ -1335,8 +1338,8 @@ " \t\t\tstatus = \"disabled\";\n" " \t\t};\n" " \n" - "-\t\tlpass: lpass at 07708000 {\n" - "+\t\tlpass: lpass at 7708000 {\n" + "-\t\tlpass: lpass@07708000 {\n" + "+\t\tlpass: lpass@7708000 {\n" " \t\t\tstatus = \"disabled\";\n" " \t\t\tcompatible = \"qcom,lpass-cpu-apq8016\";\n" " \t\t\tclocks = <&gcc GCC_ULTAUDIO_AHBFABRIC_IXFABRIC_CLK>,\n" @@ -1344,8 +1347,8 @@ " \t\t\t#sound-dai-cells = <1>;\n" " };\n" " \n" - "-\t\tsdhc_1: sdhci at 07824000 {\n" - "+\t\tsdhc_1: sdhci at 7824000 {\n" + "-\t\tsdhc_1: sdhci@07824000 {\n" + "+\t\tsdhc_1: sdhci@7824000 {\n" " \t\t\tcompatible = \"qcom,sdhci-msm-v4\";\n" " \t\t\treg = <0x07824900 0x11c>, <0x07824000 0x800>;\n" " \t\t\treg-names = \"hc_mem\", \"core_mem\";\n" @@ -1353,8 +1356,8 @@ " \t\t\tstatus = \"disabled\";\n" " \t\t};\n" " \n" - "-\t\tsdhc_2: sdhci at 07864000 {\n" - "+\t\tsdhc_2: sdhci at 7864000 {\n" + "-\t\tsdhc_2: sdhci@07864000 {\n" + "+\t\tsdhc_2: sdhci@7864000 {\n" " \t\t\tcompatible = \"qcom,sdhci-msm-v4\";\n" " \t\t\treg = <0x07864900 0x11c>, <0x07864000 0x800>;\n" " \t\t\treg-names = \"hc_mem\", \"core_mem\";\n" @@ -1366,8 +1369,8 @@ " \t\t\t#clock-cells = <1>;\n" " \t\t};\n" " \n" - "-\t\tblsp1_spi0: spi at 07575000 {\n" - "+\t\tblsp1_spi0: spi at 7575000 {\n" + "-\t\tblsp1_spi0: spi@07575000 {\n" + "+\t\tblsp1_spi0: spi@7575000 {\n" " \t\t\tcompatible = \"qcom,spi-qup-v2.2.1\";\n" " \t\t\treg = <0x07575000 0x600>;\n" " \t\t\tinterrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -1375,8 +1378,8 @@ " \t\t\tstatus = \"disabled\";\n" " \t\t};\n" " \n" - "-\t\tblsp2_i2c0: i2c at 075b5000 {\n" - "+\t\tblsp2_i2c0: i2c at 75b5000 {\n" + "-\t\tblsp2_i2c0: i2c@075b5000 {\n" + "+\t\tblsp2_i2c0: i2c@75b5000 {\n" " \t\t\tcompatible = \"qcom,i2c-qup-v2.2.1\";\n" " \t\t\treg = <0x075b5000 0x1000>;\n" " \t\t\tinterrupts = <GIC_SPI 101 0>;\n" @@ -1384,8 +1387,8 @@ " \t\t\tstatus = \"disabled\";\n" " \t\t};\n" " \n" - "-\t\tblsp2_i2c1: i2c at 075b6000 {\n" - "+\t\tblsp2_i2c1: i2c at 75b6000 {\n" + "-\t\tblsp2_i2c1: i2c@075b6000 {\n" + "+\t\tblsp2_i2c1: i2c@75b6000 {\n" " \t\t\tcompatible = \"qcom,i2c-qup-v2.2.1\";\n" " \t\t\treg = <0x075b6000 0x1000>;\n" " \t\t\tinterrupts = <GIC_SPI 102 0>;\n" @@ -1393,8 +1396,8 @@ " \t\t\tstatus = \"disabled\";\n" " \t\t};\n" " \n" - "-\t\tblsp1_i2c2: i2c at 07577000 {\n" - "+\t\tblsp1_i2c2: i2c at 7577000 {\n" + "-\t\tblsp1_i2c2: i2c@07577000 {\n" + "+\t\tblsp1_i2c2: i2c@7577000 {\n" " \t\t\tcompatible = \"qcom,i2c-qup-v2.2.1\";\n" " \t\t\treg = <0x07577000 0x1000>;\n" " \t\t\tinterrupts = <GIC_SPI 97 0>;\n" @@ -1402,8 +1405,8 @@ " \t\t\tstatus = \"disabled\";\n" " \t\t};\n" " \n" - "-\t\tblsp2_spi5: spi at 075ba000{\n" - "+\t\tblsp2_spi5: spi at 75ba000{\n" + "-\t\tblsp2_spi5: spi@075ba000{\n" + "+\t\tblsp2_spi5: spi@75ba000{\n" " \t\t\tcompatible = \"qcom,spi-qup-v2.2.1\";\n" " \t\t\treg = <0x075ba000 0x600>;\n" " \t\t\tinterrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -1411,12 +1414,17 @@ " \t\t\t#interrupt-cells = <2>;\n" " \t\t};\n" " \n" - "-\t\ttimer at 09840000 {\n" - "+\t\ttimer at 9840000 {\n" + "-\t\ttimer@09840000 {\n" + "+\t\ttimer@9840000 {\n" " \t\t\t#address-cells = <1>;\n" " \t\t\t#size-cells = <1>;\n" " \t\t\tranges;\n" "-- \n" - 2.11.0 + "2.11.0\n" + "\n" + "--\n" + "To unsubscribe from this list: send the line \"unsubscribe devicetree\" in\n" + "the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n" + More majordomo info at http://vger.kernel.org/majordomo-info.html -e1e289aed225965782d15284d8af4c9fb8e63703e8e2e4ac8005ac1b7c75fb4b +756aaa0ea14141cd6813c18a8c0549aa27b7458980be0d83125c49875dab29cb
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