Re: Question regarding atomic ops

[James Hogan <james.hogan@mips.com>]

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On Mon, Oct 16, 2017 at 01:51:01AM -0400, Joshua Kinard wrote:
> The only uncertainty I have is the bottom of atomic_sub_if_positive and
> atomic64_sub_if_positive.  In R10000_LLSC_WAR case, the end of the assembler is:
> 
> 	  "+" GCC_OFF_SMALL_ASM() (v->counter)
> 	: "Ir" (i), GCC_OFF_SMALL_ASM() (v->counter)

The GCC_OFF_SMALL_ASM() (v->counter) input here looks redundant because
1) the output one has +, which means input and output
2) %4 is never referenced.

> 	: "memory");

To me this appears to be redundant since the only side effects are
writing to v->counter which is already an output, and in any case the
smp_mb__before_llsc() and smp_llsc_mb() imply memory clobber anyway.

> 
> While the standard case is:
> 
> 	: "=&r" (result), "=&r" (temp),
> 	  "+" GCC_OFF_SMALL_ASM() (v->counter)
> 	: "Ir" (i));

So yeh, I'd go for this unless anybody can think of a reason it wouldn't
work in the R10000_LLSC_WAR case.

Hope that helps.

Cheers
James

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