From: "Emilio G. Cota" <cota@braap.org>
To: Thomas Huth <thuth@redhat.com>
Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org,
Richard Henderson <richard.henderson@linaro.org>,
qemu-devel@nongnu.org
Subject: Re: [Qemu-arm] [Qemu-devel] [PULL 00/51] tcg queued patches
Date: Wed, 1 Nov 2017 16:36:20 -0400 [thread overview]
Message-ID: <20171101203620.GA17963@flamenco> (raw)
In-Reply-To: <4ab3bd81-925c-a281-614c-2cd87fce38b5@redhat.com>
On Wed, Nov 01, 2017 at 18:34:23 +0100, Thomas Huth wrote:
> Seems like something in this patch series broke a couple of ARM boards
> (smdkc210, nuri, raspi2, xlnx-ep108 and xlnx-zcu102). With current
> master branch, I just get this error:
>
> $ aarch64-softmmu/qemu-system-aarch64 -machine raspi2
> **
> ERROR:/home/thuth/devel/qemu/tcg/tcg.c:537:tcg_register_thread:
> assertion failed: (n < max_cpus)
> Aborted (core dumped)
>
> Could you please have a look at this?
Turns out some boards initialize a fixed number of vcpus, which
can be > max_cpus.
The below fixes the issue for me, although I'm not entirely happy
with it because if -{smp,max}_cpus < machine_class->max_cpus, some
TCG regions will be wasted. Not a huge deal (in most cases it will be
2MB per unused vCPU), but a better fix might be to just honour -max_cpus
for these boards. We might just not care enough though.
Emilio
---8<---
Subject: [PATCH] hw: define and use machine_class->max_cpus_override
max_cpus needs to be an upper bound on the number of vCPUs
initialized; otherwise TCG region initialization breaks.
Some boards initialize a hard-coded number of vCPUs; mark this
with machine_class->max_cpus_override so that max_cpus is
set to machine_class->max_cpus when set.
Update the ARM boards that hard-code max_cpus, thereby letting
them boot again.
Reported-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Emilio G. Cota <cota@braap.org>
---
hw/arm/exynos4_boards.c | 2 ++
hw/arm/raspi.c | 1 +
hw/arm/xlnx-zcu102.c | 3 +++
include/hw/boards.h | 3 ++-
vl.c | 4 ++++
5 files changed, 12 insertions(+), 1 deletion(-)
diff --git a/hw/arm/exynos4_boards.c b/hw/arm/exynos4_boards.c
index f1441ec..7071505 100644
--- a/hw/arm/exynos4_boards.c
+++ b/hw/arm/exynos4_boards.c
@@ -189,6 +189,7 @@ static void nuri_class_init(ObjectClass *oc, void *data)
mc->desc = "Samsung NURI board (Exynos4210)";
mc->init = nuri_init;
mc->max_cpus = EXYNOS4210_NCPUS;
+ mc->max_cpus_override = 1;
mc->ignore_memory_transaction_failures = true;
}
@@ -205,6 +206,7 @@ static void smdkc210_class_init(ObjectClass *oc, void *data)
mc->desc = "Samsung SMDKC210 board (Exynos4210)";
mc->init = smdkc210_init;
mc->max_cpus = EXYNOS4210_NCPUS;
+ mc->max_cpus_override = 1;
mc->ignore_memory_transaction_failures = true;
}
diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
index 5941c9f..bf4eec3 100644
--- a/hw/arm/raspi.c
+++ b/hw/arm/raspi.c
@@ -167,6 +167,7 @@ static void raspi2_machine_init(MachineClass *mc)
mc->no_floppy = 1;
mc->no_cdrom = 1;
mc->max_cpus = BCM2836_NCPUS;
+ mc->max_cpus_override = 1;
mc->default_ram_size = 1024 * 1024 * 1024;
mc->ignore_memory_transaction_failures = true;
};
diff --git a/hw/arm/xlnx-zcu102.c b/hw/arm/xlnx-zcu102.c
index e2d15a1..f7e0004 100644
--- a/hw/arm/xlnx-zcu102.c
+++ b/hw/arm/xlnx-zcu102.c
@@ -185,6 +185,8 @@ static void xlnx_ep108_machine_class_init(ObjectClass *oc, void *data)
mc->block_default_type = IF_IDE;
mc->units_per_default_bus = 1;
mc->ignore_memory_transaction_failures = true;
+ mc->max_cpus = XLNX_ZYNQMP_NUM_APU_CPUS + XLNX_ZYNQMP_NUM_RPU_CPUS;
+ mc->max_cpus_override = 1;
}
static const TypeInfo xlnx_ep108_machine_init_typeinfo = {
@@ -241,6 +243,7 @@ static void xlnx_zcu102_machine_class_init(ObjectClass *oc, void *data)
mc->units_per_default_bus = 1;
mc->ignore_memory_transaction_failures = true;
mc->max_cpus = XLNX_ZYNQMP_NUM_APU_CPUS + XLNX_ZYNQMP_NUM_RPU_CPUS;
+ mc->max_cpus_override = 1;
}
static const TypeInfo xlnx_zcu102_machine_init_typeinfo = {
diff --git a/include/hw/boards.h b/include/hw/boards.h
index 191a5b3..724be45 100644
--- a/include/hw/boards.h
+++ b/include/hw/boards.h
@@ -176,7 +176,8 @@ struct MachineClass {
no_sdcard:1,
has_dynamic_sysbus:1,
pci_allow_0_address:1,
- legacy_fw_cfg_order:1;
+ legacy_fw_cfg_order:1,
+ max_cpus_override:1;
int is_default;
const char *default_machine_opts;
const char *default_boot_order;
diff --git a/vl.c b/vl.c
index ec29909..b2f056a 100644
--- a/vl.c
+++ b/vl.c
@@ -4336,6 +4336,10 @@ int main(int argc, char **argv, char **envp)
machine_class->name, machine_class->max_cpus);
exit(1);
}
+ /* some machines initialize a hard-coded number of cpus */
+ if (machine_class->max_cpus_override) {
+ max_cpus = machine_class->max_cpus;
+ }
/*
* Get the default machine options from the machine if it is not already
--
2.7.4
WARNING: multiple messages have this Message-ID (diff)
From: "Emilio G. Cota" <cota@braap.org>
To: Thomas Huth <thuth@redhat.com>
Cc: Richard Henderson <richard.henderson@linaro.org>,
qemu-devel@nongnu.org, peter.maydell@linaro.org,
qemu-arm@nongnu.org
Subject: Re: [Qemu-devel] [PULL 00/51] tcg queued patches
Date: Wed, 1 Nov 2017 16:36:20 -0400 [thread overview]
Message-ID: <20171101203620.GA17963@flamenco> (raw)
In-Reply-To: <4ab3bd81-925c-a281-614c-2cd87fce38b5@redhat.com>
On Wed, Nov 01, 2017 at 18:34:23 +0100, Thomas Huth wrote:
> Seems like something in this patch series broke a couple of ARM boards
> (smdkc210, nuri, raspi2, xlnx-ep108 and xlnx-zcu102). With current
> master branch, I just get this error:
>
> $ aarch64-softmmu/qemu-system-aarch64 -machine raspi2
> **
> ERROR:/home/thuth/devel/qemu/tcg/tcg.c:537:tcg_register_thread:
> assertion failed: (n < max_cpus)
> Aborted (core dumped)
>
> Could you please have a look at this?
Turns out some boards initialize a fixed number of vcpus, which
can be > max_cpus.
The below fixes the issue for me, although I'm not entirely happy
with it because if -{smp,max}_cpus < machine_class->max_cpus, some
TCG regions will be wasted. Not a huge deal (in most cases it will be
2MB per unused vCPU), but a better fix might be to just honour -max_cpus
for these boards. We might just not care enough though.
Emilio
---8<---
Subject: [PATCH] hw: define and use machine_class->max_cpus_override
max_cpus needs to be an upper bound on the number of vCPUs
initialized; otherwise TCG region initialization breaks.
Some boards initialize a hard-coded number of vCPUs; mark this
with machine_class->max_cpus_override so that max_cpus is
set to machine_class->max_cpus when set.
Update the ARM boards that hard-code max_cpus, thereby letting
them boot again.
Reported-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Emilio G. Cota <cota@braap.org>
---
hw/arm/exynos4_boards.c | 2 ++
hw/arm/raspi.c | 1 +
hw/arm/xlnx-zcu102.c | 3 +++
include/hw/boards.h | 3 ++-
vl.c | 4 ++++
5 files changed, 12 insertions(+), 1 deletion(-)
diff --git a/hw/arm/exynos4_boards.c b/hw/arm/exynos4_boards.c
index f1441ec..7071505 100644
--- a/hw/arm/exynos4_boards.c
+++ b/hw/arm/exynos4_boards.c
@@ -189,6 +189,7 @@ static void nuri_class_init(ObjectClass *oc, void *data)
mc->desc = "Samsung NURI board (Exynos4210)";
mc->init = nuri_init;
mc->max_cpus = EXYNOS4210_NCPUS;
+ mc->max_cpus_override = 1;
mc->ignore_memory_transaction_failures = true;
}
@@ -205,6 +206,7 @@ static void smdkc210_class_init(ObjectClass *oc, void *data)
mc->desc = "Samsung SMDKC210 board (Exynos4210)";
mc->init = smdkc210_init;
mc->max_cpus = EXYNOS4210_NCPUS;
+ mc->max_cpus_override = 1;
mc->ignore_memory_transaction_failures = true;
}
diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
index 5941c9f..bf4eec3 100644
--- a/hw/arm/raspi.c
+++ b/hw/arm/raspi.c
@@ -167,6 +167,7 @@ static void raspi2_machine_init(MachineClass *mc)
mc->no_floppy = 1;
mc->no_cdrom = 1;
mc->max_cpus = BCM2836_NCPUS;
+ mc->max_cpus_override = 1;
mc->default_ram_size = 1024 * 1024 * 1024;
mc->ignore_memory_transaction_failures = true;
};
diff --git a/hw/arm/xlnx-zcu102.c b/hw/arm/xlnx-zcu102.c
index e2d15a1..f7e0004 100644
--- a/hw/arm/xlnx-zcu102.c
+++ b/hw/arm/xlnx-zcu102.c
@@ -185,6 +185,8 @@ static void xlnx_ep108_machine_class_init(ObjectClass *oc, void *data)
mc->block_default_type = IF_IDE;
mc->units_per_default_bus = 1;
mc->ignore_memory_transaction_failures = true;
+ mc->max_cpus = XLNX_ZYNQMP_NUM_APU_CPUS + XLNX_ZYNQMP_NUM_RPU_CPUS;
+ mc->max_cpus_override = 1;
}
static const TypeInfo xlnx_ep108_machine_init_typeinfo = {
@@ -241,6 +243,7 @@ static void xlnx_zcu102_machine_class_init(ObjectClass *oc, void *data)
mc->units_per_default_bus = 1;
mc->ignore_memory_transaction_failures = true;
mc->max_cpus = XLNX_ZYNQMP_NUM_APU_CPUS + XLNX_ZYNQMP_NUM_RPU_CPUS;
+ mc->max_cpus_override = 1;
}
static const TypeInfo xlnx_zcu102_machine_init_typeinfo = {
diff --git a/include/hw/boards.h b/include/hw/boards.h
index 191a5b3..724be45 100644
--- a/include/hw/boards.h
+++ b/include/hw/boards.h
@@ -176,7 +176,8 @@ struct MachineClass {
no_sdcard:1,
has_dynamic_sysbus:1,
pci_allow_0_address:1,
- legacy_fw_cfg_order:1;
+ legacy_fw_cfg_order:1,
+ max_cpus_override:1;
int is_default;
const char *default_machine_opts;
const char *default_boot_order;
diff --git a/vl.c b/vl.c
index ec29909..b2f056a 100644
--- a/vl.c
+++ b/vl.c
@@ -4336,6 +4336,10 @@ int main(int argc, char **argv, char **envp)
machine_class->name, machine_class->max_cpus);
exit(1);
}
+ /* some machines initialize a hard-coded number of cpus */
+ if (machine_class->max_cpus_override) {
+ max_cpus = machine_class->max_cpus;
+ }
/*
* Get the default machine options from the machine if it is not already
--
2.7.4
next prev parent reply other threads:[~2017-11-01 20:36 UTC|newest]
Thread overview: 63+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-25 9:34 [Qemu-devel] [PULL 00/51] tcg queued patches Richard Henderson
2017-10-25 9:34 ` [Qemu-devel] [PULL 01/51] tcg: Merge opcode arguments into TCGOp Richard Henderson
2017-10-25 9:34 ` [Qemu-devel] [PULL 02/51] tcg: Propagate args to op->args in optimizer Richard Henderson
2017-10-25 9:34 ` [Qemu-devel] [PULL 03/51] tcg: Propagate args to op->args in tcg.c Richard Henderson
2017-10-25 9:34 ` [Qemu-devel] [PULL 04/51] tcg: Propagate TCGOp down to allocators Richard Henderson
2017-10-25 9:34 ` [Qemu-devel] [PULL 05/51] tcg: Introduce arg_temp Richard Henderson
2017-10-25 9:34 ` [Qemu-devel] [PULL 06/51] tcg: Add temp_global bit to TCGTemp Richard Henderson
2017-10-25 9:34 ` [Qemu-devel] [PULL 07/51] tcg: Return NULL temp for TCG_CALL_DUMMY_ARG Richard Henderson
2017-10-25 9:34 ` [Qemu-devel] [PULL 08/51] tcg: Introduce temp_arg, export temp_idx Richard Henderson
2017-10-25 9:34 ` [Qemu-devel] [PULL 09/51] tcg: Use per-temp state data in liveness Richard Henderson
2017-10-25 9:34 ` [Qemu-devel] [PULL 10/51] tcg: Avoid loops against variable bounds Richard Henderson
2017-10-25 9:34 ` [Qemu-devel] [PULL 11/51] tcg: Change temp_allocate_frame arg to TCGTemp Richard Henderson
2017-10-25 9:34 ` [Qemu-devel] [PULL 12/51] tcg: Remove unused TCG_CALL_DUMMY_TCGV Richard Henderson
2017-10-25 9:34 ` [Qemu-devel] [PULL 13/51] tcg: Use per-temp state data in optimize Richard Henderson
2017-10-25 9:34 ` [Qemu-devel] [PULL 14/51] tcg: Push tcg_ctx into generator functions Richard Henderson
2017-10-25 9:34 ` [Qemu-devel] [PULL 15/51] tcg: Push tcg_ctx into tcg_gen_callN Richard Henderson
2017-10-25 9:35 ` [Qemu-devel] [PULL 16/51] tcg: Introduce tcgv_{i32, i64, ptr}_{arg, temp} Richard Henderson
2017-10-25 9:35 ` [Qemu-devel] [PULL 17/51] tcg: Introduce temp_tcgv_{i32,i64,ptr} Richard Henderson
2017-10-25 9:35 ` [Qemu-devel] [PULL 18/51] tcg: Remove GET_TCGV_* and MAKE_TCGV_* Richard Henderson
2017-10-25 9:35 ` [Qemu-devel] [PULL 19/51] tcg: Remove TCGV_EQUAL* Richard Henderson
2017-10-25 9:35 ` [Qemu-devel] [PULL 20/51] qom: Introduce CPUClass.tcg_initialize Richard Henderson
2017-10-26 12:45 ` Eduardo Habkost
2017-10-25 9:35 ` [Qemu-devel] [PULL 21/51] tcg: Use offsets not indices for TCGv_* Richard Henderson
2017-10-25 9:35 ` [Qemu-devel] [PULL 22/51] tcg: define CF_PARALLEL and use it for TB hashing along with CF_COUNT_MASK Richard Henderson
2017-10-25 9:35 ` [Qemu-devel] [PULL 23/51] tcg: Add CPUState cflags_next_tb Richard Henderson
2017-10-25 9:35 ` [Qemu-devel] [PULL 24/51] tcg: Include CF_COUNT_MASK in CF_HASH_MASK Richard Henderson
2017-10-25 9:35 ` [Qemu-devel] [PULL 25/51] tcg: convert tb->cflags reads to tb_cflags(tb) Richard Henderson
2017-10-25 9:35 ` [Qemu-devel] [PULL 26/51] target/arm: check CF_PARALLEL instead of parallel_cpus Richard Henderson
2017-10-25 9:35 ` [Qemu-devel] [PULL 27/51] target/hppa: " Richard Henderson
2017-10-25 9:35 ` [Qemu-devel] [PULL 28/51] target/i386: " Richard Henderson
2017-10-25 9:35 ` [Qemu-devel] [PULL 29/51] target/m68k: " Richard Henderson
2017-10-25 9:35 ` [Qemu-devel] [PULL 30/51] target/s390x: " Richard Henderson
2017-10-25 9:35 ` [Qemu-devel] [PULL 31/51] target/sh4: " Richard Henderson
2017-10-25 9:35 ` [Qemu-devel] [PULL 32/51] target/sparc: " Richard Henderson
2017-10-25 9:35 ` [Qemu-devel] [PULL 33/51] tcg: " Richard Henderson
2017-10-25 9:35 ` [Qemu-devel] [PULL 34/51] cpu-exec: lookup/generate TB outside exclusive region during step_atomic Richard Henderson
2017-10-25 9:35 ` [Qemu-devel] [PULL 35/51] tcg: Add CF_LAST_IO + CF_USE_ICOUNT to CF_HASH_MASK Richard Henderson
2017-10-25 9:35 ` [Qemu-devel] [PULL 36/51] tcg: Remove CF_IGNORE_ICOUNT Richard Henderson
2017-10-25 9:35 ` [Qemu-devel] [PULL 37/51] translate-all: use a binary search tree to track TBs in TBContext Richard Henderson
2017-10-25 9:35 ` [Qemu-devel] [PULL 38/51] exec-all: rename tb_free to tb_remove Richard Henderson
2017-10-25 9:35 ` [Qemu-devel] [PULL 39/51] translate-all: report correct avg host TB size Richard Henderson
2017-10-25 9:35 ` [Qemu-devel] [PULL 40/51] tcg: take tb_ctx out of TCGContext Richard Henderson
2017-10-25 9:35 ` [Qemu-devel] [PULL 41/51] tcg: define tcg_init_ctx and make tcg_ctx a pointer Richard Henderson
2017-10-25 9:35 ` [Qemu-devel] [PULL 42/51] gen-icount: fold exitreq_label into TCGContext Richard Henderson
2017-10-25 9:35 ` [Qemu-devel] [PULL 43/51] tcg: introduce **tcg_ctxs to keep track of all TCGContext's Richard Henderson
2017-10-25 9:35 ` [Qemu-devel] [PULL 44/51] tcg: distribute profiling counters across TCGContext's Richard Henderson
2017-10-25 9:35 ` [Qemu-devel] [PULL 45/51] tcg: allocate optimizer temps with tcg_malloc Richard Henderson
2017-10-25 9:35 ` [Qemu-devel] [PULL 46/51] osdep: introduce qemu_mprotect_rwx/none Richard Henderson
2017-10-25 9:35 ` [Qemu-devel] [PULL 47/51] translate-all: use qemu_protect_rwx/none helpers Richard Henderson
2017-10-25 9:35 ` [Qemu-devel] [PULL 48/51] tcg: introduce regions to split code_gen_buffer Richard Henderson
2017-10-25 9:35 ` [Qemu-devel] [PULL 49/51] tcg: enable multiple TCG contexts in softmmu Richard Henderson
2017-10-25 9:35 ` [Qemu-devel] [PULL 50/51] tcg: Initialize cpu_env generically Richard Henderson
2017-10-25 9:35 ` [Qemu-devel] [PULL 51/51] translate-all: exit from tb_phys_invalidate if qht_remove fails Richard Henderson
2017-10-25 10:33 ` [Qemu-devel] [PULL 00/51] tcg queued patches no-reply
2017-10-25 19:03 ` Peter Maydell
2017-11-01 17:34 ` [Qemu-arm] " Thomas Huth
2017-11-01 17:34 ` Thomas Huth
2017-11-01 20:36 ` Emilio G. Cota [this message]
2017-11-01 20:36 ` Emilio G. Cota
2017-11-02 13:38 ` [Qemu-arm] " Peter Maydell
2017-11-02 13:38 ` Peter Maydell
2017-11-02 19:53 ` [Qemu-arm] " Emilio G. Cota
2017-11-02 19:53 ` Emilio G. Cota
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