From: Stephen Boyd <sboyd@codeaurora.org>
To: Thierry Reding <thierry.reding@gmail.com>
Cc: Michael Turquette <mturquette@baylibre.com>,
Peter De Schrijver <pdeschrijver@nvidia.com>,
Jonathan Hunter <jonathanh@nvidia.com>,
linux-clk@vger.kernel.org, linux-tegra@vger.kernel.org
Subject: Re: [PATCH 1/4] dt-bindings: clock: tegra: Add sor1_out clock
Date: Thu, 2 Nov 2017 01:16:48 -0700 [thread overview]
Message-ID: <20171102081648.GJ11011@codeaurora.org> (raw)
In-Reply-To: <20170901145343.19890-1-thierry.reding@gmail.com>
On 09/01, Thierry Reding wrote:
> From: Thierry Reding <treding@nvidia.com>
>
> The sor1_src clock implemented on Tegra210 is modelled the wrong way
> around, which causes some issues with HDMI and DP support. This clock
> implementation is provided by BPMP on Tegra186, which models this in
> a more correct way. Since this introduces incompatibilities between
> the two SoC generations which we want to avoid, the Tegra210 will be
> fixed in subsequent patches.
>
> This change adds sor1_out as an alias for sor1_src.
>
> Signed-off-by: Thierry Reding <treding@nvidia.com>
> ---
Applied to clk-next
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
WARNING: multiple messages have this Message-ID (diff)
From: Stephen Boyd <sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
To: Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Cc: Michael Turquette
<mturquette-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>,
Peter De Schrijver
<pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>,
Jonathan Hunter
<jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>,
linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: [PATCH 1/4] dt-bindings: clock: tegra: Add sor1_out clock
Date: Thu, 2 Nov 2017 01:16:48 -0700 [thread overview]
Message-ID: <20171102081648.GJ11011@codeaurora.org> (raw)
In-Reply-To: <20170901145343.19890-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
On 09/01, Thierry Reding wrote:
> From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
>
> The sor1_src clock implemented on Tegra210 is modelled the wrong way
> around, which causes some issues with HDMI and DP support. This clock
> implementation is provided by BPMP on Tegra186, which models this in
> a more correct way. Since this introduces incompatibilities between
> the two SoC generations which we want to avoid, the Tegra210 will be
> fixed in subsequent patches.
>
> This change adds sor1_out as an alias for sor1_src.
>
> Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
> ---
Applied to clk-next
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
next prev parent reply other threads:[~2017-11-02 8:16 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-09-01 14:53 [PATCH 1/4] dt-bindings: clock: tegra: Add sor1_out clock Thierry Reding
2017-09-01 14:53 ` Thierry Reding
2017-09-01 14:53 ` [PATCH 2/4] clk: tegra: Add peripheral clock registration helper Thierry Reding
2017-11-02 8:16 ` Stephen Boyd
2017-11-02 8:16 ` Stephen Boyd
2017-09-01 14:53 ` [PATCH 3/4] clk: tegra: Use tegra_clk_register_periph_data() Thierry Reding
2017-09-01 14:53 ` Thierry Reding
2017-11-02 8:16 ` Stephen Boyd
2017-11-02 8:16 ` Stephen Boyd
2017-09-01 14:53 ` [PATCH 4/4] clk: tegra: Fix sor1_out clock implementation Thierry Reding
2017-09-01 14:53 ` Thierry Reding
2017-11-02 8:16 ` Stephen Boyd
2017-11-02 8:16 ` Stephen Boyd [this message]
2017-11-02 8:16 ` [PATCH 1/4] dt-bindings: clock: tegra: Add sor1_out clock Stephen Boyd
2017-11-02 8:46 ` Thierry Reding
2017-11-02 8:46 ` Thierry Reding
2017-11-03 15:16 ` Stephen Boyd
2017-11-03 15:16 ` Stephen Boyd
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