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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org, stable@vger.kernel.org
Subject: Re: [Intel-gfx] [PATCH v3 01/11] drm/i915: Update watermark state correctly in sanitize_watermarks
Date: Fri, 10 Nov 2017 17:28:28 +0200	[thread overview]
Message-ID: <20171110152828.GE10981@intel.com> (raw)
In-Reply-To: <20171110113503.16253-1-maarten.lankhorst@linux.intel.com>

On Fri, Nov 10, 2017 at 12:34:53PM +0100, Maarten Lankhorst wrote:
> We no longer use intel_crtc->wm.active for watermarks any more,
> which was incorrect. But this uncovered a bug in sanitize_watermarks(),
> which meant that we wrote the correct watermarks, but the next
> update would still use the wrong hw watermarks for calculating.
> This caused all further updates to fail with -EINVAL and the
> log would reveal an error like the one below:
> 
> [   10.043902] [drm:ilk_validate_wm_level.part.8 [i915]] Sprite WM0 too large 56 (max 0)
> [   10.043960] [drm:ilk_validate_pipe_wm [i915]] LP0 watermark invalid
> [   10.044030] [drm:intel_crtc_atomic_check [i915]] No valid intermediate pipe watermarks are possible
> 
> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> Fixes: b6b178a77210 ("drm/i915: Calculate ironlake intermediate watermarks correctly, v2.")
> Cc: stable@vger.kernel.org #v4.8+
> ---
>  drivers/gpu/drm/i915/intel_display.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 84817ccc5305..17665ee06c9a 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -14442,6 +14442,8 @@ static void sanitize_watermarks(struct drm_device *dev)
>  
>  		cs->wm.need_postvbl_update = true;
>  		dev_priv->display.optimize_watermarks(intel_state, cs);
> +
> +		to_intel_crtc_state(crtc->state)->wm = cs->wm;

Hmm. Oh we don't swap the state here. Looks like we shouldn't be using
anything else from the crtc state, so this should work AFAICS.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

>  	}
>  
>  put_state:
> -- 
> 2.15.0
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel OTC

WARNING: multiple messages have this Message-ID (diff)
From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org, stable@vger.kernel.org
Subject: Re: [Intel-gfx] [PATCH v3 01/11] drm/i915: Update watermark state correctly in sanitize_watermarks
Date: Fri, 10 Nov 2017 17:28:28 +0200	[thread overview]
Message-ID: <20171110152828.GE10981@intel.com> (raw)
In-Reply-To: <20171110113503.16253-1-maarten.lankhorst@linux.intel.com>

On Fri, Nov 10, 2017 at 12:34:53PM +0100, Maarten Lankhorst wrote:
> We no longer use intel_crtc->wm.active for watermarks any more,
> which was incorrect. But this uncovered a bug in sanitize_watermarks(),
> which meant that we wrote the correct watermarks, but the next
> update would still use the wrong hw watermarks for calculating.
> This caused all further updates to fail with -EINVAL and the
> log would reveal an error like the one below:
> 
> [   10.043902] [drm:ilk_validate_wm_level.part.8 [i915]] Sprite WM0 too large 56 (max 0)
> [   10.043960] [drm:ilk_validate_pipe_wm [i915]] LP0 watermark invalid
> [   10.044030] [drm:intel_crtc_atomic_check [i915]] No valid intermediate pipe watermarks are possible
> 
> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> Fixes: b6b178a77210 ("drm/i915: Calculate ironlake intermediate watermarks correctly, v2.")
> Cc: stable@vger.kernel.org #v4.8+
> ---
>  drivers/gpu/drm/i915/intel_display.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 84817ccc5305..17665ee06c9a 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -14442,6 +14442,8 @@ static void sanitize_watermarks(struct drm_device *dev)
>  
>  		cs->wm.need_postvbl_update = true;
>  		dev_priv->display.optimize_watermarks(intel_state, cs);
> +
> +		to_intel_crtc_state(crtc->state)->wm = cs->wm;

Hmm. Oh we don't swap the state here. Looks like we shouldn't be using
anything else from the crtc state, so this should work AFAICS.

Reviewed-by: Ville Syrj�l� <ville.syrjala@linux.intel.com>

>  	}
>  
>  put_state:
> -- 
> 2.15.0
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrj�l�
Intel OTC

  parent reply	other threads:[~2017-11-10 15:28 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-11-10 11:34 [PATCH v3 01/11] drm/i915: Update watermark state correctly in sanitize_watermarks Maarten Lankhorst
2017-11-10 11:34 ` [PATCH v3 02/11] drm/i915: Remove bogus ips_enabled check Maarten Lankhorst
2017-11-10 12:57   ` Daniel Vetter
2017-11-13 17:19     ` Ville Syrjälä
2017-11-10 11:34 ` [PATCH v3 03/11] drm/i915: Check boolean options in intel_pipe_config_compare with its own macro Maarten Lankhorst
2017-11-10 12:58   ` Daniel Vetter
2017-11-10 11:34 ` [PATCH v3 04/11] drm/i915: Handle adjust better in intel_pipe_config_compare Maarten Lankhorst
2017-11-10 13:02   ` Daniel Vetter
2017-11-13 17:24     ` Ville Syrjälä
2017-11-20 10:38       ` Daniel Vetter
2017-11-20 10:53         ` Ville Syrjälä
2017-11-20 12:54           ` Daniel Vetter
2017-11-10 11:34 ` [PATCH v3 05/11] drm/i915: Only enable IPS when primary plane is visible Maarten Lankhorst
2017-11-10 13:05   ` Daniel Vetter
2017-11-10 11:34 ` [PATCH v3 06/11] drm/i915: Handle locking better in i915_sink_crc Maarten Lankhorst
2017-11-10 13:13   ` Daniel Vetter
2017-11-10 13:24     ` Daniel Vetter
2017-11-13 12:05       ` Maarten Lankhorst
2017-11-10 11:34 ` [PATCH v3 07/11] drm/i915: Pass idle crtc_state to intel_dp_sink_crc Maarten Lankhorst
2017-11-13 17:17   ` Ville Syrjälä
2017-11-10 11:35 ` [PATCH v3 08/11] drm/i915: Pass crtc_state to ips toggle functions, v2 Maarten Lankhorst
2017-11-13 17:18   ` Ville Syrjälä
2017-11-17 11:21     ` Maarten Lankhorst
2017-11-10 11:35 ` [PATCH v3 09/11] drm/i915: Handle ips_enabled in fastset, v2 Maarten Lankhorst
2017-11-10 13:15   ` Daniel Vetter
2017-11-10 20:06     ` Ville Syrjälä
2017-11-10 11:35 ` [PATCH v3 10/11] drm/i915: Enable FIFO underrun reporting after initial fastset, v3 Maarten Lankhorst
2017-11-10 13:58   ` Daniel Vetter
2017-11-10 19:48   ` Ville Syrjälä
2017-11-13 12:01     ` Maarten Lankhorst
2017-11-13 13:19       ` Ville Syrjälä
2017-11-13 14:40     ` [PATCH] drm/i915: Enable FIFO underrun reporting after initial fastset, v4 Maarten Lankhorst
2017-11-13 14:49       ` Ville Syrjälä
2017-11-10 11:35 ` [PATCH v3 11/11] drm/i915: Re-enable fastboot by default Maarten Lankhorst
2017-11-10 12:30 ` ✓ Fi.CI.BAT: success for series starting with [v3,01/11] drm/i915: Update watermark state correctly in sanitize_watermarks Patchwork
2017-11-10 13:48 ` ✓ Fi.CI.IGT: " Patchwork
2017-11-10 15:28 ` Ville Syrjälä [this message]
2017-11-10 15:28   ` [Intel-gfx] [PATCH v3 01/11] " Ville Syrjälä
2017-11-11 14:14   ` Maarten Lankhorst
2017-11-13 14:52 ` ✗ Fi.CI.BAT: failure for series starting with [v3,01/11] drm/i915: Update watermark state correctly in sanitize_watermarks (rev2) Patchwork
2017-11-13 15:21 ` Patchwork

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