[RESEND PATCH] ARM: dts: ls1021a: Add support for QSPI with ls1021a SoC

[RESEND PATCH] ARM: dts: ls1021a: Add support for QSPI with ls1021a SoC

[SZ Lin]

Add QSPI node support, and this function is disabled by default
This setting could be overwritten in board-level definitions

Signed-off-by: SZ Lin <sz.lin@moxa.com>
---
 arch/arm/boot/dts/ls1021a.dtsi | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index 7bb9df2c1460..9da876e47810 100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -154,6 +154,20 @@
 			big-endian;
 		};
 
+		qspi: quadspi at 1550000 {
+			compatible = "fsl,ls1021a-qspi";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x0 0x1550000 0x0 0x10000>,
+			      <0x0 0x40000000 0x0 0x40000000>;
+			reg-names = "QuadSPI", "QuadSPI-memory";
+			interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
+			clock-names = "qspi_en", "qspi";
+			clocks = <&clockgen 4 1>, <&clockgen 4 1>;
+			big-endian;
+			status = "disabled";
+		};
+
 		esdhc: esdhc at 1560000 {
 			compatible = "fsl,esdhc";
 			reg = <0x0 0x1560000 0x0 0x10000>;
-- 
2.14.1

[RESEND PATCH] ARM: dts: ls1021a: Add support for QSPI with ls1021a SoC

[SZ Lin]

Add QSPI node support, and this function is disabled by default
This setting could be overwritten in board-level definitions

Signed-off-by: SZ Lin <sz.lin@moxa.com>
---
 arch/arm/boot/dts/ls1021a.dtsi | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index 7bb9df2c1460..9da876e47810 100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -154,6 +154,20 @@
 			big-endian;
 		};
 
+		qspi: quadspi@1550000 {
+			compatible = "fsl,ls1021a-qspi";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x0 0x1550000 0x0 0x10000>,
+			      <0x0 0x40000000 0x0 0x40000000>;
+			reg-names = "QuadSPI", "QuadSPI-memory";
+			interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
+			clock-names = "qspi_en", "qspi";
+			clocks = <&clockgen 4 1>, <&clockgen 4 1>;
+			big-endian;
+			status = "disabled";
+		};
+
 		esdhc: esdhc@1560000 {
 			compatible = "fsl,esdhc";
 			reg = <0x0 0x1560000 0x0 0x10000>;
-- 
2.14.1

[RESEND PATCH] ARM: dts: ls1021a: Add support for QSPI with ls1021a SoC

[SZ Lin]

Add QSPI node support, and this function is disabled by default
This setting could be overwritten in board-level definitions

Signed-off-by: SZ Lin <sz.lin@moxa.com>
---
 arch/arm/boot/dts/ls1021a.dtsi | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index 7bb9df2c1460..9da876e47810 100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -154,6 +154,20 @@
 			big-endian;
 		};
 
+		qspi: quadspi@1550000 {
+			compatible = "fsl,ls1021a-qspi";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x0 0x1550000 0x0 0x10000>,
+			      <0x0 0x40000000 0x0 0x40000000>;
+			reg-names = "QuadSPI", "QuadSPI-memory";
+			interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
+			clock-names = "qspi_en", "qspi";
+			clocks = <&clockgen 4 1>, <&clockgen 4 1>;
+			big-endian;
+			status = "disabled";
+		};
+
 		esdhc: esdhc@1560000 {
 			compatible = "fsl,esdhc";
 			reg = <0x0 0x1560000 0x0 0x10000>;
-- 
2.14.1

[RESEND PATCH] ARM: dts: ls1021a: Add support for QSPI with ls1021a SoC

[SZ Lin (林上智)]

> Add QSPI node support, and this function is disabled by default This setting could be overwritten > in board-level definitions
> 
> Signed-off-by: SZ Lin <sz.lin@moxa.com>
> ---

This is a resend patch [1]. Any feedback would be greatly appreciated!

ref:
[1]: https://patchwork.kernel.org/patch/9889431/

Best regards,
SZ Lin

RE: [RESEND PATCH] ARM: dts: ls1021a: Add support for QSPI with ls1021a SoC

[SZ Lin (林上智)]

> Add QSPI node support, and this function is disabled by default This setting could be overwritten > in board-level definitions
> 
> Signed-off-by: SZ Lin <sz.lin@moxa.com>
> ---

This is a resend patch [1]. Any feedback would be greatly appreciated!

ref:
[1]: https://patchwork.kernel.org/patch/9889431/

Best regards,
SZ Lin

RE: [RESEND PATCH] ARM: dts: ls1021a: Add support for QSPI with ls1021a SoC

[SZ Lin (林上智)]

> Add QSPI node support, and this function is disabled by default This setting could be overwritten > in board-level definitions
> 
> Signed-off-by: SZ Lin <sz.lin@moxa.com>
> ---

This is a resend patch [1]. Any feedback would be greatly appreciated!

ref:
[1]: https://patchwork.kernel.org/patch/9889431/

Best regards,
SZ Lin

[RESEND PATCH] ARM: dts: ls1021a: Add support for QSPI with ls1021a SoC

[Li Yang]

On Tue, Sep 12, 2017 at 1:49 AM, SZ Lin <sz.lin@moxa.com> wrote:
> Add QSPI node support, and this function is disabled by default
> This setting could be overwritten in board-level definitions

Adding Shawn Guo.

>
> Signed-off-by: SZ Lin <sz.lin@moxa.com>

Acked-by: Li Yang <leoyang.li@nxp.com>

> ---
>  arch/arm/boot/dts/ls1021a.dtsi | 14 ++++++++++++++
>  1 file changed, 14 insertions(+)
>
> diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
> index 7bb9df2c1460..9da876e47810 100644
> --- a/arch/arm/boot/dts/ls1021a.dtsi
> +++ b/arch/arm/boot/dts/ls1021a.dtsi
> @@ -154,6 +154,20 @@
>                         big-endian;
>                 };
>
> +               qspi: quadspi at 1550000 {
> +                       compatible = "fsl,ls1021a-qspi";
> +                       #address-cells = <1>;
> +                       #size-cells = <0>;
> +                       reg = <0x0 0x1550000 0x0 0x10000>,
> +                             <0x0 0x40000000 0x0 0x40000000>;
> +                       reg-names = "QuadSPI", "QuadSPI-memory";
> +                       interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
> +                       clock-names = "qspi_en", "qspi";
> +                       clocks = <&clockgen 4 1>, <&clockgen 4 1>;
> +                       big-endian;
> +                       status = "disabled";
> +               };
> +
>                 esdhc: esdhc at 1560000 {
>                         compatible = "fsl,esdhc";
>                         reg = <0x0 0x1560000 0x0 0x10000>;
> --
> 2.14.1
>
> --
> To unsubscribe from this list: send the line "unsubscribe devicetree" in
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> More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [RESEND PATCH] ARM: dts: ls1021a: Add support for QSPI with ls1021a SoC

[Li Yang]

On Tue, Sep 12, 2017 at 1:49 AM, SZ Lin <sz.lin-D4fb9hXD9d4@public.gmane.org> wrote:
> Add QSPI node support, and this function is disabled by default
> This setting could be overwritten in board-level definitions

Adding Shawn Guo.

>
> Signed-off-by: SZ Lin <sz.lin-D4fb9hXD9d4@public.gmane.org>

Acked-by: Li Yang <leoyang.li-3arQi8VN3Tc@public.gmane.org>

> ---
>  arch/arm/boot/dts/ls1021a.dtsi | 14 ++++++++++++++
>  1 file changed, 14 insertions(+)
>
> diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
> index 7bb9df2c1460..9da876e47810 100644
> --- a/arch/arm/boot/dts/ls1021a.dtsi
> +++ b/arch/arm/boot/dts/ls1021a.dtsi
> @@ -154,6 +154,20 @@
>                         big-endian;
>                 };
>
> +               qspi: quadspi@1550000 {
> +                       compatible = "fsl,ls1021a-qspi";
> +                       #address-cells = <1>;
> +                       #size-cells = <0>;
> +                       reg = <0x0 0x1550000 0x0 0x10000>,
> +                             <0x0 0x40000000 0x0 0x40000000>;
> +                       reg-names = "QuadSPI", "QuadSPI-memory";
> +                       interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
> +                       clock-names = "qspi_en", "qspi";
> +                       clocks = <&clockgen 4 1>, <&clockgen 4 1>;
> +                       big-endian;
> +                       status = "disabled";
> +               };
> +
>                 esdhc: esdhc@1560000 {
>                         compatible = "fsl,esdhc";
>                         reg = <0x0 0x1560000 0x0 0x10000>;
> --
> 2.14.1
>
> --
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> the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
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Re: [RESEND PATCH] ARM: dts: ls1021a: Add support for QSPI with ls1021a SoC

[Li Yang]

On Tue, Sep 12, 2017 at 1:49 AM, SZ Lin <sz.lin@moxa.com> wrote:
> Add QSPI node support, and this function is disabled by default
> This setting could be overwritten in board-level definitions

Adding Shawn Guo.

>
> Signed-off-by: SZ Lin <sz.lin@moxa.com>

Acked-by: Li Yang <leoyang.li@nxp.com>

> ---
>  arch/arm/boot/dts/ls1021a.dtsi | 14 ++++++++++++++
>  1 file changed, 14 insertions(+)
>
> diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
> index 7bb9df2c1460..9da876e47810 100644
> --- a/arch/arm/boot/dts/ls1021a.dtsi
> +++ b/arch/arm/boot/dts/ls1021a.dtsi
> @@ -154,6 +154,20 @@
>                         big-endian;
>                 };
>
> +               qspi: quadspi@1550000 {
> +                       compatible = "fsl,ls1021a-qspi";
> +                       #address-cells = <1>;
> +                       #size-cells = <0>;
> +                       reg = <0x0 0x1550000 0x0 0x10000>,
> +                             <0x0 0x40000000 0x0 0x40000000>;
> +                       reg-names = "QuadSPI", "QuadSPI-memory";
> +                       interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
> +                       clock-names = "qspi_en", "qspi";
> +                       clocks = <&clockgen 4 1>, <&clockgen 4 1>;
> +                       big-endian;
> +                       status = "disabled";
> +               };
> +
>                 esdhc: esdhc@1560000 {
>                         compatible = "fsl,esdhc";
>                         reg = <0x0 0x1560000 0x0 0x10000>;
> --
> 2.14.1
>
> --
> To unsubscribe from this list: send the line "unsubscribe devicetree" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html

[RESEND PATCH] ARM: dts: ls1021a: Add support for QSPI with ls1021a SoC

[Shawn Guo]

On Wed, Oct 25, 2017 at 04:00:36PM -0500, Li Yang wrote:
> On Tue, Sep 12, 2017 at 1:49 AM, SZ Lin <sz.lin@moxa.com> wrote:
> > Add QSPI node support, and this function is disabled by default
> > This setting could be overwritten in board-level definitions
> 
> Adding Shawn Guo.
> 
> >
> > Signed-off-by: SZ Lin <sz.lin@moxa.com>
> 
> Acked-by: Li Yang <leoyang.li@nxp.com>

Applied, thanks.

Re: [RESEND PATCH] ARM: dts: ls1021a: Add support for QSPI with ls1021a SoC

[Shawn Guo]

On Wed, Oct 25, 2017 at 04:00:36PM -0500, Li Yang wrote:
> On Tue, Sep 12, 2017 at 1:49 AM, SZ Lin <sz.lin-D4fb9hXD9d4@public.gmane.org> wrote:
> > Add QSPI node support, and this function is disabled by default
> > This setting could be overwritten in board-level definitions
> 
> Adding Shawn Guo.
> 
> >
> > Signed-off-by: SZ Lin <sz.lin-D4fb9hXD9d4@public.gmane.org>
> 
> Acked-by: Li Yang <leoyang.li-3arQi8VN3Tc@public.gmane.org>

Applied, thanks.
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Re: [RESEND PATCH] ARM: dts: ls1021a: Add support for QSPI with ls1021a SoC

[Shawn Guo]

On Wed, Oct 25, 2017 at 04:00:36PM -0500, Li Yang wrote:
> On Tue, Sep 12, 2017 at 1:49 AM, SZ Lin <sz.lin@moxa.com> wrote:
> > Add QSPI node support, and this function is disabled by default
> > This setting could be overwritten in board-level definitions
> 
> Adding Shawn Guo.
> 
> >
> > Signed-off-by: SZ Lin <sz.lin@moxa.com>
> 
> Acked-by: Li Yang <leoyang.li@nxp.com>

Applied, thanks.