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From: Mika Westerberg <mika.westerberg@linux.intel.com>
To: Chris Chiu <chiu@endlessm.com>
Cc: Daniel Drake <drake@endlessm.com>,
	heikki.krogerus@linux.intel.com, linux-gpio@vger.kernel.org,
	Linux Kernel <linux-kernel@vger.kernel.org>,
	Endless Linux Upstreaming Team <linux@endlessm.com>,
	Jarkko Nikula <jarkko.nikula@linux.intel.com>
Subject: Re: intel-gpio interrupts stop firing with Focaltech I2C-HID touchpad
Date: Fri, 17 Nov 2017 15:52:25 +0200	[thread overview]
Message-ID: <20171117135225.GG17200@lahna.fi.intel.com> (raw)
In-Reply-To: <20171117133518.GF17200@lahna.fi.intel.com>

On Fri, Nov 17, 2017 at 03:35:18PM +0200, Mika Westerberg wrote:
> > pin 18 (GPIO_18) GPIO 0x40900100 0x00024075

Hmm,

If I decode 0x40900100 correctly PADCFG0_GPIROUTIOXAPIC (BIT 20) flag is
set for the pin. This means the interrupt is routed to IO-APIC instead.

Now, we do clear that flag along with the others when the GPIO is
requested through gpio_request() but in this case we go through irqchip
instead so the flag is not cleared.

I wonder if the following patch changes anything?

diff --git a/drivers/pinctrl/intel/pinctrl-intel.c b/drivers/pinctrl/intel/pinctrl-intel.c
index 71df0f70b61f..06af096f5768 100644
--- a/drivers/pinctrl/intel/pinctrl-intel.c
+++ b/drivers/pinctrl/intel/pinctrl-intel.c
@@ -939,6 +939,10 @@ static int intel_gpio_irq_type(struct irq_data *d, unsigned type)
 
 	value &= ~(PADCFG0_RXEVCFG_MASK | PADCFG0_RXINV);
 
+	/* Disable SCI/SMI/NMI generation */
+	value &= ~(PADCFG0_GPIROUTIOXAPIC | PADCFG0_GPIROUTSCI);
+	value &= ~(PADCFG0_GPIROUTSMI | PADCFG0_GPIROUTNMI);
+
 	if ((type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) {
 		value |= PADCFG0_RXEVCFG_EDGE_BOTH << PADCFG0_RXEVCFG_SHIFT;
 	} else if (type & IRQ_TYPE_EDGE_FALLING) {

  reply	other threads:[~2017-11-17 13:52 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-11-16 11:38 intel-gpio interrupts stop firing with Focaltech I2C-HID touchpad Daniel Drake
2017-11-16 11:52 ` Mika Westerberg
2017-11-16 12:01   ` Daniel Drake
2017-11-16 13:07     ` Mika Westerberg
2017-11-17  8:27       ` Chris Chiu
2017-11-17  8:50         ` Chris Chiu
2017-11-17  9:11         ` Mika Westerberg
2017-11-17  9:13           ` Chris Chiu
2017-11-17 10:01             ` Chris Chiu
2017-11-17 11:00               ` Mika Westerberg
2017-11-17 13:21                 ` Chris Chiu
2017-11-17 13:35                   ` Mika Westerberg
2017-11-17 13:52                     ` Mika Westerberg [this message]
2017-11-20  5:18                       ` Chris Chiu
2017-11-20 10:32                         ` Mika Westerberg

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