* [PATCH] drm/915/psr: Set psr.source_ok during atomic_check
@ 2017-12-13 0:59 Dhinakaran Pandiyan
2017-12-13 1:28 ` ✓ Fi.CI.BAT: success for " Patchwork
` (2 more replies)
0 siblings, 3 replies; 5+ messages in thread
From: Dhinakaran Pandiyan @ 2017-12-13 0:59 UTC (permalink / raw)
To: intel-gfx; +Cc: Dhinakaran Pandiyan, Rodrigo Vivi
Since commit 4d90f2d507ab ("drm/i915: Start tracking PSR state in crtc
state"), we check whether PSR can be enabled or not in
psr_compute_config(). Given that the psr.source_ok field is supposed to
track this check, set the field in psr_compute_config() as well.
Now tests can distinguish between PSR not enabled due to unmet mode
requirements and something going wrong during commit.
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
---
drivers/gpu/drm/i915/intel_psr.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index a1ad85fa5c1a..b59a956047ff 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -358,6 +358,8 @@ void intel_psr_compute_config(struct intel_dp *intel_dp,
&crtc_state->base.adjusted_mode;
int psr_setup_time;
+ dev_priv->psr.source_ok = false;
+
if (!HAS_PSR(dev_priv))
return;
@@ -420,7 +422,7 @@ void intel_psr_compute_config(struct intel_dp *intel_dp,
* caps during eDP detection.
*/
if (!dev_priv->psr.psr2_support) {
- crtc_state->has_psr = true;
+ dev_priv->psr.source_ok = (crtc_state->has_psr = true);
return;
}
@@ -440,7 +442,7 @@ void intel_psr_compute_config(struct intel_dp *intel_dp,
return;
}
- crtc_state->has_psr = true;
+ dev_priv->psr.source_ok = (crtc_state->has_psr = true);
crtc_state->has_psr2 = true;
}
@@ -522,8 +524,6 @@ void intel_psr_enable(struct intel_dp *intel_dp,
}
dev_priv->psr.psr2_support = crtc_state->has_psr2;
- dev_priv->psr.source_ok = true;
-
dev_priv->psr.busy_frontbuffer_bits = 0;
dev_priv->psr.setup_vsc(intel_dp, crtc_state);
@@ -657,7 +657,7 @@ void intel_psr_disable(struct intel_dp *intel_dp,
/* Disable PSR on Sink */
drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG, 0);
- dev_priv->psr.enabled = NULL;
+ dev_priv->psr.source_ok = (dev_priv->psr.enabled = NULL);
mutex_unlock(&dev_priv->psr.lock);
cancel_delayed_work_sync(&dev_priv->psr.work);
--
2.11.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 5+ messages in thread* ✓ Fi.CI.BAT: success for drm/915/psr: Set psr.source_ok during atomic_check 2017-12-13 0:59 [PATCH] drm/915/psr: Set psr.source_ok during atomic_check Dhinakaran Pandiyan @ 2017-12-13 1:28 ` Patchwork 2017-12-13 2:15 ` ✓ Fi.CI.IGT: " Patchwork 2017-12-14 15:06 ` [PATCH] " Ville Syrjälä 2 siblings, 0 replies; 5+ messages in thread From: Patchwork @ 2017-12-13 1:28 UTC (permalink / raw) To: Dhinakaran Pandiyan; +Cc: intel-gfx == Series Details == Series: drm/915/psr: Set psr.source_ok during atomic_check URL : https://patchwork.freedesktop.org/series/35259/ State : success == Summary == Series 35259v1 drm/915/psr: Set psr.source_ok during atomic_check https://patchwork.freedesktop.org/api/1.0/series/35259/revisions/1/mbox/ Test kms_pipe_crc_basic: Subgroup suspend-read-crc-pipe-a: pass -> DMESG-WARN (fi-kbl-r) fdo#104172 +1 Subgroup suspend-read-crc-pipe-b: pass -> INCOMPLETE (fi-snb-2520m) fdo#103713 fdo#104172 https://bugs.freedesktop.org/show_bug.cgi?id=104172 fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713 fi-bdw-5557u total:288 pass:267 dwarn:0 dfail:0 fail:0 skip:21 time:435s fi-bdw-gvtdvm total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:439s fi-blb-e6850 total:288 pass:223 dwarn:1 dfail:0 fail:0 skip:64 time:385s fi-bsw-n3050 total:288 pass:242 dwarn:0 dfail:0 fail:0 skip:46 time:515s fi-bwr-2160 total:288 pass:183 dwarn:0 dfail:0 fail:0 skip:105 time:278s fi-bxt-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:503s fi-bxt-j4205 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:503s fi-byt-j1900 total:288 pass:253 dwarn:0 dfail:0 fail:0 skip:35 time:490s fi-byt-n2820 total:288 pass:249 dwarn:0 dfail:0 fail:0 skip:39 time:467s fi-elk-e7500 total:224 pass:163 dwarn:15 dfail:0 fail:0 skip:45 fi-gdg-551 total:288 pass:179 dwarn:1 dfail:0 fail:0 skip:108 time:267s fi-glk-1 total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:538s fi-hsw-4770 total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:373s fi-hsw-4770r total:288 pass:224 dwarn:0 dfail:0 fail:0 skip:64 time:260s fi-ilk-650 total:288 pass:228 dwarn:0 dfail:0 fail:0 skip:60 time:391s fi-ivb-3520m total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:471s fi-ivb-3770 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:444s fi-kbl-7500u total:288 pass:263 dwarn:1 dfail:0 fail:0 skip:24 time:481s fi-kbl-7560u total:288 pass:269 dwarn:0 dfail:0 fail:0 skip:19 time:526s fi-kbl-7567u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:473s fi-kbl-r total:288 pass:260 dwarn:1 dfail:0 fail:0 skip:27 time:527s fi-pnv-d510 total:288 pass:222 dwarn:1 dfail:0 fail:0 skip:65 time:586s fi-skl-6260u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:452s fi-skl-6600u total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:539s fi-skl-6700hq total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:566s fi-skl-6700k total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:515s fi-skl-6770hq total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:502s fi-skl-gvtdvm total:288 pass:265 dwarn:0 dfail:0 fail:0 skip:23 time:455s fi-snb-2520m total:245 pass:211 dwarn:0 dfail:0 fail:0 skip:33 fi-snb-2600 total:288 pass:248 dwarn:0 dfail:0 fail:0 skip:40 time:417s Blacklisted hosts: fi-cfl-s2 total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:598s fi-cnl-y total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:615s fi-glk-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:489s 8874c0f95698c533c0daf69c6c41834d837fef87 drm-tip: 2017y-12m-12d-21h-34m-33s UTC integration manifest 33236155568c drm/915/psr: Set psr.source_ok during atomic_check == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7478/issues.html _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 5+ messages in thread
* ✓ Fi.CI.IGT: success for drm/915/psr: Set psr.source_ok during atomic_check 2017-12-13 0:59 [PATCH] drm/915/psr: Set psr.source_ok during atomic_check Dhinakaran Pandiyan 2017-12-13 1:28 ` ✓ Fi.CI.BAT: success for " Patchwork @ 2017-12-13 2:15 ` Patchwork 2017-12-14 15:06 ` [PATCH] " Ville Syrjälä 2 siblings, 0 replies; 5+ messages in thread From: Patchwork @ 2017-12-13 2:15 UTC (permalink / raw) To: Dhinakaran Pandiyan; +Cc: intel-gfx == Series Details == Series: drm/915/psr: Set psr.source_ok during atomic_check URL : https://patchwork.freedesktop.org/series/35259/ State : success == Summary == Test kms_frontbuffer_tracking: Subgroup fbc-1p-offscren-pri-shrfb-draw-blt: pass -> FAIL (shard-snb) fdo#101623 Test gem_tiled_swapping: Subgroup non-threaded: incomplete -> PASS (shard-snb) fdo#104009 Test gem_pwrite: Subgroup huge-gtt-backwards: incomplete -> PASS (shard-hsw) fdo#101623 https://bugs.freedesktop.org/show_bug.cgi?id=101623 fdo#104009 https://bugs.freedesktop.org/show_bug.cgi?id=104009 shard-hsw total:2636 pass:1496 dwarn:1 dfail:0 fail:10 skip:1129 time:9259s shard-snb total:2712 pass:1309 dwarn:1 dfail:0 fail:12 skip:1390 time:8096s Blacklisted hosts: shard-apl total:2690 pass:1665 dwarn:1 dfail:0 fail:22 skip:1001 time:13494s shard-kbl total:2656 pass:1762 dwarn:7 dfail:2 fail:21 skip:863 time:10697s == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7478/shards.html _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] drm/915/psr: Set psr.source_ok during atomic_check 2017-12-13 0:59 [PATCH] drm/915/psr: Set psr.source_ok during atomic_check Dhinakaran Pandiyan 2017-12-13 1:28 ` ✓ Fi.CI.BAT: success for " Patchwork 2017-12-13 2:15 ` ✓ Fi.CI.IGT: " Patchwork @ 2017-12-14 15:06 ` Ville Syrjälä 2017-12-14 19:50 ` Pandiyan, Dhinakaran 2 siblings, 1 reply; 5+ messages in thread From: Ville Syrjälä @ 2017-12-14 15:06 UTC (permalink / raw) To: Dhinakaran Pandiyan; +Cc: intel-gfx, Rodrigo Vivi On Tue, Dec 12, 2017 at 04:59:34PM -0800, Dhinakaran Pandiyan wrote: > Since commit 4d90f2d507ab ("drm/i915: Start tracking PSR state in crtc > state"), we check whether PSR can be enabled or not in > psr_compute_config(). Given that the psr.source_ok field is supposed to > track this check, set the field in psr_compute_config() as well. NAK. compute_config() isn't allowed to change global state since the modeset can still fail later, or this might in fact be a TEST_ONLY operation. > > Now tests can distinguish between PSR not enabled due to unmet mode > requirements and something going wrong during commit. > > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> > --- > drivers/gpu/drm/i915/intel_psr.c | 10 +++++----- > 1 file changed, 5 insertions(+), 5 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c > index a1ad85fa5c1a..b59a956047ff 100644 > --- a/drivers/gpu/drm/i915/intel_psr.c > +++ b/drivers/gpu/drm/i915/intel_psr.c > @@ -358,6 +358,8 @@ void intel_psr_compute_config(struct intel_dp *intel_dp, > &crtc_state->base.adjusted_mode; > int psr_setup_time; > > + dev_priv->psr.source_ok = false; > + > if (!HAS_PSR(dev_priv)) > return; > > @@ -420,7 +422,7 @@ void intel_psr_compute_config(struct intel_dp *intel_dp, > * caps during eDP detection. > */ > if (!dev_priv->psr.psr2_support) { > - crtc_state->has_psr = true; > + dev_priv->psr.source_ok = (crtc_state->has_psr = true); > return; > } > > @@ -440,7 +442,7 @@ void intel_psr_compute_config(struct intel_dp *intel_dp, > return; > } > > - crtc_state->has_psr = true; > + dev_priv->psr.source_ok = (crtc_state->has_psr = true); > crtc_state->has_psr2 = true; > } > > @@ -522,8 +524,6 @@ void intel_psr_enable(struct intel_dp *intel_dp, > } > > dev_priv->psr.psr2_support = crtc_state->has_psr2; > - dev_priv->psr.source_ok = true; > - > dev_priv->psr.busy_frontbuffer_bits = 0; > > dev_priv->psr.setup_vsc(intel_dp, crtc_state); > @@ -657,7 +657,7 @@ void intel_psr_disable(struct intel_dp *intel_dp, > /* Disable PSR on Sink */ > drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG, 0); > > - dev_priv->psr.enabled = NULL; > + dev_priv->psr.source_ok = (dev_priv->psr.enabled = NULL); > mutex_unlock(&dev_priv->psr.lock); > > cancel_delayed_work_sync(&dev_priv->psr.work); > -- > 2.11.0 -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] drm/915/psr: Set psr.source_ok during atomic_check 2017-12-14 15:06 ` [PATCH] " Ville Syrjälä @ 2017-12-14 19:50 ` Pandiyan, Dhinakaran 0 siblings, 0 replies; 5+ messages in thread From: Pandiyan, Dhinakaran @ 2017-12-14 19:50 UTC (permalink / raw) To: ville.syrjala@linux.intel.com Cc: intel-gfx@lists.freedesktop.org, Vivi, Rodrigo On Thu, 2017-12-14 at 17:06 +0200, Ville Syrjälä wrote: > On Tue, Dec 12, 2017 at 04:59:34PM -0800, Dhinakaran Pandiyan wrote: > > Since commit 4d90f2d507ab ("drm/i915: Start tracking PSR state in crtc > > state"), we check whether PSR can be enabled or not in > > psr_compute_config(). Given that the psr.source_ok field is supposed to > > track this check, set the field in psr_compute_config() as well. > > NAK. compute_config() isn't allowed to change global state since the > modeset can still fail later, or this might in fact be a > TEST_ONLY operation. I thought of it, but the only purpose of this flag is in debugfs to indicate PSR requirements were met. It is not checked anywhere in the driver. Setting this flag during commit (in intel_psr_enable) is redundant because psr.enabled, exposed via debugfs, already provides that information. By moving this flag to where PSR conditions are checked, this could give a hint that something went wrong if PSR was not enabled when PSR conditions were met. Basically, I don't see any use for this flag the way it is set now. The other idea I was considering is killing this flag and exposing a no_fbc_reason type string. > > > > > Now tests can distinguish between PSR not enabled due to unmet mode > > requirements and something going wrong during commit. > > > > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> > > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> > > --- > > drivers/gpu/drm/i915/intel_psr.c | 10 +++++----- > > 1 file changed, 5 insertions(+), 5 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c > > index a1ad85fa5c1a..b59a956047ff 100644 > > --- a/drivers/gpu/drm/i915/intel_psr.c > > +++ b/drivers/gpu/drm/i915/intel_psr.c > > @@ -358,6 +358,8 @@ void intel_psr_compute_config(struct intel_dp *intel_dp, > > &crtc_state->base.adjusted_mode; > > int psr_setup_time; > > > > + dev_priv->psr.source_ok = false; > > + > > if (!HAS_PSR(dev_priv)) > > return; > > > > @@ -420,7 +422,7 @@ void intel_psr_compute_config(struct intel_dp *intel_dp, > > * caps during eDP detection. > > */ > > if (!dev_priv->psr.psr2_support) { > > - crtc_state->has_psr = true; > > + dev_priv->psr.source_ok = (crtc_state->has_psr = true); > > return; > > } > > > > @@ -440,7 +442,7 @@ void intel_psr_compute_config(struct intel_dp *intel_dp, > > return; > > } > > > > - crtc_state->has_psr = true; > > + dev_priv->psr.source_ok = (crtc_state->has_psr = true); > > crtc_state->has_psr2 = true; > > } > > > > @@ -522,8 +524,6 @@ void intel_psr_enable(struct intel_dp *intel_dp, > > } > > > > dev_priv->psr.psr2_support = crtc_state->has_psr2; > > - dev_priv->psr.source_ok = true; > > - > > dev_priv->psr.busy_frontbuffer_bits = 0; > > > > dev_priv->psr.setup_vsc(intel_dp, crtc_state); > > @@ -657,7 +657,7 @@ void intel_psr_disable(struct intel_dp *intel_dp, > > /* Disable PSR on Sink */ > > drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG, 0); > > > > - dev_priv->psr.enabled = NULL; > > + dev_priv->psr.source_ok = (dev_priv->psr.enabled = NULL); > > mutex_unlock(&dev_priv->psr.lock); > > > > cancel_delayed_work_sync(&dev_priv->psr.work); > > -- > > 2.11.0 > _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2017-12-14 19:50 UTC | newest] Thread overview: 5+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2017-12-13 0:59 [PATCH] drm/915/psr: Set psr.source_ok during atomic_check Dhinakaran Pandiyan 2017-12-13 1:28 ` ✓ Fi.CI.BAT: success for " Patchwork 2017-12-13 2:15 ` ✓ Fi.CI.IGT: " Patchwork 2017-12-14 15:06 ` [PATCH] " Ville Syrjälä 2017-12-14 19:50 ` Pandiyan, Dhinakaran
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