From: Kishon Vijay Abraham I <kishon@ti.com>
To: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
linux-omap@vger.kernel.org, devicetree@vger.kernel.org,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
nsekhar@ti.com, kishon@ti.com
Subject: [PATCH v2 1/3] dt-bindings: PCI: dra7xx: Add SoC specific compatible strings
Date: Tue, 19 Dec 2017 14:28:21 +0530 [thread overview]
Message-ID: <20171219085823.8695-2-kishon@ti.com> (raw)
In-Reply-To: <20171219085823.8695-1-kishon@ti.com>
Add new compatible strings for dra74x SoC (also used by dra76x) and
dra72x. This can be used to perform SoC specific configuration
(like configuring PCIe in x2 lane mode).
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
---
Documentation/devicetree/bindings/pci/ti-pci.txt | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/ti-pci.txt b/Documentation/devicetree/bindings/pci/ti-pci.txt
index 7f7af3044016..82cb875e4cec 100644
--- a/Documentation/devicetree/bindings/pci/ti-pci.txt
+++ b/Documentation/devicetree/bindings/pci/ti-pci.txt
@@ -1,8 +1,12 @@
TI PCI Controllers
PCIe DesignWare Controller
- - compatible: Should be "ti,dra7-pcie" for RC
- Should be "ti,dra7-pcie-ep" for EP
+ - compatible: Should be "ti,dra7-pcie" for RC (deprecated)
+ Should be "ti,dra7-pcie-ep" for EP (deprecated)
+ Should be "ti,dra746-pcie-rc" for dra74x/dra76 in RC mode
+ Should be "ti,dra746-pcie-ep" for dra74x/dra76 in EP mode
+ Should be "ti,dra726-pcie-rc" for dra72x in RC mode
+ Should be "ti,dra726-pcie-ep" for dra72x in EP mode
- phys : list of PHY specifiers (used by generic PHY framework)
- phy-names : must be "pcie-phy0", "pcie-phy1", "pcie-phyN".. based on the
number of PHYs as specified in *phys* property.
--
2.11.0
WARNING: multiple messages have this Message-ID (diff)
From: Kishon Vijay Abraham I <kishon@ti.com>
To: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>, <linux-omap@vger.kernel.org>,
<devicetree@vger.kernel.org>, <linux-pci@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <nsekhar@ti.com>, <kishon@ti.com>
Subject: [PATCH v2 1/3] dt-bindings: PCI: dra7xx: Add SoC specific compatible strings
Date: Tue, 19 Dec 2017 14:28:21 +0530 [thread overview]
Message-ID: <20171219085823.8695-2-kishon@ti.com> (raw)
In-Reply-To: <20171219085823.8695-1-kishon@ti.com>
Add new compatible strings for dra74x SoC (also used by dra76x) and
dra72x. This can be used to perform SoC specific configuration
(like configuring PCIe in x2 lane mode).
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
---
Documentation/devicetree/bindings/pci/ti-pci.txt | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/ti-pci.txt b/Documentation/devicetree/bindings/pci/ti-pci.txt
index 7f7af3044016..82cb875e4cec 100644
--- a/Documentation/devicetree/bindings/pci/ti-pci.txt
+++ b/Documentation/devicetree/bindings/pci/ti-pci.txt
@@ -1,8 +1,12 @@
TI PCI Controllers
PCIe DesignWare Controller
- - compatible: Should be "ti,dra7-pcie" for RC
- Should be "ti,dra7-pcie-ep" for EP
+ - compatible: Should be "ti,dra7-pcie" for RC (deprecated)
+ Should be "ti,dra7-pcie-ep" for EP (deprecated)
+ Should be "ti,dra746-pcie-rc" for dra74x/dra76 in RC mode
+ Should be "ti,dra746-pcie-ep" for dra74x/dra76 in EP mode
+ Should be "ti,dra726-pcie-rc" for dra72x in RC mode
+ Should be "ti,dra726-pcie-ep" for dra72x in EP mode
- phys : list of PHY specifiers (used by generic PHY framework)
- phy-names : must be "pcie-phy0", "pcie-phy1", "pcie-phyN".. based on the
number of PHYs as specified in *phys* property.
--
2.11.0
next prev parent reply other threads:[~2017-12-19 8:58 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-12-19 8:58 [PATCH v2 0/3] PCI: dra7xx: Support PCIe x2 lane mode Kishon Vijay Abraham I
2017-12-19 8:58 ` Kishon Vijay Abraham I
2017-12-19 8:58 ` Kishon Vijay Abraham I [this message]
2017-12-19 8:58 ` [PATCH v2 1/3] dt-bindings: PCI: dra7xx: Add SoC specific compatible strings Kishon Vijay Abraham I
2017-12-19 8:58 ` [PATCH v2 2/3] dt-bindings: PCI: dra7xx: Add properties to enable x2 lane in dra7 Kishon Vijay Abraham I
2017-12-19 8:58 ` Kishon Vijay Abraham I
[not found] ` <20171219085823.8695-3-kishon-l0cyMroinI0@public.gmane.org>
2017-12-20 18:57 ` Rob Herring
2017-12-20 18:57 ` Rob Herring
2017-12-22 6:03 ` Kishon Vijay Abraham I
2017-12-22 6:03 ` Kishon Vijay Abraham I
2017-12-22 18:24 ` Tony Lindgren
2017-12-26 17:46 ` Rob Herring
[not found] ` <CAL_Jsq+f3u0yvftvESKDiDF76bUiwr9hZED3ZZ75=qMMr6RL1g-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-12-26 18:10 ` Tony Lindgren
2017-12-26 18:10 ` Tony Lindgren
[not found] ` <20171226181009.GE3875-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org>
2017-12-27 6:40 ` Kishon Vijay Abraham I
2017-12-27 6:40 ` Kishon Vijay Abraham I
2017-12-19 8:58 ` [PATCH v2 3/3] PCI: dra7xx: Enable x2 mode support for dra74x, dra76x and dra72x Kishon Vijay Abraham I
2017-12-19 8:58 ` Kishon Vijay Abraham I
2018-02-26 10:30 ` Lorenzo Pieralisi
2018-02-28 12:04 ` Kishon Vijay Abraham I
2018-02-28 12:04 ` Kishon Vijay Abraham I
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