* [PATCH 1/2] ARM: dts: imx51-babbage: Pass the USB PHY regulator @ 2017-12-02 20:26 Fabio Estevam 2017-12-02 20:26 ` [PATCH 2/2] ARM: dts: imx51-babbage: Fix the 26MHz clock modelling Fabio Estevam 2017-12-21 7:48 ` [PATCH 1/2] ARM: dts: imx51-babbage: Pass the USB PHY regulator Shawn Guo 0 siblings, 2 replies; 4+ messages in thread From: Fabio Estevam @ 2017-12-02 20:26 UTC (permalink / raw) To: linux-arm-kernel From: Fabio Estevam <fabio.estevam@nxp.com> The USB PHYs are supplied via MC13892 VUSB regulator rail, so properly describe this in the device tree. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> --- arch/arm/boot/dts/imx51-babbage.dts | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm/boot/dts/imx51-babbage.dts b/arch/arm/boot/dts/imx51-babbage.dts index c4aa53c..c432de7 100644 --- a/arch/arm/boot/dts/imx51-babbage.dts +++ b/arch/arm/boot/dts/imx51-babbage.dts @@ -165,6 +165,7 @@ clocks = <&clks IMX5_CLK_DUMMY>; clock-names = "main_clk"; reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>; + vcc-supply = <&vusb_reg>; #phy-cells = <0>; }; }; @@ -241,6 +242,10 @@ regulator-max-microvolt = <3150000>; }; + vusb_reg: vusb { + regulator-boot-on; + }; + vusb2_reg: vusb2 { regulator-min-microvolt = <2400000>; regulator-max-microvolt = <2775000>; @@ -414,6 +419,10 @@ status = "okay"; }; +&usbphy0 { + vcc-supply = <&vusb_reg>; +}; + &usbotg { dr_mode = "otg"; disable-over-current; -- 2.7.4 ^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 2/2] ARM: dts: imx51-babbage: Fix the 26MHz clock modelling 2017-12-02 20:26 [PATCH 1/2] ARM: dts: imx51-babbage: Pass the USB PHY regulator Fabio Estevam @ 2017-12-02 20:26 ` Fabio Estevam 2017-12-21 7:54 ` Shawn Guo 2017-12-21 7:48 ` [PATCH 1/2] ARM: dts: imx51-babbage: Pass the USB PHY regulator Shawn Guo 1 sibling, 1 reply; 4+ messages in thread From: Fabio Estevam @ 2017-12-02 20:26 UTC (permalink / raw) To: linux-arm-kernel From: Fabio Estevam <fabio.estevam@nxp.com> On imx51-babbage there is a 26MHz oscillator that is gated by GPIO3_1. The output of this clock feeds audio codec clock and USB PHY clocks, which are gated by GPIO4_26 and GPIO2_1 respectively. Fix the clock representation by properly using gpio-gate-clock. The clock nodes can be moved out of the 'clocks' node. Based on a commit from Lucas Stach for imx51-zii-rdu1 board. This also fixes the following build warning with W=1: arch/arm/boot/dts/imx51-babbage.dtb: Warning (unit_address_vs_reg): Node /clocks/codec_clock has a reg or ranges property, but no unit name Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> --- arch/arm/boot/dts/imx51-babbage.dts | 67 +++++++++++++++++++++++++++---------- 1 file changed, 50 insertions(+), 17 deletions(-) diff --git a/arch/arm/boot/dts/imx51-babbage.dts b/arch/arm/boot/dts/imx51-babbage.dts index c432de7..663a3cd 100644 --- a/arch/arm/boot/dts/imx51-babbage.dts +++ b/arch/arm/boot/dts/imx51-babbage.dts @@ -25,18 +25,41 @@ reg = <0x90000000 0x20000000>; }; - clocks { - ckih1 { - clock-frequency = <22579200>; - }; + ckih1 { + clock-frequency = <22579200>; + }; - clk_26M: codec_clock { - compatible = "fixed-clock"; - reg=<0>; - #clock-cells = <0>; - clock-frequency = <26000000>; - gpios = <&gpio4 26 GPIO_ACTIVE_LOW>; - }; + clk_26M_osc: 26M_osc { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <26000000>; + }; + + clk_26M_osc_gate: 26M_gate { + compatible = "gpio-gate-clock"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_clk26mhz_osc>; + clocks = <&clk_26M_osc>; + #clock-cells = <0>; + enable-gpios = <&gpio3 1 GPIO_ACTIVE_HIGH>; + }; + + clk_26M_audio: audio_gate { + compatible = "gpio-gate-clock"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_clk26mhz_audio>; + clocks = <&clk_26M_osc_gate>; + #clock-cells = <0>; + enable-gpios = <&gpio4 26 GPIO_ACTIVE_LOW>; + }; + + clk_26M_usb: usbhost_gate { + compatible = "gpio-gate-clock"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_clk26mhz_usb>; + clocks = <&clk_26M_osc_gate>; + #clock-cells = <0>; + enable-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>; }; display1: disp1 { @@ -162,7 +185,7 @@ usbh1phy: usbh1phy at 0 { compatible = "usb-nop-xceiv"; reg = <0>; - clocks = <&clks IMX5_CLK_DUMMY>; + clocks = <&clk_26M_usb>; clock-names = "main_clk"; reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>; vcc-supply = <&vusb_reg>; @@ -345,10 +368,8 @@ sgtl5000: codec at a { compatible = "fsl,sgtl5000"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_clkcodec>; reg = <0x0a>; - clocks = <&clk_26M>; + clocks = <&clk_26M_audio>; VDDA-supply = <&vdig_reg>; VDDIO-supply = <&vvideo_reg>; }; @@ -441,9 +462,21 @@ >; }; - pinctrl_clkcodec: clkcodecgrp { + pinctrl_clk26mhz_audio: clk26mhzaudiocgrp { + fsl,pins = < + MX51_PAD_CSPI1_RDY__GPIO4_26 0x85 + >; + }; + + pinctrl_clk26mhz_osc: clk26mhzoscgrp { + fsl,pins = < + MX51_PAD_DI1_PIN12__GPIO3_1 0x85 + >; + }; + + pinctrl_clk26mhz_usb: clk26mhzusbgrp { fsl,pins = < - MX51_PAD_CSPI1_RDY__GPIO4_26 0x80000000 + MX51_PAD_EIM_D17__GPIO2_1 0x85 >; }; -- 2.7.4 ^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 2/2] ARM: dts: imx51-babbage: Fix the 26MHz clock modelling 2017-12-02 20:26 ` [PATCH 2/2] ARM: dts: imx51-babbage: Fix the 26MHz clock modelling Fabio Estevam @ 2017-12-21 7:54 ` Shawn Guo 0 siblings, 0 replies; 4+ messages in thread From: Shawn Guo @ 2017-12-21 7:54 UTC (permalink / raw) To: linux-arm-kernel On Sat, Dec 02, 2017 at 06:26:05PM -0200, Fabio Estevam wrote: > From: Fabio Estevam <fabio.estevam@nxp.com> > > On imx51-babbage there is a 26MHz oscillator that is gated by GPIO3_1. > > The output of this clock feeds audio codec clock and USB PHY clocks, > which are gated by GPIO4_26 and GPIO2_1 respectively. > > Fix the clock representation by properly using gpio-gate-clock. > > The clock nodes can be moved out of the 'clocks' node. > > Based on a commit from Lucas Stach for imx51-zii-rdu1 board. > > This also fixes the following build warning with W=1: > > arch/arm/boot/dts/imx51-babbage.dtb: Warning (unit_address_vs_reg): Node /clocks/codec_clock has a reg or ranges property, but no unit name > > Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> > --- > arch/arm/boot/dts/imx51-babbage.dts | 67 +++++++++++++++++++++++++++---------- > 1 file changed, 50 insertions(+), 17 deletions(-) > > diff --git a/arch/arm/boot/dts/imx51-babbage.dts b/arch/arm/boot/dts/imx51-babbage.dts > index c432de7..663a3cd 100644 > --- a/arch/arm/boot/dts/imx51-babbage.dts > +++ b/arch/arm/boot/dts/imx51-babbage.dts > @@ -25,18 +25,41 @@ > reg = <0x90000000 0x20000000>; > }; > > - clocks { > - ckih1 { > - clock-frequency = <22579200>; > - }; > + ckih1 { > + clock-frequency = <22579200>; > + }; > > - clk_26M: codec_clock { > - compatible = "fixed-clock"; > - reg=<0>; > - #clock-cells = <0>; > - clock-frequency = <26000000>; > - gpios = <&gpio4 26 GPIO_ACTIVE_LOW>; > - }; > + clk_26M_osc: 26M_osc { While at it, I suggest we use hyphen rather than underscore in node name, and all lowercase for node name. Shawn > + compatible = "fixed-clock"; > + #clock-cells = <0>; > + clock-frequency = <26000000>; > + }; > + > + clk_26M_osc_gate: 26M_gate { > + compatible = "gpio-gate-clock"; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_clk26mhz_osc>; > + clocks = <&clk_26M_osc>; > + #clock-cells = <0>; > + enable-gpios = <&gpio3 1 GPIO_ACTIVE_HIGH>; > + }; > + > + clk_26M_audio: audio_gate { > + compatible = "gpio-gate-clock"; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_clk26mhz_audio>; > + clocks = <&clk_26M_osc_gate>; > + #clock-cells = <0>; > + enable-gpios = <&gpio4 26 GPIO_ACTIVE_LOW>; > + }; > + > + clk_26M_usb: usbhost_gate { > + compatible = "gpio-gate-clock"; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_clk26mhz_usb>; > + clocks = <&clk_26M_osc_gate>; > + #clock-cells = <0>; > + enable-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>; > }; > > display1: disp1 { > @@ -162,7 +185,7 @@ > usbh1phy: usbh1phy at 0 { > compatible = "usb-nop-xceiv"; > reg = <0>; > - clocks = <&clks IMX5_CLK_DUMMY>; > + clocks = <&clk_26M_usb>; > clock-names = "main_clk"; > reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>; > vcc-supply = <&vusb_reg>; > @@ -345,10 +368,8 @@ > > sgtl5000: codec at a { > compatible = "fsl,sgtl5000"; > - pinctrl-names = "default"; > - pinctrl-0 = <&pinctrl_clkcodec>; > reg = <0x0a>; > - clocks = <&clk_26M>; > + clocks = <&clk_26M_audio>; > VDDA-supply = <&vdig_reg>; > VDDIO-supply = <&vvideo_reg>; > }; > @@ -441,9 +462,21 @@ > >; > }; > > - pinctrl_clkcodec: clkcodecgrp { > + pinctrl_clk26mhz_audio: clk26mhzaudiocgrp { > + fsl,pins = < > + MX51_PAD_CSPI1_RDY__GPIO4_26 0x85 > + >; > + }; > + > + pinctrl_clk26mhz_osc: clk26mhzoscgrp { > + fsl,pins = < > + MX51_PAD_DI1_PIN12__GPIO3_1 0x85 > + >; > + }; > + > + pinctrl_clk26mhz_usb: clk26mhzusbgrp { > fsl,pins = < > - MX51_PAD_CSPI1_RDY__GPIO4_26 0x80000000 > + MX51_PAD_EIM_D17__GPIO2_1 0x85 > >; > }; > > -- > 2.7.4 > ^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH 1/2] ARM: dts: imx51-babbage: Pass the USB PHY regulator 2017-12-02 20:26 [PATCH 1/2] ARM: dts: imx51-babbage: Pass the USB PHY regulator Fabio Estevam 2017-12-02 20:26 ` [PATCH 2/2] ARM: dts: imx51-babbage: Fix the 26MHz clock modelling Fabio Estevam @ 2017-12-21 7:48 ` Shawn Guo 1 sibling, 0 replies; 4+ messages in thread From: Shawn Guo @ 2017-12-21 7:48 UTC (permalink / raw) To: linux-arm-kernel On Sat, Dec 02, 2017 at 06:26:04PM -0200, Fabio Estevam wrote: > From: Fabio Estevam <fabio.estevam@nxp.com> > > The USB PHYs are supplied via MC13892 VUSB regulator rail, > so properly describe this in the device tree. > > Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Applied this one, thanks. ^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2017-12-21 7:54 UTC | newest] Thread overview: 4+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2017-12-02 20:26 [PATCH 1/2] ARM: dts: imx51-babbage: Pass the USB PHY regulator Fabio Estevam 2017-12-02 20:26 ` [PATCH 2/2] ARM: dts: imx51-babbage: Fix the 26MHz clock modelling Fabio Estevam 2017-12-21 7:54 ` Shawn Guo 2017-12-21 7:48 ` [PATCH 1/2] ARM: dts: imx51-babbage: Pass the USB PHY regulator Shawn Guo
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