From: Stephen Boyd <sboyd@codeaurora.org>
To: Abhishek Sahu <absahu@codeaurora.org>
Cc: Michael Turquette <mturquette@baylibre.com>,
Rob Herring <robh+dt@kernel.org>,
Andy Gross <andy.gross@linaro.org>,
David Brown <david.brown@linaro.org>,
Mark Rutland <mark.rutland@arm.com>,
linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org,
linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org
Subject: Re: [PATCH v2 06/11] clk: qcom: ipq8074: add PCIE, USB and SDCC clocks
Date: Thu, 21 Dec 2017 16:24:02 -0800 [thread overview]
Message-ID: <20171222002402.GN7997@codeaurora.org> (raw)
In-Reply-To: <1513175142-3702-7-git-send-email-absahu@codeaurora.org>
On 12/13, Abhishek Sahu wrote:
> - It has 2 instances of PCIE which uses AXI, AHB, AUX, SYS NOC
> AXI and PIPE clocks.
> - It has 2 instances of USB 3.0 which uses AUX, SLEEP, PIPE,
> SYS NOC, mock UTMI and master clocks.
> - It has 2 instances of SDCC which uses APSS and AHB clock.
> SDCC1 requires ICE core clock also.
> - All the PIPE clocks are external clocks which will be
> registered in clock framework by PHY drivers. The enabling
> and disabling of PIPE RCG clocks are dependent upon PHY
> initialization sequence so BRANCH_HALT_DELAY flag is required for
> these clocks.
>
> Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
> ---
Applied to clk-next
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
next prev parent reply other threads:[~2017-12-22 0:24 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-12-13 14:25 [PATCH v2 00/11] Add remaining clocks for QCOM IPQ8074 Abhishek Sahu
2017-12-13 14:25 ` [PATCH v2 02/11] clk: qcom: add parent map for regmap mux Abhishek Sahu
2017-12-22 0:23 ` Stephen Boyd
2017-12-13 14:25 ` [PATCH v2 03/11] clk: qcom: ipq8074: fix missing GPLL0 divider width Abhishek Sahu
2017-12-22 0:23 ` Stephen Boyd
2017-12-13 14:25 ` [PATCH v2 04/11] dt-bindings: clock: qcom: add remaining clocks for IPQ8074 Abhishek Sahu
2017-12-15 23:09 ` Rob Herring
2017-12-22 0:24 ` Stephen Boyd
[not found] ` <1513175142-3702-1-git-send-email-absahu-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2017-12-13 14:25 ` [PATCH v2 01/11] clk: qcom: add read-only divider operations Abhishek Sahu
2017-12-13 14:25 ` Abhishek Sahu
2017-12-22 0:23 ` Stephen Boyd
2017-12-13 14:25 ` [PATCH v2 05/11] clk: qcom: ipq8074: add remaining PLL’s Abhishek Sahu
2017-12-13 14:25 ` Abhishek Sahu
2017-12-22 0:23 ` Stephen Boyd
2017-12-13 14:25 ` [PATCH v2 06/11] clk: qcom: ipq8074: add PCIE, USB and SDCC clocks Abhishek Sahu
2017-12-13 14:25 ` Abhishek Sahu
2017-12-22 0:24 ` Stephen Boyd [this message]
2017-12-13 14:25 ` [PATCH v2 07/11] clk: qcom: ipq8074: add NSS clocks Abhishek Sahu
2017-12-13 14:25 ` Abhishek Sahu
2017-12-22 0:24 ` Stephen Boyd
2017-12-13 14:25 ` [PATCH v2 09/11] clk: qcom: ipq8074: add GP and Crypto clocks Abhishek Sahu
2017-12-13 14:25 ` Abhishek Sahu
2017-12-22 0:24 ` Stephen Boyd
2017-12-13 14:25 ` [PATCH v2 08/11] clk: qcom: ipq8074: add NSS ethernet port clocks Abhishek Sahu
[not found] ` <1513175142-3702-9-git-send-email-absahu-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2017-12-22 0:24 ` Stephen Boyd
2017-12-22 0:24 ` Stephen Boyd
2017-12-13 14:25 ` [PATCH v2 10/11] dt-bindings: clock: qcom: add misc resets for PCIE and NSS Abhishek Sahu
[not found] ` <1513175142-3702-11-git-send-email-absahu-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2017-12-15 23:10 ` Rob Herring
2017-12-15 23:10 ` Rob Herring
2017-12-22 0:24 ` Stephen Boyd
2017-12-22 0:24 ` Stephen Boyd
2017-12-13 14:25 ` [PATCH v2 11/11] clk: qcom: ipq8074: " Abhishek Sahu
2017-12-22 0:24 ` Stephen Boyd
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