diff for duplicates of <20180108105515.GG18649@localhost> diff --git a/a/1.txt b/N1/1.txt index ac7e4a0..ff29db1 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -6,3 +6,6 @@ On Wed, Jan 03, 2018 at 12:12:09PM +0530, Kedareswara rao Appana wrote: > register, failure to do so could result errors from the dmaengine. Applied 2-4, thanks + +-- +~Vinod diff --git a/a/content_digest b/N1/content_digest index 9be3b2a..c20b9c4 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,18 +1,9 @@ - "From\0Vinod Koul <vinod.koul@intel.com>\0" - "Subject\0[v2,2/4] dmaengine: xilinx_dma: properly configure the SG mode bit in the driver for cdma\0" + "ref\01514961731-1916-1-git-send-email-appanad@xilinx.com\0" + "ref\01514961731-1916-3-git-send-email-appanad@xilinx.com\0" + "From\0vinod.koul@intel.com (Vinod Koul)\0" + "Subject\0[PATCH v2 2/4] dmaengine: xilinx_dma: properly configure the SG mode bit in the driver for cdma\0" "Date\0Mon, 8 Jan 2018 16:25:15 +0530\0" - "To\0Kedareswara rao Appana <appana.durga.rao@xilinx.com>\0" - "Cc\0dan.j.williams@intel.com" - michal.simek@xilinx.com - appanad@xilinx.com - lars@metafoo.de - akinobu.mita@gmail.com - joabreu@synopsys.com - mike.looijmans@topic.nl - kedare06@gmail.com - dmaengine@vger.kernel.org - linux-arm-kernel@lists.infradead.org - " linux-kernel@vger.kernel.org\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "On Wed, Jan 03, 2018 at 12:12:09PM +0530, Kedareswara rao Appana wrote:\n" @@ -22,6 +13,9 @@ "> the CDMA SG engine to use a new value written to the CURDESC_PNTR\n" "> register, failure to do so could result errors from the dmaengine.\n" "\n" - Applied 2-4, thanks + "Applied 2-4, thanks\n" + "\n" + "-- \n" + ~Vinod -f2e7242fbda5f6fcdc20b80f22c46dec2db9bb9361fd77d7d18baa050f8d7d3f +3206c34e1122dc930dc74f9d77667726bdac7439c4eb0d89861ecf5c6c0b4f8c
diff --git a/a/1.txt b/N2/1.txt index ac7e4a0..ff29db1 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -6,3 +6,6 @@ On Wed, Jan 03, 2018 at 12:12:09PM +0530, Kedareswara rao Appana wrote: > register, failure to do so could result errors from the dmaengine. Applied 2-4, thanks + +-- +~Vinod diff --git a/a/content_digest b/N2/content_digest index 9be3b2a..7a4edd5 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -1,5 +1,7 @@ + "ref\01514961731-1916-1-git-send-email-appanad@xilinx.com\0" + "ref\01514961731-1916-3-git-send-email-appanad@xilinx.com\0" "From\0Vinod Koul <vinod.koul@intel.com>\0" - "Subject\0[v2,2/4] dmaengine: xilinx_dma: properly configure the SG mode bit in the driver for cdma\0" + "Subject\0Re: [PATCH v2 2/4] dmaengine: xilinx_dma: properly configure the SG mode bit in the driver for cdma\0" "Date\0Mon, 8 Jan 2018 16:25:15 +0530\0" "To\0Kedareswara rao Appana <appana.durga.rao@xilinx.com>\0" "Cc\0dan.j.williams@intel.com" @@ -22,6 +24,9 @@ "> the CDMA SG engine to use a new value written to the CURDESC_PNTR\n" "> register, failure to do so could result errors from the dmaengine.\n" "\n" - Applied 2-4, thanks + "Applied 2-4, thanks\n" + "\n" + "-- \n" + ~Vinod -f2e7242fbda5f6fcdc20b80f22c46dec2db9bb9361fd77d7d18baa050f8d7d3f +99b1f25335d220791954acd549af5d88764cc158b010e8e888b49be7afbe6f3a
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