From: Vinod Koul <vinod.koul@intel.com>
To: Kedareswara rao Appana <appana.durga.rao@xilinx.com>
Cc: dan.j.williams@intel.com, michal.simek@xilinx.com,
appanad@xilinx.com, lars@metafoo.de, akinobu.mita@gmail.com,
joabreu@synopsys.com, mike.looijmans@topic.nl,
kedare06@gmail.com, dmaengine@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: [v2,2/4] dmaengine: xilinx_dma: properly configure the SG mode bit in the driver for cdma
Date: Mon, 8 Jan 2018 16:25:15 +0530 [thread overview]
Message-ID: <20180108105515.GG18649@localhost> (raw)
On Wed, Jan 03, 2018 at 12:12:09PM +0530, Kedareswara rao Appana wrote:
> If the hardware is configured for Scatter Gather(SG) mode,
> and hardware is idle, in the control register SG mode bit
> must be set to a 0 then back to 1 by the software, to force
> the CDMA SG engine to use a new value written to the CURDESC_PNTR
> register, failure to do so could result errors from the dmaengine.
Applied 2-4, thanks
WARNING: multiple messages have this Message-ID (diff)
From: vinod.koul@intel.com (Vinod Koul)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 2/4] dmaengine: xilinx_dma: properly configure the SG mode bit in the driver for cdma
Date: Mon, 8 Jan 2018 16:25:15 +0530 [thread overview]
Message-ID: <20180108105515.GG18649@localhost> (raw)
In-Reply-To: <1514961731-1916-3-git-send-email-appanad@xilinx.com>
On Wed, Jan 03, 2018 at 12:12:09PM +0530, Kedareswara rao Appana wrote:
> If the hardware is configured for Scatter Gather(SG) mode,
> and hardware is idle, in the control register SG mode bit
> must be set to a 0 then back to 1 by the software, to force
> the CDMA SG engine to use a new value written to the CURDESC_PNTR
> register, failure to do so could result errors from the dmaengine.
Applied 2-4, thanks
--
~Vinod
WARNING: multiple messages have this Message-ID (diff)
From: Vinod Koul <vinod.koul@intel.com>
To: Kedareswara rao Appana <appana.durga.rao@xilinx.com>
Cc: dan.j.williams@intel.com, michal.simek@xilinx.com,
appanad@xilinx.com, lars@metafoo.de, akinobu.mita@gmail.com,
joabreu@synopsys.com, mike.looijmans@topic.nl,
kedare06@gmail.com, dmaengine@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 2/4] dmaengine: xilinx_dma: properly configure the SG mode bit in the driver for cdma
Date: Mon, 8 Jan 2018 16:25:15 +0530 [thread overview]
Message-ID: <20180108105515.GG18649@localhost> (raw)
In-Reply-To: <1514961731-1916-3-git-send-email-appanad@xilinx.com>
On Wed, Jan 03, 2018 at 12:12:09PM +0530, Kedareswara rao Appana wrote:
> If the hardware is configured for Scatter Gather(SG) mode,
> and hardware is idle, in the control register SG mode bit
> must be set to a 0 then back to 1 by the software, to force
> the CDMA SG engine to use a new value written to the CURDESC_PNTR
> register, failure to do so could result errors from the dmaengine.
Applied 2-4, thanks
--
~Vinod
next reply other threads:[~2018-01-08 10:55 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-01-08 10:55 Vinod Koul [this message]
2018-01-08 10:55 ` [PATCH v2 2/4] dmaengine: xilinx_dma: properly configure the SG mode bit in the driver for cdma Vinod Koul
2018-01-08 10:55 ` Vinod Koul
-- strict thread matches above, loose matches on Subject: below --
2018-01-11 6:21 [v2,1/4] dmaengine: xilinx_dma: populate dma caps properly Vinod Koul
2018-01-11 6:21 ` [PATCH v2 1/4] " Vinod Koul
2018-01-11 6:21 ` Vinod Koul
2018-01-09 7:36 [v2,1/4] " Appana Durga Kedareswara Rao
2018-01-09 7:36 ` [PATCH v2 1/4] " Appana Durga Kedareswara Rao
2018-01-09 7:36 ` Appana Durga Kedareswara Rao
2018-01-09 5:04 [v2,1/4] " Vinod Koul
2018-01-09 5:04 ` [PATCH v2 1/4] " Vinod Koul
2018-01-09 5:04 ` Vinod Koul
2018-01-09 4:48 [v2,1/4] " Vinod Koul
2018-01-09 4:48 ` [PATCH v2 1/4] " Vinod Koul
2018-01-09 4:48 ` Vinod Koul
2018-01-09 4:48 [v2,1/4] " Appana Durga Kedareswara Rao
2018-01-09 4:48 ` [PATCH v2 1/4] " Appana Durga Kedareswara Rao
2018-01-09 4:48 ` Appana Durga Kedareswara Rao
2018-01-08 17:25 [v2,1/4] " Appana Durga Kedareswara Rao
2018-01-08 17:25 ` [PATCH v2 1/4] " Appana Durga Kedareswara Rao
2018-01-08 17:25 ` Appana Durga Kedareswara Rao
2018-01-08 17:06 [v2,1/4] " Vinod Koul
2018-01-08 17:06 ` [PATCH v2 1/4] " Vinod Koul
2018-01-08 17:06 ` Vinod Koul
2018-01-08 10:52 [v2,1/4] " Appana Durga Kedareswara Rao
2018-01-08 10:52 ` [PATCH v2 1/4] " Appana Durga Kedareswara Rao
2018-01-08 10:52 ` Appana Durga Kedareswara Rao
2018-01-08 10:38 [v2,1/4] " Vinod Koul
2018-01-08 10:38 ` [PATCH v2 1/4] " Vinod Koul
2018-01-08 10:38 ` Vinod Koul
2018-01-03 6:42 [v2,4/4] dmaengine: xilinx_dma: Free BD consistent memory Kedareswara rao Appana
2018-01-03 6:42 ` [PATCH v2 4/4] " Kedareswara rao Appana
2018-01-03 6:42 ` Kedareswara rao Appana
2018-01-03 6:42 [v2,3/4] dmaengine: xilinx_dma: Fix warning variable prev set but not used Kedareswara rao Appana
2018-01-03 6:42 ` [PATCH v2 3/4] " Kedareswara rao Appana
2018-01-03 6:42 ` Kedareswara rao Appana
2018-01-03 6:42 [v2,2/4] dmaengine: xilinx_dma: properly configure the SG mode bit in the driver for cdma Kedareswara rao Appana
2018-01-03 6:42 ` [PATCH v2 2/4] " Kedareswara rao Appana
2018-01-03 6:42 ` Kedareswara rao Appana
2018-01-03 6:42 [v2,1/4] dmaengine: xilinx_dma: populate dma caps properly Kedareswara rao Appana
2018-01-03 6:42 ` [PATCH v2 1/4] " Kedareswara rao Appana
2018-01-03 6:42 ` Kedareswara rao Appana
2018-01-03 6:42 [PATCH v2 0/4] dmaengine: xilinx_dma: Bug fixes Kedareswara rao Appana
2018-01-03 6:42 ` Kedareswara rao Appana
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