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diff for duplicates of <20180109050449.GO18649@localhost>

diff --git a/a/1.txt b/N1/1.txt
index 24f5500..393fca5 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -34,3 +34,6 @@ bit addresses used.
 It is the capability of the dma controller to do transfers with data width as
 8bits, 16 bits, so on. iKey is "data width" and not address type.
 This typically translates to DMA FIFO configuration of the controller!
+
+-- 
+~Vinod
diff --git a/a/content_digest b/N1/content_digest
index f28eceb..f980b7c 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,17 +1,15 @@
- "From\0Vinod Koul <vinod.koul@intel.com>\0"
- "Subject\0[v2,1/4] dmaengine: xilinx_dma: populate dma caps properly\0"
+ "ref\01514961731-1916-1-git-send-email-appanad@xilinx.com\0"
+ "ref\01514961731-1916-2-git-send-email-appanad@xilinx.com\0"
+ "ref\020180108103845.GE18649@localhost\0"
+ "ref\0CY1PR02MB1692EB7A4E66BA30A8E0DB45DC130@CY1PR02MB1692.namprd02.prod.outlook.com\0"
+ "ref\020180108170655.GJ18649@localhost\0"
+ "ref\0CY1PR02MB16922B2D20C958D8214F7A23DC130@CY1PR02MB1692.namprd02.prod.outlook.com\0"
+ "ref\020180109044858.GN18649@localhost\0"
+ "ref\0CY1PR02MB1692292DE4B4F346B92BD4EBDC100@CY1PR02MB1692.namprd02.prod.outlook.com\0"
+ "From\0vinod.koul@intel.com (Vinod Koul)\0"
+ "Subject\0[PATCH v2 1/4] dmaengine: xilinx_dma: populate dma caps properly\0"
  "Date\0Tue, 9 Jan 2018 10:34:50 +0530\0"
- "To\0Appana Durga Kedareswara Rao <appanad@xilinx.com>\0"
- "Cc\0dan.j.williams@intel.com <dan.j.williams@intel.com>"
-  michal.simek@xilinx.com <michal.simek@xilinx.com>
-  lars@metafoo.de <lars@metafoo.de>
-  akinobu.mita@gmail.com <akinobu.mita@gmail.com>
-  joabreu@synopsys.com <joabreu@synopsys.com>
-  mike.looijmans@topic.nl <mike.looijmans@topic.nl>
-  kedare06@gmail.com <kedare06@gmail.com>
-  dmaengine@vger.kernel.org <dmaengine@vger.kernel.org>
-  linux-arm-kernel@lists.infradead.org <linux-arm-kernel@lists.infradead.org>
- " linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org>\0"
+ "To\0linux-arm-kernel@lists.infradead.org\0"
  "\00:1\0"
  "b\0"
  "On Tue, Jan 09, 2018 at 04:48:10AM +0000, Appana Durga Kedareswara Rao wrote:\n"
@@ -49,6 +47,9 @@
  "\n"
  "It is the capability of the dma controller to do transfers with data width as\n"
  "8bits, 16 bits, so on. iKey is \"data width\" and not address type.\n"
- This typically translates to DMA FIFO configuration of the controller!
+ "This typically translates to DMA FIFO configuration of the controller!\n"
+ "\n"
+ "-- \n"
+ ~Vinod
 
-30faab9d25fb23f10c1d235f8f137ad07e96b4515ebbcd61c3791f1f19c531dd
+36160f6b46155e568f25ce20a639eee46751b335861c35d2646d6335b584ded2

diff --git a/a/1.txt b/N2/1.txt
index 24f5500..393fca5 100644
--- a/a/1.txt
+++ b/N2/1.txt
@@ -34,3 +34,6 @@ bit addresses used.
 It is the capability of the dma controller to do transfers with data width as
 8bits, 16 bits, so on. iKey is "data width" and not address type.
 This typically translates to DMA FIFO configuration of the controller!
+
+-- 
+~Vinod
diff --git a/a/content_digest b/N2/content_digest
index f28eceb..f93a299 100644
--- a/a/content_digest
+++ b/N2/content_digest
@@ -1,5 +1,13 @@
+ "ref\01514961731-1916-1-git-send-email-appanad@xilinx.com\0"
+ "ref\01514961731-1916-2-git-send-email-appanad@xilinx.com\0"
+ "ref\020180108103845.GE18649@localhost\0"
+ "ref\0CY1PR02MB1692EB7A4E66BA30A8E0DB45DC130@CY1PR02MB1692.namprd02.prod.outlook.com\0"
+ "ref\020180108170655.GJ18649@localhost\0"
+ "ref\0CY1PR02MB16922B2D20C958D8214F7A23DC130@CY1PR02MB1692.namprd02.prod.outlook.com\0"
+ "ref\020180109044858.GN18649@localhost\0"
+ "ref\0CY1PR02MB1692292DE4B4F346B92BD4EBDC100@CY1PR02MB1692.namprd02.prod.outlook.com\0"
  "From\0Vinod Koul <vinod.koul@intel.com>\0"
- "Subject\0[v2,1/4] dmaengine: xilinx_dma: populate dma caps properly\0"
+ "Subject\0Re: [PATCH v2 1/4] dmaengine: xilinx_dma: populate dma caps properly\0"
  "Date\0Tue, 9 Jan 2018 10:34:50 +0530\0"
  "To\0Appana Durga Kedareswara Rao <appanad@xilinx.com>\0"
  "Cc\0dan.j.williams@intel.com <dan.j.williams@intel.com>"
@@ -49,6 +57,9 @@
  "\n"
  "It is the capability of the dma controller to do transfers with data width as\n"
  "8bits, 16 bits, so on. iKey is \"data width\" and not address type.\n"
- This typically translates to DMA FIFO configuration of the controller!
+ "This typically translates to DMA FIFO configuration of the controller!\n"
+ "\n"
+ "-- \n"
+ ~Vinod
 
-30faab9d25fb23f10c1d235f8f137ad07e96b4515ebbcd61c3791f1f19c531dd
+a94ff29eff4ca862d834ed0fde44537b03553a8e715a4c21295f0fb75102c652

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