From: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
To: Bjorn Helgaas <helgaas@kernel.org>
Cc: "Bjorn Helgaas" <bhelgaas@google.com>,
linux-pci@vger.kernel.org, "Andrew Lunn" <andrew@lunn.ch>,
"Yehuda Yitschak" <yehuday@marvell.com>,
"Jason Cooper" <jason@lakedaemon.net>,
"Hanna Hawa" <hannah@marvell.com>,
stable@vger.kernel.org, "Nadav Haklai" <nadavh@marvell.com>,
"Victor Gu" <xigu@marvell.com>,
"Miquèl Raynal" <miquel.raynal@free-electrons.com>,
"Gregory Clement" <gregory.clement@free-electrons.com>,
"Antoine Tenart" <antoine.tenart@free-electrons.com>,
linux-arm-kernel@lists.infradead.org,
"Sebastian Hesselbarth" <sebastian.hesselbarth@gmail.com>
Subject: Re: [PATCH v2 1/7] PCI: aardvark: fix logic in PCI configuration read/write functions
Date: Tue, 9 Jan 2018 17:49:18 +0100 [thread overview]
Message-ID: <20180109174918.5c4b9ee6@windsurf.lan> (raw)
In-Reply-To: <20171005172330.GP25517@bhelgaas-glaptop.roam.corp.google.com>
Hello Bjorn,
Again, reviving this very old thread :-)
On Thu, 5 Oct 2017 12:23:30 -0500, Bjorn Helgaas wrote:
> > - if (PCI_SLOT(devfn) != 0) {
> > + if ((bus->number == pcie->root_bus_nr) && (PCI_SLOT(devfn) != 0)) {
>
> I'm fine with this, but please take a look at these:
>
> 8e7ca8ca5fd8 PCI: xilinx: Relax device number checking to allow SR-IOV
> e18934b5e9c7 PCI: designware: Relax device number checking to allow SR-IOV
> d99e30b7936a PCI: altera: Relax device number checking to allow SR-IOV
>
> and make sure that reasoning doesn't apply here, too.
>
> http://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=8e7ca8ca5fd8
> http://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=e18934b5e9c7
> http://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=d99e30b7936a
The original code for xilinx/designware/altera was doing:
if (bus->number == port->root_busno && devfn > 0)
return false;
if (bus->primary == port->root_busno && devfn > 0)
return false;
I.e, it was checking both if bus->number *and* bus->primary were equal
to port->root_busno.
The commit you points removed the check on bus->primary, keeping the
check on bus->number.
Your patch for the Aadvark driver only adds a check on bus->number, i.e
exactly what the xilinx/designware/altera code is still doing today:
Altera:
/* access only one slot on each root port */
if (bus->number == pcie->root_bus_nr && dev > 0)
return false;
Designware:
/* access only one slot on each root port */
if (bus->number == pp->root_bus_nr && dev > 0)
return 0;
Xilinx:
/* Only one device down on each root port */
if (bus->number == port->root_busno && devfn > 0)
return false;
Aardvark (with our patch):
if ((bus->number == pcie->root_bus_nr) && (PCI_SLOT(devfn) != 0)) {
*val = 0xffffffff;
return PCIBIOS_DEVICE_NOT_FOUND;
}
So we're doing exactly the same thing.
Do you agree ?
Best regards,
Thomas Petazzoni
--
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
WARNING: multiple messages have this Message-ID (diff)
From: thomas.petazzoni@free-electrons.com (Thomas Petazzoni)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 1/7] PCI: aardvark: fix logic in PCI configuration read/write functions
Date: Tue, 9 Jan 2018 17:49:18 +0100 [thread overview]
Message-ID: <20180109174918.5c4b9ee6@windsurf.lan> (raw)
In-Reply-To: <20171005172330.GP25517@bhelgaas-glaptop.roam.corp.google.com>
Hello Bjorn,
Again, reviving this very old thread :-)
On Thu, 5 Oct 2017 12:23:30 -0500, Bjorn Helgaas wrote:
> > - if (PCI_SLOT(devfn) != 0) {
> > + if ((bus->number == pcie->root_bus_nr) && (PCI_SLOT(devfn) != 0)) {
>
> I'm fine with this, but please take a look at these:
>
> 8e7ca8ca5fd8 PCI: xilinx: Relax device number checking to allow SR-IOV
> e18934b5e9c7 PCI: designware: Relax device number checking to allow SR-IOV
> d99e30b7936a PCI: altera: Relax device number checking to allow SR-IOV
>
> and make sure that reasoning doesn't apply here, too.
>
> http://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=8e7ca8ca5fd8
> http://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=e18934b5e9c7
> http://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=d99e30b7936a
The original code for xilinx/designware/altera was doing:
if (bus->number == port->root_busno && devfn > 0)
return false;
if (bus->primary == port->root_busno && devfn > 0)
return false;
I.e, it was checking both if bus->number *and* bus->primary were equal
to port->root_busno.
The commit you points removed the check on bus->primary, keeping the
check on bus->number.
Your patch for the Aadvark driver only adds a check on bus->number, i.e
exactly what the xilinx/designware/altera code is still doing today:
Altera:
/* access only one slot on each root port */
if (bus->number == pcie->root_bus_nr && dev > 0)
return false;
Designware:
/* access only one slot on each root port */
if (bus->number == pp->root_bus_nr && dev > 0)
return 0;
Xilinx:
/* Only one device down on each root port */
if (bus->number == port->root_busno && devfn > 0)
return false;
Aardvark (with our patch):
if ((bus->number == pcie->root_bus_nr) && (PCI_SLOT(devfn) != 0)) {
*val = 0xffffffff;
return PCIBIOS_DEVICE_NOT_FOUND;
}
So we're doing exactly the same thing.
Do you agree ?
Best regards,
Thomas Petazzoni
--
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
next prev parent reply other threads:[~2018-01-09 16:49 UTC|newest]
Thread overview: 62+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-09-28 12:58 [PATCH v2 0/7] PCI: aardvark: improve compatibility with PCI devices Thomas Petazzoni
2017-09-28 12:58 ` Thomas Petazzoni
2017-09-28 12:58 ` [PATCH v2 1/7] PCI: aardvark: fix logic in PCI configuration read/write functions Thomas Petazzoni
2017-09-28 12:58 ` Thomas Petazzoni
2017-09-28 12:58 ` Thomas Petazzoni
2017-10-05 17:23 ` Bjorn Helgaas
2017-10-05 17:23 ` Bjorn Helgaas
2017-10-05 17:23 ` Bjorn Helgaas
2018-01-09 16:49 ` Thomas Petazzoni [this message]
2018-01-09 16:49 ` Thomas Petazzoni
2018-01-10 1:11 ` Bjorn Helgaas
2018-01-10 1:11 ` Bjorn Helgaas
2018-01-10 1:11 ` Bjorn Helgaas
2017-10-09 7:59 ` Mason
2017-09-28 12:58 ` [PATCH v2 2/7] PCI: aardvark: set PIO_ADDR_LS correctly in advk_pcie_rd_conf() Thomas Petazzoni
2017-09-28 12:58 ` Thomas Petazzoni
2017-09-28 12:58 ` Thomas Petazzoni
2017-10-05 17:25 ` Bjorn Helgaas
2017-10-05 17:25 ` Bjorn Helgaas
2018-01-09 16:10 ` Thomas Petazzoni
2018-01-09 16:10 ` Thomas Petazzoni
2017-09-28 12:58 ` [PATCH v2 3/7] PCI: aardvark: set host and device to the same MAX payload size Thomas Petazzoni
2017-09-28 12:58 ` Thomas Petazzoni
2017-10-05 17:31 ` Bjorn Helgaas
2017-10-05 17:31 ` Bjorn Helgaas
2018-01-09 15:39 ` Thomas Petazzoni
2018-01-09 15:39 ` Thomas Petazzoni
2018-01-09 22:14 ` Bjorn Helgaas
2018-01-09 22:14 ` Bjorn Helgaas
2018-01-12 10:14 ` Thomas Petazzoni
2018-01-12 10:14 ` Thomas Petazzoni
2018-01-12 14:40 ` Bjorn Helgaas
2018-01-12 14:40 ` Bjorn Helgaas
2018-01-12 15:46 ` Thomas Petazzoni
2018-01-12 15:46 ` Thomas Petazzoni
2018-01-12 19:39 ` Bjorn Helgaas
2018-01-12 19:39 ` Bjorn Helgaas
2017-09-28 12:58 ` [PATCH v2 4/7] PCI: aardvark: use isr1 instead of isr0 interrupt in legacy irq mode Thomas Petazzoni
2017-09-28 12:58 ` Thomas Petazzoni
2017-09-28 12:58 ` [PATCH v2 5/7] PCI: aardvark: disable LOS state by default Thomas Petazzoni
2017-09-28 12:58 ` Thomas Petazzoni
2017-10-05 17:46 ` Bjorn Helgaas
2017-10-05 17:46 ` Bjorn Helgaas
2017-10-09 6:54 ` Thomas Petazzoni
2017-10-09 6:54 ` Thomas Petazzoni
2017-09-28 12:58 ` [PATCH v2 6/7] PCI: aardvark: fix PCIe max read request size setting Thomas Petazzoni
2017-09-28 12:58 ` Thomas Petazzoni
2017-09-28 12:58 ` [PATCH v2 7/7] PCI: aardvark: define IRQ related hooks in pci_host_bridge Thomas Petazzoni
2017-09-28 12:58 ` Thomas Petazzoni
2017-10-05 17:55 ` Bjorn Helgaas
2017-10-05 17:55 ` Bjorn Helgaas
2017-10-05 17:55 ` Bjorn Helgaas
2017-10-05 19:25 ` Thomas Petazzoni
2017-10-05 19:25 ` Thomas Petazzoni
2017-10-05 15:53 ` [PATCH v2 0/7] PCI: aardvark: improve compatibility with PCI devices Thomas Petazzoni
2017-10-05 15:53 ` Thomas Petazzoni
2017-10-05 18:16 ` Bjorn Helgaas
2017-10-05 18:16 ` Bjorn Helgaas
2017-10-05 19:35 ` Thomas Petazzoni
2017-10-05 19:35 ` Thomas Petazzoni
2017-10-06 8:47 ` Lorenzo Pieralisi
2017-10-06 8:47 ` Lorenzo Pieralisi
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