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From: stefan@agner.ch (Stefan Agner)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 7/7] ARM: dts: imx6ull: add UART8 support
Date: Wed, 10 Jan 2018 22:04:53 +0100	[thread overview]
Message-ID: <20180110210453.19264-7-stefan@agner.ch> (raw)
In-Reply-To: <20180110210453.19264-1-stefan@agner.ch>

In i.MX 6ULL UART8 is part of the AIPS-3 memory map instead of
AIPS-1. Clocks and interrupts remain the same.

Signed-off-by: Stefan Agner <stefan@agner.ch>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Dong Aisheng <aisheng.dong@nxp.com>
---
 arch/arm/boot/dts/imx6ull.dtsi | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm/boot/dts/imx6ull.dtsi b/arch/arm/boot/dts/imx6ull.dtsi
index bc2cd4fb8b12..571ddd71cdba 100644
--- a/arch/arm/boot/dts/imx6ull.dtsi
+++ b/arch/arm/boot/dts/imx6ull.dtsi
@@ -43,6 +43,9 @@
 #include "imx6ull-pinfunc.h"
 #include "imx6ull-pinfunc-snvs.h"
 
+/* Delete UART8 in AIPS-1 (i.MX6UL specific) */
+/delete-node/ &uart8;
+
 / {
 	soc {
 		aips3: aips-bus at 2200000 {
@@ -56,6 +59,17 @@
 				compatible = "fsl,imx6ull-iomuxc-snvs";
 				reg = <0x02290000 0x4000>;
 			};
+
+			uart8: serial at 2288000 {
+				compatible = "fsl,imx6ul-uart",
+					     "fsl,imx6q-uart";
+				reg = <0x02288000 0x4000>;
+				interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&clks IMX6UL_CLK_UART8_IPG>,
+					 <&clks IMX6UL_CLK_UART8_SERIAL>;
+				clock-names = "ipg", "per";
+				status = "disabled";
+			};
 		};
 	};
 };
-- 
2.15.1

WARNING: multiple messages have this Message-ID (diff)
From: Stefan Agner <stefan-XLVq0VzYD2Y@public.gmane.org>
To: shawnguo-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
	kernel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org
Cc: fabio.estevam-3arQi8VN3Tc@public.gmane.org,
	robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
	mark.rutland-5wv7dgnIgG8@public.gmane.org,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	Stefan Agner <stefan-XLVq0VzYD2Y@public.gmane.org>
Subject: [PATCH v2 7/7] ARM: dts: imx6ull: add UART8 support
Date: Wed, 10 Jan 2018 22:04:53 +0100	[thread overview]
Message-ID: <20180110210453.19264-7-stefan@agner.ch> (raw)
In-Reply-To: <20180110210453.19264-1-stefan-XLVq0VzYD2Y@public.gmane.org>

In i.MX 6ULL UART8 is part of the AIPS-3 memory map instead of
AIPS-1. Clocks and interrupts remain the same.

Signed-off-by: Stefan Agner <stefan-XLVq0VzYD2Y@public.gmane.org>
Reviewed-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
Acked-by: Dong Aisheng <aisheng.dong-3arQi8VN3Tc@public.gmane.org>
---
 arch/arm/boot/dts/imx6ull.dtsi | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm/boot/dts/imx6ull.dtsi b/arch/arm/boot/dts/imx6ull.dtsi
index bc2cd4fb8b12..571ddd71cdba 100644
--- a/arch/arm/boot/dts/imx6ull.dtsi
+++ b/arch/arm/boot/dts/imx6ull.dtsi
@@ -43,6 +43,9 @@
 #include "imx6ull-pinfunc.h"
 #include "imx6ull-pinfunc-snvs.h"
 
+/* Delete UART8 in AIPS-1 (i.MX6UL specific) */
+/delete-node/ &uart8;
+
 / {
 	soc {
 		aips3: aips-bus@2200000 {
@@ -56,6 +59,17 @@
 				compatible = "fsl,imx6ull-iomuxc-snvs";
 				reg = <0x02290000 0x4000>;
 			};
+
+			uart8: serial@2288000 {
+				compatible = "fsl,imx6ul-uart",
+					     "fsl,imx6q-uart";
+				reg = <0x02288000 0x4000>;
+				interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&clks IMX6UL_CLK_UART8_IPG>,
+					 <&clks IMX6UL_CLK_UART8_SERIAL>;
+				clock-names = "ipg", "per";
+				status = "disabled";
+			};
 		};
 	};
 };
-- 
2.15.1

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WARNING: multiple messages have this Message-ID (diff)
From: Stefan Agner <stefan@agner.ch>
To: shawnguo@kernel.org, kernel@pengutronix.de
Cc: fabio.estevam@nxp.com, robh+dt@kernel.org, mark.rutland@arm.com,
	linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, Stefan Agner <stefan@agner.ch>
Subject: [PATCH v2 7/7] ARM: dts: imx6ull: add UART8 support
Date: Wed, 10 Jan 2018 22:04:53 +0100	[thread overview]
Message-ID: <20180110210453.19264-7-stefan@agner.ch> (raw)
In-Reply-To: <20180110210453.19264-1-stefan@agner.ch>

In i.MX 6ULL UART8 is part of the AIPS-3 memory map instead of
AIPS-1. Clocks and interrupts remain the same.

Signed-off-by: Stefan Agner <stefan@agner.ch>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Dong Aisheng <aisheng.dong@nxp.com>
---
 arch/arm/boot/dts/imx6ull.dtsi | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm/boot/dts/imx6ull.dtsi b/arch/arm/boot/dts/imx6ull.dtsi
index bc2cd4fb8b12..571ddd71cdba 100644
--- a/arch/arm/boot/dts/imx6ull.dtsi
+++ b/arch/arm/boot/dts/imx6ull.dtsi
@@ -43,6 +43,9 @@
 #include "imx6ull-pinfunc.h"
 #include "imx6ull-pinfunc-snvs.h"
 
+/* Delete UART8 in AIPS-1 (i.MX6UL specific) */
+/delete-node/ &uart8;
+
 / {
 	soc {
 		aips3: aips-bus@2200000 {
@@ -56,6 +59,17 @@
 				compatible = "fsl,imx6ull-iomuxc-snvs";
 				reg = <0x02290000 0x4000>;
 			};
+
+			uart8: serial@2288000 {
+				compatible = "fsl,imx6ul-uart",
+					     "fsl,imx6q-uart";
+				reg = <0x02288000 0x4000>;
+				interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&clks IMX6UL_CLK_UART8_IPG>,
+					 <&clks IMX6UL_CLK_UART8_SERIAL>;
+				clock-names = "ipg", "per";
+				status = "disabled";
+			};
 		};
 	};
 };
-- 
2.15.1

  parent reply	other threads:[~2018-01-10 21:04 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-01-10 21:04 [PATCH v2 1/7] ARM: imx: add timer stop flag to ARM power off state Stefan Agner
2018-01-10 21:04 ` Stefan Agner
2018-01-10 21:04 ` [PATCH v2 2/7] ARM: dts: imx6ul: update i.MX 6UltraLite iomux headers Stefan Agner
2018-01-10 21:04   ` Stefan Agner
2018-01-10 21:04   ` Stefan Agner
2018-01-10 21:04 ` [PATCH v2 3/7] ARM: dts: imx6ull: add additional pinfunc defines for i.MX 6ULL Stefan Agner
2018-01-10 21:04   ` Stefan Agner
2018-01-10 21:04   ` Stefan Agner
2018-01-10 21:04 ` [PATCH v2 4/7] ARM: dts: imx6ul: add interrupt of virt-capable GIC Stefan Agner
2018-01-10 21:04   ` Stefan Agner
2018-01-10 21:04 ` [PATCH v2 5/7] ARM: dts: imx6ul: add ARM architected timer Stefan Agner
2018-01-10 21:04   ` Stefan Agner
2018-01-10 21:04   ` Stefan Agner
2018-01-10 21:04 ` [PATCH v2 6/7] ARM: dts: imx6ull: add IOMUXC SNVS instance Stefan Agner
2018-01-10 21:04   ` Stefan Agner
2018-01-10 21:04 ` Stefan Agner [this message]
2018-01-10 21:04   ` [PATCH v2 7/7] ARM: dts: imx6ull: add UART8 support Stefan Agner
2018-01-10 21:04   ` Stefan Agner
2018-02-02  6:16 ` [PATCH v2 1/7] ARM: imx: add timer stop flag to ARM power off state Shawn Guo
2018-02-02  6:16   ` Shawn Guo
2018-02-02  6:16   ` Shawn Guo

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