Re: [PATCH RFC 1/4] drivers: irqchip: pdc: add support for PDC interrupt controller

[Lina Iyer <ilina@codeaurora.org>]

On Wed, Jan 31 2018 at 16:46 +0000, Marc Zyngier wrote:
>On 31/01/18 16:24, Lina Iyer wrote:
>> On Tue, Jan 30 2018 at 18:11 +0000, Marc Zyngier wrote:
>>> On 30/01/18 17:56, Lina Iyer wrote:
>>>> On Wed, Jan 24 2018 at 14:20 +0000, Marc Zyngier wrote:
>>>>> On 23/01/18 17:56, Lina Iyer wrote:
>>>>>> From : Archana Sathyakumar <asathyak@codeaurora.org>
>>>>>>
>>>>>> The Power Domain Controller (PDC) hardware block on Qualcomm SoCs houses
>>>>>> an interrupt controller along with other domain control functions to
>>>>>> handle interrupt related functions like handle falling edge or active
>>>>>> low which are not detected at the GIC and handle wakeup interrupts.
>>>>>>
>>>>>> The interrupt controller is on an always-on domain for the purpose of
>>>>>> waking up the processor, but only a subset of the processor's interrupts
>>>>>> are routed through the PDC to the GIC. The PDC powers on the processor's
>>>>>> domain, bringing the domain out of low power mode and replays the
>>>>>> pending interrupts so the GIC may wake up the processor.
>>>>>>
>>>>>> Signed-off-by: Archana Sathyakumar <asathyak@codeaurora.org>
>>>>>> Signed-off-by: Lina Iyer <ilina@codeaurora.org>
>>>>>> [Lina: Split out DT bindings target data and initialization changes]
>>>>>> ---
>>>>
>> We looked at tegra's implementation and it appears similar, thought they
>> don't seemt to have the same complexity.
>
>Exactly. They are pretty similar. Hence my suggestion to adopt the same
>approach, which you don't seem to agree with.
>
I am reworking the driver based on what you have suggested in this
thread. Will submit a patchset for review in the next couple of days.

Once again, thank you for your time Marc.

-- Lina