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From: Boris Brezillon <boris.brezillon@bootlin.com>
To: David Woodhouse <dwmw2@infradead.org>,
	Brian Norris <computersforpeace@gmail.com>,
	Boris Brezillon <boris.brezillon@free-electrons.com>,
	Marek Vasut <marek.vasut@gmail.com>,
	Richard Weinberger <richard@nod.at>,
	Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>,
	linux-mtd@lists.infradead.org, Mark Brown <broonie@kernel.org>,
	linux-spi@vger.kernel.org
Cc: "Peter Pan" <peterpansjtu@gmail.com>,
	"Frieder Schrempf" <frieder.schrempf@exceet.de>,
	"Vignesh R" <vigneshr@ti.com>,
	"Yogesh Gaur" <yogeshnarayan.gaur@nxp.com>,
	"Rafał Miłecki" <rafal@milecki.pl>,
	"Kamal Dasu" <kdasu.kdev@gmail.com>,
	"Sourav Poddar" <sourav.poddar@ti.com>
Subject: Re: [RFC PATCH 4/6] spi: ti-qspi: Implement the spi_mem interface
Date: Fri, 16 Feb 2018 11:25:54 +0100	[thread overview]
Message-ID: <20180216112554.35f79e55@bbrezillon> (raw)
In-Reply-To: <20180205232120.5851-5-boris.brezillon@bootlin.com>

On Tue,  6 Feb 2018 00:21:18 +0100
Boris Brezillon <boris.brezillon@bootlin.com> wrote:


> @@ -566,6 +567,62 @@ static int ti_qspi_spi_flash_read(struct spi_device *spi,
>  	return ret;
>  }
>  
> +static int ti_qspi_exec_mem_op(struct spi_mem *mem,
> +			       const struct spi_mem_op *op)
> +{
> +	struct ti_qspi *qspi = spi_master_get_devdata(mem->spi->master);
> +	int i, ret = 0;
> +	u32 from = 0;
> +
> +	/* Only optimize read path. */
> +	if (!op->data.nbytes || op->data.dir != SPI_MEM_DATA_IN ||
> +	    !op->addr.nbytes || op->addr.nbytes > 4)
> +		return -ENOTSUPP;
> +
> +	for (i = 0; i < op->addr.nbytes; i++) {
> +		from <<= 8;
> +		from |= op->addr.buf[i];
> +	}
> +
> +	/* Address exceeds MMIO window size, fall back to regular mode. */
> +	if (from > 0x4000000)
> +		return -ENOTSUPP;
> +
> +	mutex_lock(&qspi->list_lock);
> +
> +	if (!qspi->mmap_enabled)
> +		ti_qspi_enable_memory_map(mem->spi);
> +	ti_qspi_setup_mmap_read(mem->spi, op->cmd.opcode, op->data.buswidth,
> +				op->addr.nbytes, op->dummy.nbytes);
> +
> +	if (qspi->rx_chan) {
> +		struct sg_table sgt;
> +
> +		if (!virt_addr_valid(op->data.buf.in) &&
> +		    !spi_controller_dma_map_mem_op_data(mem->spi->master, op,
> +							&sgt)) {

As Vignesh just reported, it should be virt_addr_valid(op->data.buf.in)
and not !virt_addr_valid(op->data.buf.in).

> +			ret = ti_qspi_dma_xfer_sg(qspi, sgt, from);
> +			spi_controller_dma_unmap_mem_op_data(mem->spi->master,
> +							     op, &sgt);
> +		} else {
> +			ret = ti_qspi_dma_bounce_buffer(qspi, from,
> +							op->data.buf.in,
> +							op->data.nbytes);
> +		}
> +	} else {
> +		memcpy_fromio(op->data.buf.in, qspi->mmap_base + from,
> +			      op->data.nbytes);
> +	}
> +
> +	mutex_unlock(&qspi->list_lock);
> +
> +	return ret;
> +}
> +
> +static const struct spi_controller_mem_ops ti_qspi_mem_ops = {
> +	.exec_op = ti_qspi_exec_mem_op,
> +};
> +
>  static int ti_qspi_start_transfer_one(struct spi_master *master,
>  		struct spi_message *m)
>  {
> @@ -673,6 +730,7 @@ static int ti_qspi_probe(struct platform_device *pdev)
>  	master->bits_per_word_mask = SPI_BPW_MASK(32) | SPI_BPW_MASK(16) |
>  				     SPI_BPW_MASK(8);
>  	master->spi_flash_read = ti_qspi_spi_flash_read;
> +	master->mem_ops = &ti_qspi_mem_ops;
>  
>  	if (!of_property_read_u32(np, "num-cs", &num_cs))
>  		master->num_chipselect = num_cs;
> @@ -785,6 +843,7 @@ static int ti_qspi_probe(struct platform_device *pdev)
>  				 PTR_ERR(qspi->mmap_base));
>  			qspi->mmap_base = NULL;
>  			master->spi_flash_read = NULL;
> +			master->mem_ops = NULL;
>  		}
>  	}
>  	qspi->mmap_enabled = false;



-- 
Boris Brezillon, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
http://bootlin.com

WARNING: multiple messages have this Message-ID (diff)
From: Boris Brezillon <boris.brezillon-LDxbnhwyfcJBDgjK7y7TUQ@public.gmane.org>
To: David Woodhouse <dwmw2-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org>,
	Brian Norris
	<computersforpeace-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	Boris Brezillon
	<boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>,
	Marek Vasut <marek.vasut-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	Richard Weinberger <richard-/L3Ra7n9ekc@public.gmane.org>,
	Cyrille Pitchen
	<cyrille.pitchen-yU5RGvR974pGWvitb5QawA@public.gmane.org>,
	linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Cc: "Peter Pan"
	<peterpansjtu-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	"Frieder Schrempf"
	<frieder.schrempf-wPoT/lNZgHizQB+pC5nmwQ@public.gmane.org>,
	"Vignesh R" <vigneshr-l0cyMroinI0@public.gmane.org>,
	"Yogesh Gaur" <yogeshnarayan.gaur-3arQi8VN3Tc@public.gmane.org>,
	"Rafał Miłecki" <rafal-g1n6cQUeyibVItvQsEIGlw@public.gmane.org>,
	"Kamal Dasu" <kdasu.kdev-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	"Sourav Poddar" <sourav.poddar-l0cyMroinI0@public.gmane.org>
Subject: Re: [RFC PATCH 4/6] spi: ti-qspi: Implement the spi_mem interface
Date: Fri, 16 Feb 2018 11:25:54 +0100	[thread overview]
Message-ID: <20180216112554.35f79e55@bbrezillon> (raw)
In-Reply-To: <20180205232120.5851-5-boris.brezillon-LDxbnhwyfcJBDgjK7y7TUQ@public.gmane.org>

On Tue,  6 Feb 2018 00:21:18 +0100
Boris Brezillon <boris.brezillon-LDxbnhwyfcJBDgjK7y7TUQ@public.gmane.org> wrote:


> @@ -566,6 +567,62 @@ static int ti_qspi_spi_flash_read(struct spi_device *spi,
>  	return ret;
>  }
>  
> +static int ti_qspi_exec_mem_op(struct spi_mem *mem,
> +			       const struct spi_mem_op *op)
> +{
> +	struct ti_qspi *qspi = spi_master_get_devdata(mem->spi->master);
> +	int i, ret = 0;
> +	u32 from = 0;
> +
> +	/* Only optimize read path. */
> +	if (!op->data.nbytes || op->data.dir != SPI_MEM_DATA_IN ||
> +	    !op->addr.nbytes || op->addr.nbytes > 4)
> +		return -ENOTSUPP;
> +
> +	for (i = 0; i < op->addr.nbytes; i++) {
> +		from <<= 8;
> +		from |= op->addr.buf[i];
> +	}
> +
> +	/* Address exceeds MMIO window size, fall back to regular mode. */
> +	if (from > 0x4000000)
> +		return -ENOTSUPP;
> +
> +	mutex_lock(&qspi->list_lock);
> +
> +	if (!qspi->mmap_enabled)
> +		ti_qspi_enable_memory_map(mem->spi);
> +	ti_qspi_setup_mmap_read(mem->spi, op->cmd.opcode, op->data.buswidth,
> +				op->addr.nbytes, op->dummy.nbytes);
> +
> +	if (qspi->rx_chan) {
> +		struct sg_table sgt;
> +
> +		if (!virt_addr_valid(op->data.buf.in) &&
> +		    !spi_controller_dma_map_mem_op_data(mem->spi->master, op,
> +							&sgt)) {

As Vignesh just reported, it should be virt_addr_valid(op->data.buf.in)
and not !virt_addr_valid(op->data.buf.in).

> +			ret = ti_qspi_dma_xfer_sg(qspi, sgt, from);
> +			spi_controller_dma_unmap_mem_op_data(mem->spi->master,
> +							     op, &sgt);
> +		} else {
> +			ret = ti_qspi_dma_bounce_buffer(qspi, from,
> +							op->data.buf.in,
> +							op->data.nbytes);
> +		}
> +	} else {
> +		memcpy_fromio(op->data.buf.in, qspi->mmap_base + from,
> +			      op->data.nbytes);
> +	}
> +
> +	mutex_unlock(&qspi->list_lock);
> +
> +	return ret;
> +}
> +
> +static const struct spi_controller_mem_ops ti_qspi_mem_ops = {
> +	.exec_op = ti_qspi_exec_mem_op,
> +};
> +
>  static int ti_qspi_start_transfer_one(struct spi_master *master,
>  		struct spi_message *m)
>  {
> @@ -673,6 +730,7 @@ static int ti_qspi_probe(struct platform_device *pdev)
>  	master->bits_per_word_mask = SPI_BPW_MASK(32) | SPI_BPW_MASK(16) |
>  				     SPI_BPW_MASK(8);
>  	master->spi_flash_read = ti_qspi_spi_flash_read;
> +	master->mem_ops = &ti_qspi_mem_ops;
>  
>  	if (!of_property_read_u32(np, "num-cs", &num_cs))
>  		master->num_chipselect = num_cs;
> @@ -785,6 +843,7 @@ static int ti_qspi_probe(struct platform_device *pdev)
>  				 PTR_ERR(qspi->mmap_base));
>  			qspi->mmap_base = NULL;
>  			master->spi_flash_read = NULL;
> +			master->mem_ops = NULL;
>  		}
>  	}
>  	qspi->mmap_enabled = false;



-- 
Boris Brezillon, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
http://bootlin.com
--
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  parent reply	other threads:[~2018-02-16 10:26 UTC|newest]

Thread overview: 92+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-02-05 23:21 [RFC PATCH 0/6] spi: Extend the framework to generically support memory devices Boris Brezillon
2018-02-05 23:21 ` Boris Brezillon
2018-02-05 23:21 ` [RFC PATCH 1/6] spi: Extend the core to ease integration of SPI memory controllers Boris Brezillon
2018-02-05 23:21   ` Boris Brezillon
2018-02-06  9:43   ` Maxime Chevallier
2018-02-06  9:43     ` Maxime Chevallier
2018-02-06 10:25     ` Boris Brezillon
2018-02-06 10:25       ` Boris Brezillon
2018-02-06 12:06     ` Mark Brown
2018-02-06 12:06       ` Mark Brown
2018-02-09 12:52   ` Miquel Raynal
2018-02-09 12:52     ` Miquel Raynal
2018-02-11 16:00     ` Boris Brezillon
2018-02-11 16:00       ` Boris Brezillon
2018-02-12 11:50   ` Vignesh R
2018-02-12 11:50     ` Vignesh R
2018-02-12 12:28     ` Boris Brezillon
2018-02-12 12:28       ` Boris Brezillon
2018-02-19 13:53   ` Mark Brown
2018-02-19 14:20     ` Boris Brezillon
2018-02-19 14:00   ` Mark Brown
2018-02-19 14:32     ` Boris Brezillon
2018-02-28  7:51   ` Peter Pan
2018-02-28  7:51     ` Peter Pan
2018-02-28 12:25     ` Boris Brezillon
2018-02-28 12:25       ` Boris Brezillon
2018-03-04 21:15   ` Cyrille Pitchen
2018-03-04 21:15     ` Cyrille Pitchen
2018-03-05  9:00     ` Boris Brezillon
2018-03-05  9:00       ` Boris Brezillon
2018-03-05 13:01       ` Cyrille Pitchen
2018-03-05 13:01         ` Cyrille Pitchen
2018-03-05 13:47         ` Boris Brezillon
2018-03-05 13:47           ` Boris Brezillon
2018-03-08 14:07           ` Boris Brezillon
2018-03-08 14:07             ` Boris Brezillon
2018-02-05 23:21 ` [RFC PATCH 2/6] spi: bcm-qspi: Implement the spi_mem interface Boris Brezillon
2018-02-05 23:21   ` Boris Brezillon
2018-02-05 23:21 ` [RFC PATCH 3/6] spi: bcm53xx: " Boris Brezillon
2018-02-05 23:21   ` Boris Brezillon
2018-02-05 23:21 ` [RFC PATCH 4/6] spi: ti-qspi: " Boris Brezillon
2018-02-05 23:21   ` Boris Brezillon
2018-02-11 15:17   ` Miquel Raynal
2018-02-11 15:17     ` Miquel Raynal
2018-02-11 17:18     ` Boris Brezillon
2018-02-11 17:18       ` Boris Brezillon
2018-02-12  7:54       ` Miquel Raynal
2018-02-12  7:54         ` Miquel Raynal
2018-02-12 11:43   ` Vignesh R
2018-02-12 11:43     ` Vignesh R
2018-02-12 12:31     ` Boris Brezillon
2018-02-12 12:31       ` Boris Brezillon
2018-02-12 16:00       ` Vignesh R
2018-02-12 16:00         ` Vignesh R
2018-02-12 16:08         ` Boris Brezillon
2018-02-12 16:08           ` Boris Brezillon
2018-02-14 16:25           ` Vignesh R
2018-02-14 16:25             ` Vignesh R
2018-02-14 19:09             ` Boris Brezillon
2018-02-14 19:09               ` Boris Brezillon
2018-02-14 20:44               ` Schrempf Frieder
2018-02-14 20:44                 ` Schrempf Frieder
2018-02-14 21:00                 ` Boris Brezillon
2018-02-14 21:00                   ` Boris Brezillon
2018-02-15 16:38                   ` Schrempf Frieder
2018-02-15 16:38                     ` Schrempf Frieder
2018-02-17 11:01               ` Vignesh R
2018-02-17 11:01                 ` Vignesh R
2018-02-17 21:52                 ` Boris Brezillon
2018-02-17 21:52                   ` Boris Brezillon
2018-02-16 10:25   ` Boris Brezillon [this message]
2018-02-16 10:25     ` Boris Brezillon
2018-02-05 23:21 ` [RFC PATCH 5/6] mtd: spi-nor: Use the spi_mem_xx() API Boris Brezillon
2018-02-05 23:21   ` Boris Brezillon
2018-02-12 11:44   ` Vignesh R
2018-02-12 11:44     ` Vignesh R
2018-02-12 12:32     ` Boris Brezillon
2018-02-12 12:32       ` Boris Brezillon
2018-06-11  6:25   ` Yogesh Narayan Gaur
2018-06-11  6:25     ` Yogesh Narayan Gaur
2018-06-11  7:35     ` Boris Brezillon
2018-06-11  7:35       ` Boris Brezillon
2018-02-05 23:21 ` [RFC PATCH 6/6] spi: Get rid of the spi_flash_read() API Boris Brezillon
2018-02-05 23:21   ` Boris Brezillon
2018-02-16 10:21   ` Vignesh R
2018-02-16 10:21     ` Vignesh R
2018-02-16 10:24     ` Boris Brezillon
2018-02-16 10:24       ` Boris Brezillon
2018-02-19 16:25 ` [RFC PATCH 0/6] spi: Extend the framework to generically support memory devices Mark Brown
2018-02-19 16:51   ` Boris Brezillon
2018-03-04 21:40   ` Cyrille Pitchen
2018-03-04 21:40     ` Cyrille Pitchen

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