* [PATCH v4 0/1] drm/i915: Add and enable DP AUX CH mutex
@ 2018-02-26 21:48 José Roberto de Souza
2018-02-26 21:48 ` [PATCH v4 1/1] drm/i915/skl+: " José Roberto de Souza
` (2 more replies)
0 siblings, 3 replies; 6+ messages in thread
From: José Roberto de Souza @ 2018-02-26 21:48 UTC (permalink / raw)
To: intel-gfx
v2
- removed the PSR dependency, now getting lock all the times when available
- renamed functions to avoid nested calls
- moved register bits right after the DP_AUX_CH_MUTEX()
- removed 'drm/i915: keep AUX powered while PSR is enabled' Dhinakaran Pandiyan will sent a better and final version
v3
- rebased on top of Ville's AUX series
- moved port registers to above DP_AUX_CH_MUTEX()
- using intel_wait_for_register() instead of the internal version
v4
- removed virtual function to get mutex register address
- enabling the mutex back only on aux channel init
- added the aux channel name to the timeout debug message
José Roberto de Souza (1):
drm/i915/skl+: Add and enable DP AUX CH mutex
drivers/gpu/drm/i915/i915_reg.h | 9 ++++++++
drivers/gpu/drm/i915/intel_dp.c | 47 +++++++++++++++++++++++++++++++++++++++++
2 files changed, 56 insertions(+)
--
2.16.2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH v4 1/1] drm/i915/skl+: Add and enable DP AUX CH mutex
2018-02-26 21:48 [PATCH v4 0/1] drm/i915: Add and enable DP AUX CH mutex José Roberto de Souza
@ 2018-02-26 21:48 ` José Roberto de Souza
2018-02-26 22:41 ` Rodrigo Vivi
2018-02-26 22:25 ` ✓ Fi.CI.BAT: success for drm/i915: Add and enable DP AUX CH mutex (rev3) Patchwork
2018-02-27 1:09 ` ✓ Fi.CI.IGT: " Patchwork
2 siblings, 1 reply; 6+ messages in thread
From: José Roberto de Souza @ 2018-02-26 21:48 UTC (permalink / raw)
To: intel-gfx; +Cc: Dhinakaran Pandiyan, Rodrigo Vivi
When PSR/PSR2/GTC is enabled hardware can do AUX transactions by it
self, so lets use the mutex register that is available in gen9+ to
avoid concurrent access by hardware and driver.
Older gen handling will be done separated.
Reference: https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-skl-vol12-display.pdf
Page 198 - AUX programming sequence
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
drivers/gpu/drm/i915/i915_reg.h | 9 ++++++++
drivers/gpu/drm/i915/intel_dp.c | 47 +++++++++++++++++++++++++++++++++++++++++
2 files changed, 56 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index eea5b2c537d4..f36e839b4b4f 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -5385,6 +5385,15 @@ enum {
#define DP_AUX_CH_CTL_FW_SYNC_PULSE_SKL(c) (((c) - 1) << 5)
#define DP_AUX_CH_CTL_SYNC_PULSE_SKL(c) ((c) - 1)
+#define _DPA_AUX_CH_MUTEX (dev_priv->info.display_mmio_offset + 0x6402C)
+#define _DPB_AUX_CH_MUTEX (dev_priv->info.display_mmio_offset + 0x6412C)
+#define _DPC_AUX_CH_MUTEX (dev_priv->info.display_mmio_offset + 0x6422C)
+#define _DPD_AUX_CH_MUTEX (dev_priv->info.display_mmio_offset + 0x6432C)
+#define _DPF_AUX_CH_MUTEX (dev_priv->info.display_mmio_offset + 0x6452C)
+#define DP_AUX_CH_MUTEX(port) _MMIO_PORT(port, _DPA_AUX_CH_MUTEX, _DPB_AUX_CH_MUTEX)
+#define DP_AUX_CH_MUTEX_ENABLE (1 << 31)
+#define DP_AUX_CH_MUTEX_STATUS (1 << 30)
+
/*
* Computing GMCH M and N values for the Display Port link
*
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 2c3eb90b9499..7004239e4c9e 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1081,6 +1081,42 @@ static uint32_t intel_dp_get_aux_send_ctl(struct intel_dp *intel_dp,
aux_clock_divider);
}
+static bool intel_dp_aux_ch_trylock(struct intel_dp *intel_dp)
+{
+ struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
+ struct drm_i915_private *dev_priv =
+ to_i915(intel_dig_port->base.base.dev);
+
+ if (INTEL_GEN(dev_priv) < 9)
+ return true;
+
+ /* Spec says that mutex is acquired when status bit is read as unset,
+ * here waiting for 2msec(+-4 aux transactions) before give up.
+ */
+ if (intel_wait_for_register(dev_priv, DP_AUX_CH_MUTEX(intel_dp->aux_ch),
+ DP_AUX_CH_MUTEX_STATUS, 0, 2)) {
+ DRM_DEBUG_KMS("aux channel %c locked for 2msec, timing out\n",
+ aux_ch_name(intel_dp->aux_ch));
+ return false;
+ }
+
+ return true;
+}
+
+static void intel_dp_aux_ch_unlock(struct intel_dp *intel_dp)
+{
+ struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
+ struct drm_i915_private *dev_priv =
+ to_i915(intel_dig_port->base.base.dev);
+
+ if (INTEL_GEN(dev_priv) < 9)
+ return;
+
+ /* set the status bit releases the mutex + keeping mutex enabled */
+ I915_WRITE(DP_AUX_CH_MUTEX(intel_dp->aux_ch),
+ DP_AUX_CH_MUTEX_ENABLE | DP_AUX_CH_MUTEX_STATUS);
+}
+
static int
intel_dp_aux_ch(struct intel_dp *intel_dp,
const uint8_t *send, int send_bytes,
@@ -1119,6 +1155,11 @@ intel_dp_aux_ch(struct intel_dp *intel_dp,
intel_dp_check_edp(intel_dp);
+ if (!intel_dp_aux_ch_trylock(intel_dp)) {
+ ret = -EBUSY;
+ goto out_locked;
+ }
+
/* Try to wait for any previous AUX channel activity */
for (try = 0; try < 3; try++) {
status = I915_READ_NOTRACE(ch_ctl);
@@ -1248,6 +1289,8 @@ intel_dp_aux_ch(struct intel_dp *intel_dp,
ret = recv_bytes;
out:
+ intel_dp_aux_ch_unlock(intel_dp);
+out_locked:
pm_qos_update_request(&dev_priv->pm_qos, PM_QOS_DEFAULT_VALUE);
if (vdd)
@@ -1544,6 +1587,10 @@ intel_dp_aux_init(struct intel_dp *intel_dp)
else
intel_dp->get_aux_send_ctl = g4x_get_aux_send_ctl;
+ if (INTEL_GEN(dev_priv) >= 9)
+ I915_WRITE(DP_AUX_CH_MUTEX(intel_dp->aux_ch),
+ DP_AUX_CH_MUTEX_ENABLE);
+
drm_dp_aux_init(&intel_dp->aux);
/* Failure to allocate our preferred name is not critical */
--
2.16.2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 6+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915: Add and enable DP AUX CH mutex (rev3)
2018-02-26 21:48 [PATCH v4 0/1] drm/i915: Add and enable DP AUX CH mutex José Roberto de Souza
2018-02-26 21:48 ` [PATCH v4 1/1] drm/i915/skl+: " José Roberto de Souza
@ 2018-02-26 22:25 ` Patchwork
2018-02-27 1:09 ` ✓ Fi.CI.IGT: " Patchwork
2 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2018-02-26 22:25 UTC (permalink / raw)
To: José Roberto de Souza; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Add and enable DP AUX CH mutex (rev3)
URL : https://patchwork.freedesktop.org/series/38655/
State : success
== Summary ==
Series 38655v3 drm/i915: Add and enable DP AUX CH mutex
https://patchwork.freedesktop.org/api/1.0/series/38655/revisions/3/mbox/
---- Known issues:
Test debugfs_test:
Subgroup read_all_entries:
incomplete -> PASS (fi-snb-2520m) fdo#103713 +1
fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713
fi-bdw-5557u total:288 pass:267 dwarn:0 dfail:0 fail:0 skip:21 time:424s
fi-bdw-gvtdvm total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:426s
fi-blb-e6850 total:288 pass:223 dwarn:1 dfail:0 fail:0 skip:64 time:376s
fi-bsw-n3050 total:288 pass:242 dwarn:0 dfail:0 fail:0 skip:46 time:493s
fi-bwr-2160 total:288 pass:183 dwarn:0 dfail:0 fail:0 skip:105 time:289s
fi-bxt-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:479s
fi-bxt-j4205 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:480s
fi-byt-j1900 total:288 pass:253 dwarn:0 dfail:0 fail:0 skip:35 time:471s
fi-byt-n2820 total:288 pass:249 dwarn:0 dfail:0 fail:0 skip:39 time:456s
fi-cfl-8700k total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:395s
fi-cfl-s2 total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:578s
fi-cnl-y3 total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:573s
fi-elk-e7500 total:288 pass:229 dwarn:0 dfail:0 fail:0 skip:59 time:418s
fi-gdg-551 total:288 pass:179 dwarn:0 dfail:0 fail:1 skip:108 time:296s
fi-glk-1 total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:515s
fi-hsw-4770 total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:387s
fi-ilk-650 total:288 pass:228 dwarn:0 dfail:0 fail:0 skip:60 time:411s
fi-ivb-3520m total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:444s
fi-ivb-3770 total:288 pass:255 dwarn:0 dfail:0 fail:0 skip:33 time:409s
fi-kbl-7500u total:288 pass:263 dwarn:1 dfail:0 fail:0 skip:24 time:451s
fi-kbl-7560u total:288 pass:269 dwarn:0 dfail:0 fail:0 skip:19 time:490s
fi-kbl-7567u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:448s
fi-kbl-r total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:497s
fi-pnv-d510 total:288 pass:222 dwarn:1 dfail:0 fail:0 skip:65 time:594s
fi-skl-6260u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:425s
fi-skl-6600u total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:501s
fi-skl-6700hq total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:521s
fi-skl-6700k2 total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:490s
fi-skl-6770hq total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:466s
fi-skl-guc total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:405s
fi-skl-gvtdvm total:288 pass:265 dwarn:0 dfail:0 fail:0 skip:23 time:432s
fi-snb-2520m total:245 pass:211 dwarn:0 dfail:0 fail:0 skip:33
fi-snb-2600 total:288 pass:248 dwarn:0 dfail:0 fail:0 skip:40 time:392s
3a86cab5785058d50346e5a26f51dacbaab29c2e drm-tip: 2018y-02m-26d-15h-41m-02s UTC integration manifest
0e9c7c490026 drm/i915/skl+: Add and enable DP AUX CH mutex
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8164/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v4 1/1] drm/i915/skl+: Add and enable DP AUX CH mutex
2018-02-26 21:48 ` [PATCH v4 1/1] drm/i915/skl+: " José Roberto de Souza
@ 2018-02-26 22:41 ` Rodrigo Vivi
2018-02-27 3:31 ` Pandiyan, Dhinakaran
0 siblings, 1 reply; 6+ messages in thread
From: Rodrigo Vivi @ 2018-02-26 22:41 UTC (permalink / raw)
To: José Roberto de Souza; +Cc: intel-gfx, Dhinakaran Pandiyan
On Mon, Feb 26, 2018 at 01:48:37PM -0800, José Roberto de Souza wrote:
> When PSR/PSR2/GTC is enabled hardware can do AUX transactions by it
> self, so lets use the mutex register that is available in gen9+ to
> avoid concurrent access by hardware and driver.
> Older gen handling will be done separated.
>
> Reference: https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-skl-vol12-display.pdf
> Page 198 - AUX programming sequence
>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Cc: Jani Nikula <jani.nikula@linux.intel.com>
> Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 9 ++++++++
> drivers/gpu/drm/i915/intel_dp.c | 47 +++++++++++++++++++++++++++++++++++++++++
> 2 files changed, 56 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index eea5b2c537d4..f36e839b4b4f 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -5385,6 +5385,15 @@ enum {
> #define DP_AUX_CH_CTL_FW_SYNC_PULSE_SKL(c) (((c) - 1) << 5)
> #define DP_AUX_CH_CTL_SYNC_PULSE_SKL(c) ((c) - 1)
>
> +#define _DPA_AUX_CH_MUTEX (dev_priv->info.display_mmio_offset + 0x6402C)
> +#define _DPB_AUX_CH_MUTEX (dev_priv->info.display_mmio_offset + 0x6412C)
> +#define _DPC_AUX_CH_MUTEX (dev_priv->info.display_mmio_offset + 0x6422C)
> +#define _DPD_AUX_CH_MUTEX (dev_priv->info.display_mmio_offset + 0x6432C)
> +#define _DPF_AUX_CH_MUTEX (dev_priv->info.display_mmio_offset + 0x6452C)
> +#define DP_AUX_CH_MUTEX(port) _MMIO_PORT(port, _DPA_AUX_CH_MUTEX, _DPB_AUX_CH_MUTEX)
s/port/aux_ch
> +#define DP_AUX_CH_MUTEX_ENABLE (1 << 31)
> +#define DP_AUX_CH_MUTEX_STATUS (1 << 30)
> +
> /*
> * Computing GMCH M and N values for the Display Port link
> *
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 2c3eb90b9499..7004239e4c9e 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -1081,6 +1081,42 @@ static uint32_t intel_dp_get_aux_send_ctl(struct intel_dp *intel_dp,
> aux_clock_divider);
> }
>
> +static bool intel_dp_aux_ch_trylock(struct intel_dp *intel_dp)
> +{
> + struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
> + struct drm_i915_private *dev_priv =
> + to_i915(intel_dig_port->base.base.dev);
> +
> + if (INTEL_GEN(dev_priv) < 9)
> + return true;
> +
> + /* Spec says that mutex is acquired when status bit is read as unset,
> + * here waiting for 2msec(+-4 aux transactions) before give up.
> + */
> + if (intel_wait_for_register(dev_priv, DP_AUX_CH_MUTEX(intel_dp->aux_ch),
> + DP_AUX_CH_MUTEX_STATUS, 0, 2)) {
> + DRM_DEBUG_KMS("aux channel %c locked for 2msec, timing out\n",
> + aux_ch_name(intel_dp->aux_ch));
> + return false;
> + }
> +
> + return true;
> +}
> +
> +static void intel_dp_aux_ch_unlock(struct intel_dp *intel_dp)
> +{
> + struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
> + struct drm_i915_private *dev_priv =
> + to_i915(intel_dig_port->base.base.dev);
> +
> + if (INTEL_GEN(dev_priv) < 9)
> + return;
> +
> + /* set the status bit releases the mutex + keeping mutex enabled */
> + I915_WRITE(DP_AUX_CH_MUTEX(intel_dp->aux_ch),
> + DP_AUX_CH_MUTEX_ENABLE | DP_AUX_CH_MUTEX_STATUS);
> +}
> +
> static int
> intel_dp_aux_ch(struct intel_dp *intel_dp,
> const uint8_t *send, int send_bytes,
> @@ -1119,6 +1155,11 @@ intel_dp_aux_ch(struct intel_dp *intel_dp,
>
> intel_dp_check_edp(intel_dp);
>
> + if (!intel_dp_aux_ch_trylock(intel_dp)) {
> + ret = -EBUSY;
> + goto out_locked;
out_"locked" confused me here...
not sure about a better name...
maybe out_aux_unlocked ?! :/
> + }
> +
> /* Try to wait for any previous AUX channel activity */
> for (try = 0; try < 3; try++) {
> status = I915_READ_NOTRACE(ch_ctl);
> @@ -1248,6 +1289,8 @@ intel_dp_aux_ch(struct intel_dp *intel_dp,
>
> ret = recv_bytes;
> out:
> + intel_dp_aux_ch_unlock(intel_dp);
> +out_locked:
> pm_qos_update_request(&dev_priv->pm_qos, PM_QOS_DEFAULT_VALUE);
>
> if (vdd)
> @@ -1544,6 +1587,10 @@ intel_dp_aux_init(struct intel_dp *intel_dp)
> else
> intel_dp->get_aux_send_ctl = g4x_get_aux_send_ctl;
>
> + if (INTEL_GEN(dev_priv) >= 9)
> + I915_WRITE(DP_AUX_CH_MUTEX(intel_dp->aux_ch),
> + DP_AUX_CH_MUTEX_ENABLE);
> +
Cool! I believe we are in a good shape now...
with s/port/aux_ch corrected and preferably with a better goto out name:
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> drm_dp_aux_init(&intel_dp->aux);
>
> /* Failure to allocate our preferred name is not critical */
> --
> 2.16.2
>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* ✓ Fi.CI.IGT: success for drm/i915: Add and enable DP AUX CH mutex (rev3)
2018-02-26 21:48 [PATCH v4 0/1] drm/i915: Add and enable DP AUX CH mutex José Roberto de Souza
2018-02-26 21:48 ` [PATCH v4 1/1] drm/i915/skl+: " José Roberto de Souza
2018-02-26 22:25 ` ✓ Fi.CI.BAT: success for drm/i915: Add and enable DP AUX CH mutex (rev3) Patchwork
@ 2018-02-27 1:09 ` Patchwork
2 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2018-02-27 1:09 UTC (permalink / raw)
To: José Roberto de Souza; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Add and enable DP AUX CH mutex (rev3)
URL : https://patchwork.freedesktop.org/series/38655/
State : success
== Summary ==
---- Known issues:
Test kms_flip:
Subgroup dpms-vs-vblank-race-interruptible:
fail -> PASS (shard-hsw) fdo#103060
Subgroup plain-flip-fb-recreate-interruptible:
fail -> PASS (shard-hsw) fdo#100368
Test kms_flip_tiling:
Subgroup flip-yf-tiled:
fail -> PASS (shard-apl) fdo#103822
Test kms_plane:
Subgroup plane-position-hole-dpms-pipe-b-planes:
pass -> FAIL (shard-apl) fdo#103166
Test kms_rotation_crc:
Subgroup primary-rotation-180:
fail -> PASS (shard-hsw) fdo#103925
fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060
fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
fdo#103822 https://bugs.freedesktop.org/show_bug.cgi?id=103822
fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166
fdo#103925 https://bugs.freedesktop.org/show_bug.cgi?id=103925
shard-apl total:3460 pass:1818 dwarn:1 dfail:0 fail:8 skip:1632 time:12309s
shard-hsw total:3460 pass:1767 dwarn:1 dfail:0 fail:1 skip:1690 time:11824s
shard-snb total:3460 pass:1359 dwarn:1 dfail:0 fail:1 skip:2099 time:6658s
Blacklisted hosts:
shard-kbl total:3460 pass:1944 dwarn:1 dfail:0 fail:7 skip:1508 time:9631s
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8164/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v4 1/1] drm/i915/skl+: Add and enable DP AUX CH mutex
2018-02-26 22:41 ` Rodrigo Vivi
@ 2018-02-27 3:31 ` Pandiyan, Dhinakaran
0 siblings, 0 replies; 6+ messages in thread
From: Pandiyan, Dhinakaran @ 2018-02-27 3:31 UTC (permalink / raw)
To: Vivi, Rodrigo; +Cc: intel-gfx@lists.freedesktop.org
On Mon, 2018-02-26 at 14:41 -0800, Rodrigo Vivi wrote:
> On Mon, Feb 26, 2018 at 01:48:37PM -0800, José Roberto de Souza wrote:
> > When PSR/PSR2/GTC is enabled hardware can do AUX transactions by it
> > self, so lets use the mutex register that is available in gen9+ to
> > avoid concurrent access by hardware and driver.
> > Older gen handling will be done separated.
> >
> > Reference: https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-skl-vol12-display.pdf
> > Page 198 - AUX programming sequence
> >
> > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > Cc: Jani Nikula <jani.nikula@linux.intel.com>
> > Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> > ---
> > drivers/gpu/drm/i915/i915_reg.h | 9 ++++++++
> > drivers/gpu/drm/i915/intel_dp.c | 47 +++++++++++++++++++++++++++++++++++++++++
> > 2 files changed, 56 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> > index eea5b2c537d4..f36e839b4b4f 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -5385,6 +5385,15 @@ enum {
> > #define DP_AUX_CH_CTL_FW_SYNC_PULSE_SKL(c) (((c) - 1) << 5)
> > #define DP_AUX_CH_CTL_SYNC_PULSE_SKL(c) ((c) - 1)
> >
> > +#define _DPA_AUX_CH_MUTEX (dev_priv->info.display_mmio_offset + 0x6402C)
> > +#define _DPB_AUX_CH_MUTEX (dev_priv->info.display_mmio_offset + 0x6412C)
> > +#define _DPC_AUX_CH_MUTEX (dev_priv->info.display_mmio_offset + 0x6422C)
> > +#define _DPD_AUX_CH_MUTEX (dev_priv->info.display_mmio_offset + 0x6432C)
> > +#define _DPF_AUX_CH_MUTEX (dev_priv->info.display_mmio_offset + 0x6452C)
> > +#define DP_AUX_CH_MUTEX(port) _MMIO_PORT(port, _DPA_AUX_CH_MUTEX, _DPB_AUX_CH_MUTEX)
>
> s/port/aux_ch
>
> > +#define DP_AUX_CH_MUTEX_ENABLE (1 << 31)
> > +#define DP_AUX_CH_MUTEX_STATUS (1 << 30)
> > +
> > /*
> > * Computing GMCH M and N values for the Display Port link
> > *
> > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> > index 2c3eb90b9499..7004239e4c9e 100644
> > --- a/drivers/gpu/drm/i915/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/intel_dp.c
> > @@ -1081,6 +1081,42 @@ static uint32_t intel_dp_get_aux_send_ctl(struct intel_dp *intel_dp,
> > aux_clock_divider);
> > }
> >
> > +static bool intel_dp_aux_ch_trylock(struct intel_dp *intel_dp)
> > +{
> > + struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
> > + struct drm_i915_private *dev_priv =
> > + to_i915(intel_dig_port->base.base.dev);
> > +
> > + if (INTEL_GEN(dev_priv) < 9)
> > + return true;
> > +
> > + /* Spec says that mutex is acquired when status bit is read as unset,
> > + * here waiting for 2msec(+-4 aux transactions) before give up.
> > + */
> > + if (intel_wait_for_register(dev_priv, DP_AUX_CH_MUTEX(intel_dp->aux_ch),
> > + DP_AUX_CH_MUTEX_STATUS, 0, 2)) {
> > + DRM_DEBUG_KMS("aux channel %c locked for 2msec, timing out\n",
> > + aux_ch_name(intel_dp->aux_ch));
> > + return false;
> > + }
> > +
With nits that Rodrigo pointed out addressed, feel free to use
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Btw for future reference, including change log in the commit message is
a good idea in the absence of a cover letter.
> > + return true;
> > +}
> > +
> > +static void intel_dp_aux_ch_unlock(struct intel_dp *intel_dp)
> > +{
> > + struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
> > + struct drm_i915_private *dev_priv =
> > + to_i915(intel_dig_port->base.base.dev);
> > +
> > + if (INTEL_GEN(dev_priv) < 9)
> > + return;
> > +
> > + /* set the status bit releases the mutex + keeping mutex enabled */
> > + I915_WRITE(DP_AUX_CH_MUTEX(intel_dp->aux_ch),
> > + DP_AUX_CH_MUTEX_ENABLE | DP_AUX_CH_MUTEX_STATUS);
> > +}
> > +
> > static int
> > intel_dp_aux_ch(struct intel_dp *intel_dp,
> > const uint8_t *send, int send_bytes,
> > @@ -1119,6 +1155,11 @@ intel_dp_aux_ch(struct intel_dp *intel_dp,
> >
> > intel_dp_check_edp(intel_dp);
> >
> > + if (!intel_dp_aux_ch_trylock(intel_dp)) {
> > + ret = -EBUSY;
> > + goto out_locked;
>
> out_"locked" confused me here...
>
> not sure about a better name...
>
> maybe out_aux_unlocked ?! :/
>
> > + }
> > +
> > /* Try to wait for any previous AUX channel activity */
> > for (try = 0; try < 3; try++) {
> > status = I915_READ_NOTRACE(ch_ctl);
> > @@ -1248,6 +1289,8 @@ intel_dp_aux_ch(struct intel_dp *intel_dp,
> >
> > ret = recv_bytes;
> > out:
> > + intel_dp_aux_ch_unlock(intel_dp);
> > +out_locked:
> > pm_qos_update_request(&dev_priv->pm_qos, PM_QOS_DEFAULT_VALUE);
> >
> > if (vdd)
> > @@ -1544,6 +1587,10 @@ intel_dp_aux_init(struct intel_dp *intel_dp)
> > else
> > intel_dp->get_aux_send_ctl = g4x_get_aux_send_ctl;
> >
> > + if (INTEL_GEN(dev_priv) >= 9)
> > + I915_WRITE(DP_AUX_CH_MUTEX(intel_dp->aux_ch),
> > + DP_AUX_CH_MUTEX_ENABLE);
> > +
>
> Cool! I believe we are in a good shape now...
>
> with s/port/aux_ch corrected and preferably with a better goto out name:
>
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
>
> > drm_dp_aux_init(&intel_dp->aux);
> >
> > /* Failure to allocate our preferred name is not critical */
> > --
> > 2.16.2
> >
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^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2018-02-27 3:31 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2018-02-26 21:48 [PATCH v4 0/1] drm/i915: Add and enable DP AUX CH mutex José Roberto de Souza
2018-02-26 21:48 ` [PATCH v4 1/1] drm/i915/skl+: " José Roberto de Souza
2018-02-26 22:41 ` Rodrigo Vivi
2018-02-27 3:31 ` Pandiyan, Dhinakaran
2018-02-26 22:25 ` ✓ Fi.CI.BAT: success for drm/i915: Add and enable DP AUX CH mutex (rev3) Patchwork
2018-02-27 1:09 ` ✓ Fi.CI.IGT: " Patchwork
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