[PATCH] drm/i915/gen9: Disable FBC on planes with a misaligned Y-offset

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* [PATCH] drm/i915/gen9: Disable FBC on planes with a misaligned Y-offset
@ 2018-02-28 15:36 Imre Deak
  2018-02-28 15:57 ` ✓ Fi.CI.BAT: success for " Patchwork
                   ` (4 more replies)
  0 siblings, 5 replies; 9+ messages in thread
From: Imre Deak @ 2018-02-28 15:36 UTC (permalink / raw)
  To: intel-gfx; +Cc: Paulo Zanoni

Enabling FBC on a plane having a Y-offset that isn't dividable by 4 may
cause pipe FIFO underruns and flickers, so disable FBC on such a config.

I tried to the followings to work around the issue:
- enable each HW work around in ILK_DPFC_CHICKEN
- disable each compression algorithm in ILK_DPFC_CONTROL
- disable low-power watermarks
None of the above got rid of the problem. I haven't found this issue in
the Bspec/WA database either.

Besides the igt testcase below (yet to be merged) an easy way to
reproduce the issue is to enable a plane with FBC and a plane Y-offset
not aligned to 4 and then just enable/disable FBC in a loop, keeping the
plane enabled.

I could trigger the problem on BXT/GLK/SKL, so assume for now that it's
only present on GEN9.

Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Testcase: igt/kms_plane/plane-clipping-pipe-A-planes
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/intel_fbc.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c
index 38b036c499d9..224c6a795f70 100644
--- a/drivers/gpu/drm/i915/intel_fbc.c
+++ b/drivers/gpu/drm/i915/intel_fbc.c
@@ -859,6 +859,17 @@ static bool intel_fbc_can_activate(struct intel_crtc *crtc)
 		return false;
 	}
 
+	/*
+	 * Work around a problem on GEN9 HW, where enabling FBC on a plane
+	 * having a Y offset that isn't dividable by 4 causes FIFO underrun
+	 * and screen ficker.
+	 */
+	if (INTEL_GEN(dev_priv) == 9 &&
+	    (fbc->state_cache.plane.adjusted_y & 3)) {
+		fbc->no_fbc_reason = "plane Y offset is misaligned";
+		return false;
+	}
+
 	return true;
 }
 
-- 
2.13.2

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 9+ messages in thread

* ✓ Fi.CI.BAT: success for drm/i915/gen9: Disable FBC on planes with a misaligned Y-offset
  2018-02-28 15:36 [PATCH] drm/i915/gen9: Disable FBC on planes with a misaligned Y-offset Imre Deak
@ 2018-02-28 15:57 ` Patchwork
  2018-02-28 16:05 ` [PATCH] " Ville Syrjälä
                   ` (3 subsequent siblings)
  4 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2018-02-28 15:57 UTC (permalink / raw)
  To: Imre Deak; +Cc: intel-gfx

== Series Details ==

Series: drm/i915/gen9: Disable FBC on planes with a misaligned Y-offset
URL   : https://patchwork.freedesktop.org/series/39129/
State : success

== Summary ==

Series 39129v1 drm/i915/gen9: Disable FBC on planes with a misaligned Y-offset
https://patchwork.freedesktop.org/api/1.0/series/39129/revisions/1/mbox/

---- Known issues:

Test debugfs_test:
        Subgroup read_all_entries:
                incomplete -> PASS       (fi-snb-2520m) fdo#103713
Test kms_chamelium:
        Subgroup dp-edid-read:
                pass       -> FAIL       (fi-kbl-7500u) fdo#102505
Test kms_pipe_crc_basic:
        Subgroup suspend-read-crc-pipe-a:
                pass       -> DMESG-WARN (fi-cnl-y3) fdo#103191

fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713
fdo#102505 https://bugs.freedesktop.org/show_bug.cgi?id=102505
fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191

fi-bdw-5557u     total:288  pass:267  dwarn:0   dfail:0   fail:0   skip:21  time:415s
fi-blb-e6850     total:288  pass:223  dwarn:1   dfail:0   fail:0   skip:64  time:374s
fi-bsw-n3050     total:288  pass:242  dwarn:0   dfail:0   fail:0   skip:46  time:489s
fi-bwr-2160      total:288  pass:183  dwarn:0   dfail:0   fail:0   skip:105 time:285s
fi-bxt-dsi       total:288  pass:258  dwarn:0   dfail:0   fail:0   skip:30  time:480s
fi-bxt-j4205     total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:485s
fi-byt-j1900     total:288  pass:253  dwarn:0   dfail:0   fail:0   skip:35  time:471s
fi-byt-n2820     total:288  pass:249  dwarn:0   dfail:0   fail:0   skip:39  time:461s
fi-cfl-8700k     total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:389s
fi-cfl-s2        total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:565s
fi-cnl-y3        total:288  pass:261  dwarn:1   dfail:0   fail:0   skip:26  time:572s
fi-elk-e7500     total:288  pass:229  dwarn:0   dfail:0   fail:0   skip:59  time:414s
fi-gdg-551       total:288  pass:179  dwarn:0   dfail:0   fail:1   skip:108 time:285s
fi-glk-1         total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:507s
fi-hsw-4770      total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:386s
fi-ilk-650       total:288  pass:228  dwarn:0   dfail:0   fail:0   skip:60  time:409s
fi-ivb-3520m     total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:458s
fi-ivb-3770      total:288  pass:255  dwarn:0   dfail:0   fail:0   skip:33  time:415s
fi-kbl-7500u     total:288  pass:262  dwarn:1   dfail:0   fail:1   skip:24  time:451s
fi-kbl-7560u     total:288  pass:269  dwarn:0   dfail:0   fail:0   skip:19  time:490s
fi-kbl-7567u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:449s
fi-kbl-r         total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:494s
fi-pnv-d510      total:288  pass:222  dwarn:1   dfail:0   fail:0   skip:65  time:588s
fi-skl-6260u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:426s
fi-skl-6600u     total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:501s
fi-skl-6700hq    total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:519s
fi-skl-6700k2    total:288  pass:264  dwarn:0   dfail:0   fail:0   skip:24  time:479s
fi-skl-6770hq    total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:483s
fi-skl-guc       total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:407s
fi-skl-gvtdvm    total:288  pass:265  dwarn:0   dfail:0   fail:0   skip:23  time:430s
fi-snb-2520m     total:288  pass:248  dwarn:0   dfail:0   fail:0   skip:40  time:525s
fi-snb-2600      total:288  pass:248  dwarn:0   dfail:0   fail:0   skip:40  time:392s

4d8ce7ac845a5152c92a18afb0e22e9278c9f7e1 drm-tip: 2018y-02m-28d-14h-17m-44s UTC integration manifest
1f0c25767bfc drm/i915/gen9: Disable FBC on planes with a misaligned Y-offset

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8187/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: [PATCH] drm/i915/gen9: Disable FBC on planes with a misaligned Y-offset
  2018-02-28 15:36 [PATCH] drm/i915/gen9: Disable FBC on planes with a misaligned Y-offset Imre Deak
  2018-02-28 15:57 ` ✓ Fi.CI.BAT: success for " Patchwork
@ 2018-02-28 16:05 ` Ville Syrjälä
  2018-02-28 16:53   ` Imre Deak
  2018-03-01 13:44   ` [PATCH v2] drm/i915/gen9, gen10: " Imre Deak
  2018-02-28 20:01 ` ✗ Fi.CI.IGT: warning for drm/i915/gen9: " Patchwork
                   ` (2 subsequent siblings)
  4 siblings, 2 replies; 9+ messages in thread
From: Ville Syrjälä @ 2018-02-28 16:05 UTC (permalink / raw)
  To: Imre Deak; +Cc: intel-gfx, Paulo Zanoni

On Wed, Feb 28, 2018 at 05:36:56PM +0200, Imre Deak wrote:
> Enabling FBC on a plane having a Y-offset that isn't dividable by 4 may
> cause pipe FIFO underruns and flickers, so disable FBC on such a config.
> 
> I tried to the followings to work around the issue:
> - enable each HW work around in ILK_DPFC_CHICKEN
> - disable each compression algorithm in ILK_DPFC_CONTROL
> - disable low-power watermarks
> None of the above got rid of the problem. I haven't found this issue in
> the Bspec/WA database either.
> 
> Besides the igt testcase below (yet to be merged) an easy way to
> reproduce the issue is to enable a plane with FBC and a plane Y-offset
> not aligned to 4 and then just enable/disable FBC in a loop, keeping the
> plane enabled.
> 
> I could trigger the problem on BXT/GLK/SKL, so assume for now that it's
> only present on GEN9.
> 
> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Testcase: igt/kms_plane/plane-clipping-pipe-A-planes
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_fbc.c | 11 +++++++++++
>  1 file changed, 11 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c
> index 38b036c499d9..224c6a795f70 100644
> --- a/drivers/gpu/drm/i915/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/intel_fbc.c
> @@ -859,6 +859,17 @@ static bool intel_fbc_can_activate(struct intel_crtc *crtc)
>  		return false;
>  	}
>  
> +	/*
> +	 * Work around a problem on GEN9 HW, where enabling FBC on a plane
> +	 * having a Y offset that isn't dividable by 4 causes FIFO underrun
> +	 * and screen ficker.

"divisible", "flicker"

> +	 */
> +	if (INTEL_GEN(dev_priv) == 9 &&

IS_GEN9()?

I do wonder about gen10+ however. GLK display pipes/planes did come
from CNL after all so it seems at least possible tht CNL suffers from
the same issue.

The patch seems sensible either way so
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> +	    (fbc->state_cache.plane.adjusted_y & 3)) {
> +		fbc->no_fbc_reason = "plane Y offset is misaligned";
> +		return false;
> +	}
> +
>  	return true;
>  }
>  
> -- 
> 2.13.2

-- 
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: [PATCH] drm/i915/gen9: Disable FBC on planes with a misaligned Y-offset
  2018-02-28 16:05 ` [PATCH] " Ville Syrjälä
@ 2018-02-28 16:53   ` Imre Deak
  2018-03-01 13:44   ` [PATCH v2] drm/i915/gen9, gen10: " Imre Deak
  1 sibling, 0 replies; 9+ messages in thread
From: Imre Deak @ 2018-02-28 16:53 UTC (permalink / raw)
  To: Ville Syrjälä; +Cc: intel-gfx, Paulo Zanoni

On Wed, Feb 28, 2018 at 06:05:11PM +0200, Ville Syrjälä wrote:
> On Wed, Feb 28, 2018 at 05:36:56PM +0200, Imre Deak wrote:
> > Enabling FBC on a plane having a Y-offset that isn't dividable by 4 may
> > cause pipe FIFO underruns and flickers, so disable FBC on such a config.
> > 
> > I tried to the followings to work around the issue:
> > - enable each HW work around in ILK_DPFC_CHICKEN
> > - disable each compression algorithm in ILK_DPFC_CONTROL
> > - disable low-power watermarks
> > None of the above got rid of the problem. I haven't found this issue in
> > the Bspec/WA database either.
> > 
> > Besides the igt testcase below (yet to be merged) an easy way to
> > reproduce the issue is to enable a plane with FBC and a plane Y-offset
> > not aligned to 4 and then just enable/disable FBC in a loop, keeping the
> > plane enabled.
> > 
> > I could trigger the problem on BXT/GLK/SKL, so assume for now that it's
> > only present on GEN9.
> > 
> > Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Testcase: igt/kms_plane/plane-clipping-pipe-A-planes
> > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_fbc.c | 11 +++++++++++
> >  1 file changed, 11 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c
> > index 38b036c499d9..224c6a795f70 100644
> > --- a/drivers/gpu/drm/i915/intel_fbc.c
> > +++ b/drivers/gpu/drm/i915/intel_fbc.c
> > @@ -859,6 +859,17 @@ static bool intel_fbc_can_activate(struct intel_crtc *crtc)
> >  		return false;
> >  	}
> >  
> > +	/*
> > +	 * Work around a problem on GEN9 HW, where enabling FBC on a plane
> > +	 * having a Y offset that isn't dividable by 4 causes FIFO underrun
> > +	 * and screen ficker.
> 
> "divisible", "flicker"
> 
> > +	 */
> > +	if (INTEL_GEN(dev_priv) == 9 &&
> 
> IS_GEN9()?

Ok, will fix those.

> 
> I do wonder about gen10+ however. GLK display pipes/planes did come
> from CNL after all so it seems at least possible tht CNL suffers from
> the same issue.

Hm, right. I thought to enable the WA on CNL in case the same happens in
CI once the igt test is merged. It happens with the testcase somewhat
sporadically though but easy to repro with the FBC on/off method, so
I'll give it a go tomorrow on CNL as well.

I wonder if adding a better testcase doing only FBC on/off would make
sense (without the current delay during FBC enabling).

> 
> The patch seems sensible either way so
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> > +	    (fbc->state_cache.plane.adjusted_y & 3)) {
> > +		fbc->no_fbc_reason = "plane Y offset is misaligned";
> > +		return false;
> > +	}
> > +
> >  	return true;
> >  }
> >  
> > -- 
> > 2.13.2
> 
> -- 
> Ville Syrjälä
> Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 9+ messages in thread

* [PATCH v2] drm/i915/gen9, gen10: Disable FBC on planes with a misaligned Y-offset
  2018-02-28 16:05 ` [PATCH] " Ville Syrjälä
  2018-02-28 16:53   ` Imre Deak
@ 2018-03-01 13:44   ` Imre Deak
  1 sibling, 0 replies; 9+ messages in thread
From: Imre Deak @ 2018-03-01 13:44 UTC (permalink / raw)
  To: intel-gfx; +Cc: Paulo Zanoni

Enabling FBC on a plane having a Y-offset that isn't divisible by 4 may
cause pipe FIFO underruns and flickers, so disable FBC on such a config.

I tried the followings to work around the issue:
- enable each HW work around in ILK_DPFC_CHICKEN
- disable each compression algorithm in ILK_DPFC_CONTROL
- disable low-power watermarks
None of the above got rid of the problem. I haven't found this issue in
the Bspec/WA database either.

Besides the igt testcase below (yet to be merged) an easy way to
reproduce the issue is to enable a plane with FBC and a plane Y-offset
not aligned to 4 and then just enable/disable FBC in a loop, keeping the
plane enabled.

I could trigger the problem on BXT/GLK/SKL/CNL, so assume for now that it's
only present on GEN9 and GEN10.

v2: (Ville)
- Run the test/apply the WA on CNL as well.
- Use IS_GEN() instead of INTEL_GEN().
- Fix spelling.

Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Testcase: igt/kms_plane/plane-clipping-pipe-A-planes
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_fbc.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c
index 38b036c499d9..d225de828f38 100644
--- a/drivers/gpu/drm/i915/intel_fbc.c
+++ b/drivers/gpu/drm/i915/intel_fbc.c
@@ -859,6 +859,16 @@ static bool intel_fbc_can_activate(struct intel_crtc *crtc)
 		return false;
 	}
 
+	/*
+	 * Work around a problem on GEN9+ HW, where enabling FBC on a plane
+	 * having a Y offset that isn't divisible by 4 causes FIFO underrun
+	 * and screen flicker.
+	 */
+	if (IS_GEN(dev_priv, 9, 10) && (fbc->state_cache.plane.adjusted_y & 3)) {
+		fbc->no_fbc_reason = "plane Y offset is misaligned";
+		return false;
+	}
+
 	return true;
 }
 
-- 
2.13.2

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 9+ messages in thread

* ✗ Fi.CI.IGT: warning for drm/i915/gen9: Disable FBC on planes with a misaligned Y-offset
  2018-02-28 15:36 [PATCH] drm/i915/gen9: Disable FBC on planes with a misaligned Y-offset Imre Deak
  2018-02-28 15:57 ` ✓ Fi.CI.BAT: success for " Patchwork
  2018-02-28 16:05 ` [PATCH] " Ville Syrjälä
@ 2018-02-28 20:01 ` Patchwork
  2018-03-01 14:40 ` ✓ Fi.CI.BAT: success for drm/i915/gen9: Disable FBC on planes with a misaligned Y-offset (rev2) Patchwork
  2018-03-01 22:48 ` ✓ Fi.CI.IGT: " Patchwork
  4 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2018-02-28 20:01 UTC (permalink / raw)
  To: Imre Deak; +Cc: intel-gfx

== Series Details ==

Series: drm/i915/gen9: Disable FBC on planes with a misaligned Y-offset
URL   : https://patchwork.freedesktop.org/series/39129/
State : warning

== Summary ==

---- Possible new issues:

Test kms_chv_cursor_fail:
        Subgroup pipe-b-256x256-bottom-edge:
                pass       -> DMESG-WARN (shard-snb)
        Subgroup pipe-b-64x64-left-edge:
                pass       -> DMESG-WARN (shard-snb)
Test pm_rc6_residency:
        Subgroup rc6-accuracy:
                skip       -> PASS       (shard-snb)

---- Known issues:

Test kms_atomic_transition:
        Subgroup 1x-modeset-transitions-nonblocking-fencing:
                pass       -> FAIL       (shard-apl) fdo#103207
Test kms_chv_cursor_fail:
        Subgroup pipe-b-64x64-top-edge:
                pass       -> DMESG-WARN (shard-snb) fdo#105185 +1
Test kms_cursor_crc:
        Subgroup cursor-64x64-suspend:
                pass       -> INCOMPLETE (shard-hsw) fdo#103540
Test kms_flip:
        Subgroup 2x-plain-flip-fb-recreate-interruptible:
                pass       -> FAIL       (shard-hsw) fdo#100368
Test kms_frontbuffer_tracking:
        Subgroup fbc-1p-pri-indfb-multidraw:
                fail       -> PASS       (shard-snb) fdo#103167
Test kms_sysfs_edid_timing:
                pass       -> WARN       (shard-apl) fdo#100047

fdo#103207 https://bugs.freedesktop.org/show_bug.cgi?id=103207
fdo#105185 https://bugs.freedesktop.org/show_bug.cgi?id=105185
fdo#103540 https://bugs.freedesktop.org/show_bug.cgi?id=103540
fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
fdo#100047 https://bugs.freedesktop.org/show_bug.cgi?id=100047

shard-apl        total:3460 pass:1818 dwarn:1   dfail:0   fail:8   skip:1632 time:12185s
shard-hsw        total:3429 pass:1751 dwarn:1   dfail:0   fail:2   skip:1673 time:11330s
shard-snb        total:3460 pass:1357 dwarn:4   dfail:0   fail:1   skip:2098 time:6596s
Blacklisted hosts:
shard-kbl        total:3410 pass:1920 dwarn:2   dfail:0   fail:7   skip:1480 time:9368s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8187/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 9+ messages in thread

* ✓ Fi.CI.BAT: success for drm/i915/gen9: Disable FBC on planes with a misaligned Y-offset (rev2)
  2018-02-28 15:36 [PATCH] drm/i915/gen9: Disable FBC on planes with a misaligned Y-offset Imre Deak
                   ` (2 preceding siblings ...)
  2018-02-28 20:01 ` ✗ Fi.CI.IGT: warning for drm/i915/gen9: " Patchwork
@ 2018-03-01 14:40 ` Patchwork
  2018-03-01 22:48 ` ✓ Fi.CI.IGT: " Patchwork
  4 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2018-03-01 14:40 UTC (permalink / raw)
  To: Imre Deak; +Cc: intel-gfx

== Series Details ==

Series: drm/i915/gen9: Disable FBC on planes with a misaligned Y-offset (rev2)
URL   : https://patchwork.freedesktop.org/series/39129/
State : success

== Summary ==

Series 39129v2 drm/i915/gen9: Disable FBC on planes with a misaligned Y-offset
https://patchwork.freedesktop.org/api/1.0/series/39129/revisions/2/mbox/

---- Known issues:

Test debugfs_test:
        Subgroup read_all_entries:
                pass       -> INCOMPLETE (fi-snb-2520m) fdo#103713
Test gem_mmap_gtt:
        Subgroup basic-small-bo-tiledx:
                fail       -> PASS       (fi-gdg-551) fdo#102575
Test kms_chamelium:
        Subgroup hdmi-hpd-fast:
                fail       -> SKIP       (fi-kbl-7500u) fdo#105310 +4

fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713
fdo#102575 https://bugs.freedesktop.org/show_bug.cgi?id=102575
fdo#105310 https://bugs.freedesktop.org/show_bug.cgi?id=105310

fi-bdw-5557u     total:288  pass:267  dwarn:0   dfail:0   fail:0   skip:21  time:416s
fi-blb-e6850     total:288  pass:223  dwarn:1   dfail:0   fail:0   skip:64  time:371s
fi-bsw-n3050     total:288  pass:242  dwarn:0   dfail:0   fail:0   skip:46  time:483s
fi-bwr-2160      total:288  pass:183  dwarn:0   dfail:0   fail:0   skip:105 time:277s
fi-bxt-dsi       total:288  pass:258  dwarn:0   dfail:0   fail:0   skip:30  time:481s
fi-bxt-j4205     total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:482s
fi-byt-j1900     total:288  pass:253  dwarn:0   dfail:0   fail:0   skip:35  time:467s
fi-byt-n2820     total:288  pass:249  dwarn:0   dfail:0   fail:0   skip:39  time:454s
fi-cfl-8700k     total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:391s
fi-cfl-s2        total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:564s
fi-cnl-y3        total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:575s
fi-elk-e7500     total:288  pass:229  dwarn:0   dfail:0   fail:0   skip:59  time:407s
fi-gdg-551       total:288  pass:180  dwarn:0   dfail:0   fail:0   skip:108 time:291s
fi-glk-1         total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:505s
fi-hsw-4770      total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:386s
fi-ilk-650       total:288  pass:228  dwarn:0   dfail:0   fail:0   skip:60  time:414s
fi-ivb-3520m     total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:456s
fi-ivb-3770      total:288  pass:255  dwarn:0   dfail:0   fail:0   skip:33  time:412s
fi-kbl-7500u     total:288  pass:260  dwarn:0   dfail:0   fail:4   skip:24  time:479s
fi-kbl-7560u     total:288  pass:269  dwarn:0   dfail:0   fail:0   skip:19  time:486s
fi-kbl-7567u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:448s
fi-kbl-r         total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:493s
fi-pnv-d510      total:288  pass:222  dwarn:1   dfail:0   fail:0   skip:65  time:587s
fi-skl-6260u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:421s
fi-skl-6600u     total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:498s
fi-skl-6700hq    total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:518s
fi-skl-6700k2    total:288  pass:264  dwarn:0   dfail:0   fail:0   skip:24  time:483s
fi-skl-6770hq    total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:481s
fi-skl-guc       total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:407s
fi-skl-gvtdvm    total:288  pass:265  dwarn:0   dfail:0   fail:0   skip:23  time:427s
fi-snb-2520m     total:3    pass:2    dwarn:0   dfail:0   fail:0   skip:0  
fi-snb-2600      total:288  pass:248  dwarn:0   dfail:0   fail:0   skip:40  time:389s
Blacklisted hosts:
fi-cfl-u         total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:499s

61da3e8943e4b5e643e3d72f3a925227fe4cb84c drm-tip: 2018y-03m-01d-13h-30m-46s UTC integration manifest
3e61c0c72b96 drm/i915/gen9, gen10: Disable FBC on planes with a misaligned Y-offset

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8199/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 9+ messages in thread

* ✓ Fi.CI.IGT: success for drm/i915/gen9: Disable FBC on planes with a misaligned Y-offset (rev2)
  2018-02-28 15:36 [PATCH] drm/i915/gen9: Disable FBC on planes with a misaligned Y-offset Imre Deak
                   ` (3 preceding siblings ...)
  2018-03-01 14:40 ` ✓ Fi.CI.BAT: success for drm/i915/gen9: Disable FBC on planes with a misaligned Y-offset (rev2) Patchwork
@ 2018-03-01 22:48 ` Patchwork
  2018-03-02 15:54   ` Imre Deak
  4 siblings, 1 reply; 9+ messages in thread
From: Patchwork @ 2018-03-01 22:48 UTC (permalink / raw)
  To: Imre Deak; +Cc: intel-gfx

== Series Details ==

Series: drm/i915/gen9: Disable FBC on planes with a misaligned Y-offset (rev2)
URL   : https://patchwork.freedesktop.org/series/39129/
State : success

== Summary ==

---- Possible new issues:

Test kms_frontbuffer_tracking:
        Subgroup fbc-1p-offscren-pri-shrfb-draw-mmap-gtt:
                dmesg-fail -> PASS       (shard-apl)

---- Known issues:

Test drv_suspend:
        Subgroup debugfs-reader:
                pass       -> INCOMPLETE (shard-hsw) k.org#196691
Test gem_eio:
        Subgroup in-flight-contexts:
                pass       -> INCOMPLETE (shard-apl) fdo#104945
Test kms_chv_cursor_fail:
        Subgroup pipe-b-256x256-top-edge:
                dmesg-warn -> PASS       (shard-snb) fdo#105185 +2
Test kms_flip:
        Subgroup 2x-flip-vs-expired-vblank-interruptible:
                fail       -> PASS       (shard-hsw) fdo#102887
Test kms_frontbuffer_tracking:
        Subgroup fbc-1p-offscren-pri-indfb-draw-render:
                fail       -> PASS       (shard-apl) fdo#103167 +1
Test kms_sysfs_edid_timing:
                warn       -> PASS       (shard-apl) fdo#100047
Test perf:
        Subgroup polling:
                fail       -> PASS       (shard-hsw) fdo#102252

k.org#196691 https://bugzilla.kernel.org/show_bug.cgi?id=196691
fdo#104945 https://bugs.freedesktop.org/show_bug.cgi?id=104945
fdo#105185 https://bugs.freedesktop.org/show_bug.cgi?id=105185
fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887
fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
fdo#100047 https://bugs.freedesktop.org/show_bug.cgi?id=100047
fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252

shard-apl        total:3459 pass:1819 dwarn:1   dfail:0   fail:7   skip:1631 time:11761s
shard-hsw        total:3441 pass:1755 dwarn:1   dfail:0   fail:1   skip:1682 time:11665s
shard-snb        total:3461 pass:1360 dwarn:1   dfail:0   fail:1   skip:2099 time:6615s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8199/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: ✓ Fi.CI.IGT: success for drm/i915/gen9: Disable FBC on planes with a misaligned Y-offset (rev2)
  2018-03-01 22:48 ` ✓ Fi.CI.IGT: " Patchwork
@ 2018-03-02 15:54   ` Imre Deak
  0 siblings, 0 replies; 9+ messages in thread
From: Imre Deak @ 2018-03-02 15:54 UTC (permalink / raw)
  To: intel-gfx, Ville Syrjälä, paulo.r.zanoni

On Thu, Mar 01, 2018 at 10:48:25PM +0000, Patchwork wrote:
> == Series Details ==
> 
> Series: drm/i915/gen9: Disable FBC on planes with a misaligned Y-offset (rev2)
> URL   : https://patchwork.freedesktop.org/series/39129/
> State : success
> 
> == Summary ==

Thanks for the review, pushed it to -dinq.

> 
> ---- Possible new issues:
> 
> Test kms_frontbuffer_tracking:
>         Subgroup fbc-1p-offscren-pri-shrfb-draw-mmap-gtt:
>                 dmesg-fail -> PASS       (shard-apl)
> 
> ---- Known issues:
> 
> Test drv_suspend:
>         Subgroup debugfs-reader:
>                 pass       -> INCOMPLETE (shard-hsw) k.org#196691
> Test gem_eio:
>         Subgroup in-flight-contexts:
>                 pass       -> INCOMPLETE (shard-apl) fdo#104945
> Test kms_chv_cursor_fail:
>         Subgroup pipe-b-256x256-top-edge:
>                 dmesg-warn -> PASS       (shard-snb) fdo#105185 +2
> Test kms_flip:
>         Subgroup 2x-flip-vs-expired-vblank-interruptible:
>                 fail       -> PASS       (shard-hsw) fdo#102887
> Test kms_frontbuffer_tracking:
>         Subgroup fbc-1p-offscren-pri-indfb-draw-render:
>                 fail       -> PASS       (shard-apl) fdo#103167 +1
> Test kms_sysfs_edid_timing:
>                 warn       -> PASS       (shard-apl) fdo#100047
> Test perf:
>         Subgroup polling:
>                 fail       -> PASS       (shard-hsw) fdo#102252
> 
> k.org#196691 https://bugzilla.kernel.org/show_bug.cgi?id=196691
> fdo#104945 https://bugs.freedesktop.org/show_bug.cgi?id=104945
> fdo#105185 https://bugs.freedesktop.org/show_bug.cgi?id=105185
> fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887
> fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
> fdo#100047 https://bugs.freedesktop.org/show_bug.cgi?id=100047
> fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252
> 
> shard-apl        total:3459 pass:1819 dwarn:1   dfail:0   fail:7   skip:1631 time:11761s
> shard-hsw        total:3441 pass:1755 dwarn:1   dfail:0   fail:1   skip:1682 time:11665s
> shard-snb        total:3461 pass:1360 dwarn:1   dfail:0   fail:1   skip:2099 time:6615s
> 
> == Logs ==
> 
> For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8199/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 9+ messages in thread

end of thread, other threads:[~2018-03-02 15:54 UTC | newest]

Thread overview: 9+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2018-02-28 15:36 [PATCH] drm/i915/gen9: Disable FBC on planes with a misaligned Y-offset Imre Deak
2018-02-28 15:57 ` ✓ Fi.CI.BAT: success for " Patchwork
2018-02-28 16:05 ` [PATCH] " Ville Syrjälä
2018-02-28 16:53   ` Imre Deak
2018-03-01 13:44   ` [PATCH v2] drm/i915/gen9, gen10: " Imre Deak
2018-02-28 20:01 ` ✗ Fi.CI.IGT: warning for drm/i915/gen9: " Patchwork
2018-03-01 14:40 ` ✓ Fi.CI.BAT: success for drm/i915/gen9: Disable FBC on planes with a misaligned Y-offset (rev2) Patchwork
2018-03-01 22:48 ` ✓ Fi.CI.IGT: " Patchwork
2018-03-02 15:54   ` Imre Deak

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