From: Will Deacon <will.deacon@arm.com>
To: Shanker Donthineni <shankerd@codeaurora.org>
Cc: Marc Zyngier <marc.zyngier@arm.com>,
linux-kernel <linux-kernel@vger.kernel.org>,
linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
Catalin Marinas <catalin.marinas@arm.com>,
kvmarm <kvmarm@lists.cs.columbia.edu>,
Christoffer Dall <cdall@kernel.org>,
Vikram Sethi <vikrams@codeaurora.org>,
Sean Campbell <scampbel@codeaurora.org>,
Thomas Speier <tspeier@codeaurora.org>
Subject: Re: [PATCH v2] arm64: KVM: Use SMCCC_ARCH_WORKAROUND_1 for Falkor BP hardening
Date: Fri, 9 Mar 2018 13:48:09 +0000 [thread overview]
Message-ID: <20180309134809.GC15537@arm.com> (raw)
In-Reply-To: <1520269603-2900-1-git-send-email-shankerd@codeaurora.org>
Hi SHanker,
On Mon, Mar 05, 2018 at 11:06:43AM -0600, Shanker Donthineni wrote:
> The function SMCCC_ARCH_WORKAROUND_1 was introduced as part of SMC
> V1.1 Calling Convention to mitigate CVE-2017-5715. This patch uses
> the standard call SMCCC_ARCH_WORKAROUND_1 for Falkor chips instead
> of Silicon provider service ID 0xC2001700.
>
> Signed-off-by: Shanker Donthineni <shankerd@codeaurora.org>
> ---
> Chnages since v1:
> - Trivial change in cpucaps.h (refresh after removing ARM64_HARDEN_BP_POST_GUEST_EXIT)
>
> arch/arm64/include/asm/cpucaps.h | 5 ++--
> arch/arm64/include/asm/kvm_asm.h | 2 --
> arch/arm64/kernel/bpi.S | 8 ------
> arch/arm64/kernel/cpu_errata.c | 55 ++++++++++++++--------------------------
> arch/arm64/kvm/hyp/entry.S | 12 ---------
> arch/arm64/kvm/hyp/switch.c | 10 --------
> 6 files changed, 21 insertions(+), 71 deletions(-)
Could you reply to my outstanding question on the last version of this patch
please?
http://lists.infradead.org/pipermail/linux-arm-kernel/2018-March/564194.html
Will
WARNING: multiple messages have this Message-ID (diff)
From: will.deacon@arm.com (Will Deacon)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2] arm64: KVM: Use SMCCC_ARCH_WORKAROUND_1 for Falkor BP hardening
Date: Fri, 9 Mar 2018 13:48:09 +0000 [thread overview]
Message-ID: <20180309134809.GC15537@arm.com> (raw)
In-Reply-To: <1520269603-2900-1-git-send-email-shankerd@codeaurora.org>
Hi SHanker,
On Mon, Mar 05, 2018 at 11:06:43AM -0600, Shanker Donthineni wrote:
> The function SMCCC_ARCH_WORKAROUND_1 was introduced as part of SMC
> V1.1 Calling Convention to mitigate CVE-2017-5715. This patch uses
> the standard call SMCCC_ARCH_WORKAROUND_1 for Falkor chips instead
> of Silicon provider service ID 0xC2001700.
>
> Signed-off-by: Shanker Donthineni <shankerd@codeaurora.org>
> ---
> Chnages since v1:
> - Trivial change in cpucaps.h (refresh after removing ARM64_HARDEN_BP_POST_GUEST_EXIT)
>
> arch/arm64/include/asm/cpucaps.h | 5 ++--
> arch/arm64/include/asm/kvm_asm.h | 2 --
> arch/arm64/kernel/bpi.S | 8 ------
> arch/arm64/kernel/cpu_errata.c | 55 ++++++++++++++--------------------------
> arch/arm64/kvm/hyp/entry.S | 12 ---------
> arch/arm64/kvm/hyp/switch.c | 10 --------
> 6 files changed, 21 insertions(+), 71 deletions(-)
Could you reply to my outstanding question on the last version of this patch
please?
http://lists.infradead.org/pipermail/linux-arm-kernel/2018-March/564194.html
Will
next prev parent reply other threads:[~2018-03-09 13:48 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-03-05 17:06 [PATCH v2] arm64: KVM: Use SMCCC_ARCH_WORKAROUND_1 for Falkor BP hardening Shanker Donthineni
2018-03-05 17:06 ` Shanker Donthineni
2018-03-05 17:06 ` Shanker Donthineni
2018-03-06 10:32 ` Marc Zyngier
2018-03-06 10:32 ` Marc Zyngier
2018-03-19 18:30 ` Marc Zyngier
2018-03-19 18:30 ` Marc Zyngier
2018-03-19 18:30 ` Marc Zyngier
2018-03-20 9:47 ` Will Deacon
2018-03-20 9:47 ` Will Deacon
2018-03-09 13:48 ` Will Deacon [this message]
2018-03-09 13:48 ` Will Deacon
2018-03-10 18:40 ` Shanker Donthineni
2018-03-10 18:40 ` Shanker Donthineni
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