[PATCH 1/4] pwm: jz4740: Make disable operation compatible with TCU2 mode

[PATCH 1/4] pwm: jz4740: Make disable operation compatible with TCU2 mode

[Paul Cercueil]

From: Maarten ter Huurne <maarten@treewalker.org>

On the JZ4750 and later SoCs, channel 1 and 2 operate in a different
way (TCU2 mode) as the other channels. If a TCU2 mode counter is
stopped before its PWM functionality is disabled, the output is not
guaranteed to return to the initial level.

Signed-off-by: Maarten ter Huurne <maarten@treewalker.org>
---
 drivers/pwm/pwm-jz4740.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/pwm/pwm-jz4740.c b/drivers/pwm/pwm-jz4740.c
index a75ff3622450..2e41ba213f39 100644
--- a/drivers/pwm/pwm-jz4740.c
+++ b/drivers/pwm/pwm-jz4740.c
@@ -71,9 +71,15 @@ static void jz4740_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
 {
 	uint32_t ctrl = jz4740_timer_get_ctrl(pwm->hwpwm);
 
+	/* Disable PWM output.
+	 * In TCU2 mode (channel 1/2 on JZ4750+), this must be done before the
+	 * counter is stopped, while in TCU1 mode the order does not matter.
+	 */
 	ctrl &= ~JZ_TIMER_CTRL_PWM_ENABLE;
-	jz4740_timer_disable(pwm->hwpwm);
 	jz4740_timer_set_ctrl(pwm->hwpwm, ctrl);
+
+	/* Stop counter */
+	jz4740_timer_disable(pwm->hwpwm);
 }
 
 static int jz4740_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
-- 
2.11.0

[PATCH 2/4] pwm: pwm-jz4740: Implement set_polarity

[Paul Cercueil]

This permits clients of this driver to specify the polarity to use for
their PWM channel.

Signed-off-by: Paul Cercueil <paul-icTtO2rgO2OTuSrc4Mpeew@public.gmane.org>
---
 drivers/pwm/pwm-jz4740.c | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/drivers/pwm/pwm-jz4740.c b/drivers/pwm/pwm-jz4740.c
index 2e41ba213f39..6539c001fe32 100644
--- a/drivers/pwm/pwm-jz4740.c
+++ b/drivers/pwm/pwm-jz4740.c
@@ -130,10 +130,29 @@ static int jz4740_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
 	return 0;
 }
 
+static int jz4740_pwm_set_polarity(struct pwm_chip *chip,
+		struct pwm_device *pwm, enum pwm_polarity polarity)
+{
+	uint32_t ctrl = jz4740_timer_get_ctrl(pwm->pwm);
+
+	switch (polarity) {
+	case PWM_POLARITY_NORMAL:
+		ctrl &= ~JZ_TIMER_CTRL_PWM_ACTIVE_LOW;
+		break;
+	case PWM_POLARITY_INVERSED:
+		ctrl |= JZ_TIMER_CTRL_PWM_ACTIVE_LOW;
+		break;
+	}
+
+	jz4740_timer_set_ctrl(pwm->hwpwm, ctrl);
+	return 0;
+}
+
 static const struct pwm_ops jz4740_pwm_ops = {
 	.request = jz4740_pwm_request,
 	.free = jz4740_pwm_free,
 	.config = jz4740_pwm_config,
+	.set_polarity = jz4740_pwm_set_polarity,
 	.enable = jz4740_pwm_enable,
 	.disable = jz4740_pwm_disable,
 	.owner = THIS_MODULE,
-- 
2.11.0

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[PATCH 2/4] pwm: pwm-jz4740: Implement set_polarity

[Paul Cercueil]

This permits clients of this driver to specify the polarity to use for
their PWM channel.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
---
 drivers/pwm/pwm-jz4740.c | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/drivers/pwm/pwm-jz4740.c b/drivers/pwm/pwm-jz4740.c
index 2e41ba213f39..6539c001fe32 100644
--- a/drivers/pwm/pwm-jz4740.c
+++ b/drivers/pwm/pwm-jz4740.c
@@ -130,10 +130,29 @@ static int jz4740_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
 	return 0;
 }
 
+static int jz4740_pwm_set_polarity(struct pwm_chip *chip,
+		struct pwm_device *pwm, enum pwm_polarity polarity)
+{
+	uint32_t ctrl = jz4740_timer_get_ctrl(pwm->pwm);
+
+	switch (polarity) {
+	case PWM_POLARITY_NORMAL:
+		ctrl &= ~JZ_TIMER_CTRL_PWM_ACTIVE_LOW;
+		break;
+	case PWM_POLARITY_INVERSED:
+		ctrl |= JZ_TIMER_CTRL_PWM_ACTIVE_LOW;
+		break;
+	}
+
+	jz4740_timer_set_ctrl(pwm->hwpwm, ctrl);
+	return 0;
+}
+
 static const struct pwm_ops jz4740_pwm_ops = {
 	.request = jz4740_pwm_request,
 	.free = jz4740_pwm_free,
 	.config = jz4740_pwm_config,
+	.set_polarity = jz4740_pwm_set_polarity,
 	.enable = jz4740_pwm_enable,
 	.disable = jz4740_pwm_disable,
 	.owner = THIS_MODULE,
-- 
2.11.0

Re: [PATCH 2/4] pwm: pwm-jz4740: Implement set_polarity

[Paul Cercueil]

Hi,

Could this patchset get a bit of love?
I have other changes waiting for this patchset to get in, so it'd be 
great
to see it in 4.17-rc1.

Thanks,
-Paul

Le sam. 6 janv. 2018 à 17:58, Paul Cercueil <paul@crapouillou.net> a 
écrit :
> This permits clients of this driver to specify the polarity to use for
> their PWM channel.
> 
> Signed-off-by: Paul Cercueil <paul@crapouillou.net>
> ---
>  drivers/pwm/pwm-jz4740.c | 19 +++++++++++++++++++
>  1 file changed, 19 insertions(+)
> 
> diff --git a/drivers/pwm/pwm-jz4740.c b/drivers/pwm/pwm-jz4740.c
> index 2e41ba213f39..6539c001fe32 100644
> --- a/drivers/pwm/pwm-jz4740.c
> +++ b/drivers/pwm/pwm-jz4740.c
> @@ -130,10 +130,29 @@ static int jz4740_pwm_config(struct pwm_chip 
> *chip, struct pwm_device *pwm,
>  	return 0;
>  }
> 
> +static int jz4740_pwm_set_polarity(struct pwm_chip *chip,
> +		struct pwm_device *pwm, enum pwm_polarity polarity)
> +{
> +	uint32_t ctrl = jz4740_timer_get_ctrl(pwm->pwm);
> +
> +	switch (polarity) {
> +	case PWM_POLARITY_NORMAL:
> +		ctrl &= ~JZ_TIMER_CTRL_PWM_ACTIVE_LOW;
> +		break;
> +	case PWM_POLARITY_INVERSED:
> +		ctrl |= JZ_TIMER_CTRL_PWM_ACTIVE_LOW;
> +		break;
> +	}
> +
> +	jz4740_timer_set_ctrl(pwm->hwpwm, ctrl);
> +	return 0;
> +}
> +
>  static const struct pwm_ops jz4740_pwm_ops = {
>  	.request = jz4740_pwm_request,
>  	.free = jz4740_pwm_free,
>  	.config = jz4740_pwm_config,
> +	.set_polarity = jz4740_pwm_set_polarity,
>  	.enable = jz4740_pwm_enable,
>  	.disable = jz4740_pwm_disable,
>  	.owner = THIS_MODULE,
> --
> 2.11.0
> 

[PATCH 3/4] pwm: jz4740: Add support for devicetree

[Paul Cercueil]

Add support for probing the pwm-jz4740 directly from devicetree.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
---
 .../devicetree/bindings/pwm/ingenic,jz47xx-pwm.txt | 25 ++++++++++++++++++++++
 drivers/pwm/pwm-jz4740.c                           | 14 ++++++++++++
 2 files changed, 39 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pwm/ingenic,jz47xx-pwm.txt

diff --git a/Documentation/devicetree/bindings/pwm/ingenic,jz47xx-pwm.txt b/Documentation/devicetree/bindings/pwm/ingenic,jz47xx-pwm.txt
new file mode 100644
index 000000000000..7d9d3f90641b
--- /dev/null
+++ b/Documentation/devicetree/bindings/pwm/ingenic,jz47xx-pwm.txt
@@ -0,0 +1,25 @@
+Ingenic JZ47xx PWM Controller
+=============================
+
+Required properties:
+- compatible: One of:
+  * "ingenic,jz4740-pwm"
+  * "ingenic,jz4770-pwm"
+  * "ingenic,jz4780-pwm"
+- #pwm-cells: Should be 3. See pwm.txt in this directory for a description
+  of the cells format.
+- clocks : phandle to the external clock.
+- clock-names : Should be "ext".
+
+
+Example:
+
+	pwm: pwm@10002000 {
+		compatible = "ingenic,jz4740-pwm";
+		reg = <0x10002000 0x1000>;
+
+		#pwm-cells = <3>;
+
+		clocks = <&ext>;
+		clock-names = "ext";
+	};
diff --git a/drivers/pwm/pwm-jz4740.c b/drivers/pwm/pwm-jz4740.c
index 6539c001fe32..a7b134af5e04 100644
--- a/drivers/pwm/pwm-jz4740.c
+++ b/drivers/pwm/pwm-jz4740.c
@@ -18,6 +18,7 @@
 #include <linux/gpio.h>
 #include <linux/kernel.h>
 #include <linux/module.h>
+#include <linux/of_device.h>
 #include <linux/platform_device.h>
 #include <linux/pwm.h>
 
@@ -174,6 +175,8 @@ static int jz4740_pwm_probe(struct platform_device *pdev)
 	jz4740->chip.ops = &jz4740_pwm_ops;
 	jz4740->chip.npwm = NUM_PWM;
 	jz4740->chip.base = -1;
+	jz4740->chip.of_xlate = of_pwm_xlate_with_flags;
+	jz4740->chip.of_pwm_n_cells = 3;
 
 	platform_set_drvdata(pdev, jz4740);
 
@@ -187,9 +190,20 @@ static int jz4740_pwm_remove(struct platform_device *pdev)
 	return pwmchip_remove(&jz4740->chip);
 }
 
+#ifdef CONFIG_OF
+static const struct of_device_id jz4740_pwm_dt_ids[] = {
+	{ .compatible = "ingenic,jz4740-pwm", },
+	{ .compatible = "ingenic,jz4770-pwm", },
+	{ .compatible = "ingenic,jz4780-pwm", },
+	{},
+};
+MODULE_DEVICE_TABLE(of, jz4740_pwm_dt_ids);
+#endif
+
 static struct platform_driver jz4740_pwm_driver = {
 	.driver = {
 		.name = "jz4740-pwm",
+		.of_match_table = of_match_ptr(jz4740_pwm_dt_ids),
 	},
 	.probe = jz4740_pwm_probe,
 	.remove = jz4740_pwm_remove,
-- 
2.11.0

Re: [PATCH 3/4] pwm: jz4740: Add support for devicetree

[Rob Herring]

On Sat, Jan 06, 2018 at 05:58:42PM +0100, Paul Cercueil wrote:
> Add support for probing the pwm-jz4740 directly from devicetree.
> 
> Signed-off-by: Paul Cercueil <paul-icTtO2rgO2OTuSrc4Mpeew@public.gmane.org>
> ---
>  .../devicetree/bindings/pwm/ingenic,jz47xx-pwm.txt | 25 ++++++++++++++++++++++
>  drivers/pwm/pwm-jz4740.c                           | 14 ++++++++++++
>  2 files changed, 39 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/pwm/ingenic,jz47xx-pwm.txt

Reviewed-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
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Re: [PATCH 3/4] pwm: jz4740: Add support for devicetree

[Rob Herring]

On Sat, Jan 06, 2018 at 05:58:42PM +0100, Paul Cercueil wrote:
> Add support for probing the pwm-jz4740 directly from devicetree.
> 
> Signed-off-by: Paul Cercueil <paul@crapouillou.net>
> ---
>  .../devicetree/bindings/pwm/ingenic,jz47xx-pwm.txt | 25 ++++++++++++++++++++++
>  drivers/pwm/pwm-jz4740.c                           | 14 ++++++++++++
>  2 files changed, 39 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/pwm/ingenic,jz47xx-pwm.txt

Reviewed-by: Rob Herring <robh@kernel.org>

[PATCH 4/4] pwm: jz4740: Enable for all Ingenic SoCs

[Paul Cercueil]

This driver works perfectly with all the versions of the SoCs from
Ingenic that are supported upstream.

This makes the driver usable on JZ4740, JZ4770 and JZ4780 SoCs.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
---
 drivers/pwm/Kconfig | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig
index 763ee50ea57d..f4209302401c 100644
--- a/drivers/pwm/Kconfig
+++ b/drivers/pwm/Kconfig
@@ -209,10 +209,10 @@ config PWM_IMX
 	  will be called pwm-imx.
 
 config PWM_JZ4740
-	tristate "Ingenic JZ4740 PWM support"
-	depends on MACH_JZ4740
+	tristate "Ingenic JZ47xx PWM support"
+	depends on MACH_INGENIC
 	help
-	  Generic PWM framework driver for Ingenic JZ4740 based
+	  Generic PWM framework driver for Ingenic JZ47xx based
 	  machines.
 
 	  To compile this driver as a module, choose M here: the module
-- 
2.11.0

Re: [PATCH 1/4] pwm: jz4740: Make disable operation compatible with TCU2 mode

[Thierry Reding]

[-- Attachment #1: Type: text/plain, Size: 587 bytes --]

On Sat, Jan 06, 2018 at 05:58:40PM +0100, Paul Cercueil wrote:
> From: Maarten ter Huurne <maarten@treewalker.org>
> 
> On the JZ4750 and later SoCs, channel 1 and 2 operate in a different
> way (TCU2 mode) as the other channels. If a TCU2 mode counter is
> stopped before its PWM functionality is disabled, the output is not
> guaranteed to return to the initial level.
> 
> Signed-off-by: Maarten ter Huurne <maarten@treewalker.org>
> ---
>  drivers/pwm/pwm-jz4740.c | 8 +++++++-
>  1 file changed, 7 insertions(+), 1 deletion(-)

Applied patches 1-4, thanks.

Thierry

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